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Introduction:
We know that 60 seconds equal to 1 minute and 60 minutes equal to 1
hour. Hence the minute section is drivedby second section and hour section by the
minute
section. Each of the minute and second section has been designed to give a count
from 00
to 59 after which it resets to 00. and the hour section to give a count from 00 to 11
hours
after which it resets to 00. For each cycle of 00 to 59 in second section the minute
section
increases its count by 1. Similarly for each cycle of 00 to 59 in minute section the
hour
section increases its count by 1. In this way when the clock reaches 11hrs. 59mins. 59secs.
each of the section resets to 00 giving us a display 00.00.00popularly known as the
0th
hour.
*
*
Now, without wasting any time we straightaway move into the
discussion with our project with emphasis on different sections considering the
modules.
Module Structure:
The entire project has been divided into four modules. They are as follows:
 Second section
 Using two counter ICs (IC 7490) in such a way that this portionproduces
output from 00 to 59 continuously with a frequency of 1 Hz (1pps).
 Using Driver IC (IC 7447) and seven-segmentdisplay the counts. Both
the ICs are of common anode type.
 Checking the output of the circuit.
 Minute section
 Repeating the same circuit as that of the second section, but herethe
output should count from 00 to 59 with a frequency of 1Hz.for 1ppm.
 Checking the output.
 Hour section
 Designing the circuit in such a way so that the output resets to 00
 automatically displaying 11.59.59
 Here the counting proceeds with a frequency of one pulse per hour.
 Checking the output.

 Assembling the three sections together.
 Checking the output the final circuit.

Block Diagram
Basic Concept
It is evident from the block diagram that for each of Second and
Minute section we require a Counter for the units place andtens place. For the second
and minute sections the situation is identical with the units place counting from 0 -9-0
and
repeats whereas the tens place counts from 0-5-0 and repeats. For the Hour section
we
require the counter for the units place tocount 0-2-0 and for the tens place it counts
0-1-0
and repeats. The circuit could have been easily designed with an IC 7476 i.e. a dual
J -K Flip-
Flop but to maintain parity between the components used we stick to the basics b y
using IC-
7490 (details mentioned later).
Components used
Material
 Quantity
IC 555
----- 1(for all section)
Ic 7408
-----2

IC 7490 (14 pins)
-----6 (2 for each section)

IC 7447 (16 pins)
-----6 (2 for each section)
7 -segment display
-----6(2 for each section)

Resistances 1k
-----7 (all total)
Resistances 2.2M
---- -1
Capacitor 0.1F+1F----- 1+1
 (N.B.: IC 7447 and displayare of common anode type.)
Component Description
IC 7490
Fig: a
Fig: b
The IC 7490 is a 4-bit, ripple-type Decade counter. The device consists
of four master-slave flip-flops internally connected to provide a divide -by-two
section and a
divide-by-five section. Each section has a separate clock input to initiate state
changes of
the counter on the Highto-Low clock transition. State changes of the Q outputs do not
occur simultaneously becauseof internal ripple delays. Therefore decoded output
signals
are subject to decoding spikes and should not be used for clocks or strobes.
Agated AND asynchronous Master Reset (MR1  M R2) is provided
which overrides both clocks and resets (clears) all the flip-flops.Also provided is a
gatedAND asynchronous Master Set (MS1-MS2), which overrides the clock and the
MR inputs, setting the output to nine (HLLH).
N.B.: In the fig. MasterReset and Master Set have been denoted byR1,R2 & S2,
S2 respectively.
IC 7447& Seven-segment Display
Digital Clock Project Report/ touhid
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A.K.M.TOUHIDUR RA...
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