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In spite of the improvement of communication link and despite all progress in advanced
communication technologies, there are still very few functioning commercial wireless monitoring
systems, which are most off-line, and there are still a number of issues to deal with.

Therefore, there is a strong need for investigating the possibility of design and implementation
of an interactive real-time wireless communication system. In our project, a generic real-time wireless
communication system was designed and developed for short and long term remote patient-monitoring
applying wireless protocol. The primary function of this system is to monitor the temperature and
Heart Beat of the Patient and the Data collected by the sensors are sent to the Microcontroller. The
Microcontroller transmits the data over the air.

At the receiving end a mobile is used to receive the data and it is decoded which is then displayed over
the LCD display.

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Gome severe diseases and disorders e.g. heart failure need close and continual monitoring
procedure after diagnosis, in order to prevent mortality or further damage as secondary to the
mentioned diseases or disorders. Monitoring these types of patients, usually, occur at hospitals or
healthcare centers. Heart arrhythmias for instance, in many cases, need continual long-term
monitoring. However, the patients are often too early released, owing to need of hospital bed for
another patient on the waiting list, who needs to be hospitalized immediately.
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Long waiting time for hospitalization or ambulatory patient monitoring/treatment, are other
well-known issues for both the healthcare institutions and the patients. One of the primary challenges
faced by healthcare authorities is being able to maximize the quality and breadth of healthcare services
while controlling costs. As the population ages and demand for services increases, the ability to
maintain the quality and availability of care, while effectively managing financial and human
resources, is of critical importance. Use of modern communication technology in this context, is the
sole decisive factor that makes such communication system successful.
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FIG. 4.0: MIC
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0 LCD DATA D0 CONN CTION

1 LCD DATA D1 CONN CTION

 LCD DATA DCONN CTION
3 LCD DATA D3CONN CTION
P-0
4 LCD DATA D4 CONN CTION
 LCD DATA D CONN CTION
6 LCD DATA D6 CONN CTION
7 LCD DATA D7 CONN CTION

0 BUZZ
CONN CTION

1 NO CONN CTION
 NO CONN CTION
3 NO CONN CTION
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 NO CONN CTION
6 NO CONN CTION
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6 NO CONN CTION
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Fig. 4.1 PIN DIAG
AM P89V1
D
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80C1 Central Processing Unit
 V Operating voltage from 0 to 40 MHz
64 kB of on-chip Flash program memory with IGP (In-Gystem Programming) and
IAP (In-Application Programming)
Gupports 1-clock (default) or 6-clock mode selection via software or IGP
GPI (Gerial Peripheral Interface) and enhanced UA
T
PCA (Programmable Counter Array) with PWM and Capture/Compare functions
Four 8-bit I/O ports with three high-current Port 1 pins (16 mA each)
Three 16-bit timers/counters
Programmable Watchdog timer (WDT)
ight interrupt sources with four priority levels
Gecond DPT
register
Low MI mode (AL inhibit)
TTL- and CMOG-compatible logic levels

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The P89V1
D is an 80C1 microcontroller with 64 kB Flash and 104
bytes of data
AM.

A key feature of the P89V1
D is its X mode option. The design

engineer can
choose to run the application with the conventional 80C1 clock rate (1
clocks per machine cycle) or select the X mode (6 clocks per machine cycle)
to achieve twice the throughput at the same clock frequency. Another way to
benefit from this feature
is to keep the same performance by reducing the clock frequency by half,
thus dramatically reducing the MI.

The Flash program memory supports both parallel programming and in

serial
In-Gystem Programming (IGP). Parallel programming mode offers gang-
programming at high speed, reducing programming costs and time to market.
IGP allows a device
to be reprogrammed in the end product under software control. The
capability to
 field/update the application firmware makes a wide range of applications
possible.
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The P89V1
D is also In-Application Programmable (IAP), allowing
the Flash program memory to be reconfigured even while the application is
running.
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P0.0 to 39-3 37-30 43-36 I/O &c 4 Port 0 is an 8-bit open drain bi-
directional I/O
P0.7 port. Port 0 pins that have '1's written to them
Àoat, and
in this state can be used as high-impedance
inputs.
Port 0 is also the multiplexed low-order
address and data bus during accesses to
external code and data
memory. In this application, it uses strong
internal
pull-ups when transitioning to '1's. Port 0 also
receives
the code bytes during the external host
mode
programming, and outputs the code bytes
during the external host mode verification.
xternal pull-ups are
required during program verification or as a
general purpose I/O port.
P1.0 to 1-8 40-44, 1-3 -9 I/O with &c Port 1 is an 8-bit bi-directional I/O
port with
P1. 7
in by the
te internal pull-ups when '1's are written to them
rn and can
al be used as inputs in this state. As inputs, Port 1
p pins that
ul are externally pulled LOW will source
l- current (IIL)
u because of the internal pull-ups. P1., P1.6,
p P1.7 have
in high current drive of 16 mA. Port 1 also
te receives the
rn low-order address bytes during the external
al host mode programming and verification.
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P1.0 1 40  I/O  xternal count input to
Timer/Counter  or Clock-out
from
Timer/Counter 
P1.1  41 3 I #: Timer/Counter 
capture/reload trigger and
dir
ection control
P1. 3 4 4 I  : xternal clock input.
This signal is the external
clock
input for the PCA.
P1.3 4 43  I/O #4: Capture/compare external
I/O for PCA Module 0.
ach capture/compare module
connects to a Port 1 pin for
external I/O. When not used by
the PCA, this pin can handle
standard I/O.
P1.4  44 6 I/O : Glave port
select input for GPI
#: Capture/compare
external I/O for PCA Module 1
P1. 6 1 7 I/O
: Master Output
Glave Input for GPI
#: Capture/compare
external I/O for PCA Module 
P1.6 7  8 I/O 
: Master Input
Glave Output for GPI
#$: Capture/compare
external I/O for PCA Module 3
P1.7 8 3 9 I/O  6: Master Output
Glave Input for GPI
#*: Capture/compare
external I/O for PCA Module 4

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P.0 to 1-8 18- 4-31 I/O &c : Port  is an 8-bit bi-
directional I/O port with
P.7 with internal internal pull-ups. Port  pins
are pulled HIGH by the
pull-up internal pull-ups when '1's are
written to them and can
be used as inputs in this state. As
inputs, Port  pins that
are externally pulled LOW
will source current (IIL)
because of the internal pull-
ups. Port  sends the
high-order address byte during
fetches from external
program memory and during
accesses to external Data
Memory that use 16-bit address
(MOVX@DPT
). In this
application, it uses strong
internal pull-ups when
transitioning to '1's. Port  also
receives some control signals
and a partial of high-order
address bits during the external
host mode programming and
verification.
P3.0 to 10-17 , 7-13 11, 13-19 I/O &c $: Port 3 is an 8-bit
bidirectional I/O port with
P3.7 with internal internal pull-ups. Port 3 pins
are pulled HIGH by the
pull-up internal pull-ups when '1's are
written to them and can
be used as inputs in this state. As

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 inputs, Port 3 pins that
are externally pulled LOW
will source current (IIL)
because of the internal pull-
ups. Port 3 also receives
some control signals and a partial
of high-order address
bits during the external host
mode programming and
verification.
P3.0 10  11 I #:
serial input port
P3.1 11 7 13 O #:
serial output port
P3. 1 8 14 I  4:
external interrupt 0 input
P3.3 13 9 1 I  :
external interrupt 1 input
P3.4 14 10 16 I 4: external count input
to Timer/Counter 0
P3. 1 11 17 I : external count input
to Timer/Counter 1
P3.6 16 1 18 O +: external data
memory write strobe
P3.7 17 13 19 O : external data
memory read strobe
PG N 9 6 3 I/O c &%c )'%:
PG N is the read strobe for
external program memory. When
the device is executing
from internal program
memory, PG N is inactive
(HIGH). When the device is
executing code from
external program memory, PG N

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 is activated twice each
machine cycle, except that two
PG N activations are
skipped during each access to
external data memory. A
forced HIGH-to-LOW input
transition on the PG N pin
while the
GT input is
continually held HIGH for
more than 10 machine cycles
will cause the device to enter
external host mode
programming.

GT 9 4 10 I %(%&: While the oscillator is
running, a HIGH logic state
on this pin for two machine
cycles will reset the device. If
the PG N pin is driven by
a HIGH-to-LOW input
transition while the
GT
input pin is held HIGH, the
device will enter the external
host mode, otherwise the device
will enter the normal operation
mode.

7&%)c%((c)'%: A must be connected to VGG

in order to enable the device to fetch code from the
external program memory. A must be strapped to VDD
for internal program execution. However, Gecurity lock
level 4 will disable A, and program execution is only
possible from internal program memory. The A pin can tolerate a high voltage of 1 V.

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88%((c!&9c)'% AL is the output signal for
latching the low byte of the address during an access to
external memory. This pin is also the programming
pulse input (P
OG) for Àash programming. Normally the
AL 1] is emitted at a constant rate of 1 6 the crystal
frequency] and can be used for external timing and
clocking. One AL pulse is skipped during each access
to external data memory. However, if AO is set to '1', AL is disabled.
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3(&c : Input to the inverting oscillator amplifier and input to the internal clock
generator circuits.
3(&c Output from the inverting oscillator amplifier.
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 The words, ³Mobile Gtation´ (MG) or ³Mobile quipment´ (M ) are used for
mobile terminals supporting GGM services. A call from a GGM mobile station to the
PGTN is called a ³mobile originated call´ (MOC) or ³outgoing call´, and a call from a
fixed network to a GGM mobile station is called a ³mobile terminated call´ (MTC) or
³incoming call´. In this document, the word ³product´ refers to any product supporting
the AT commands interface.
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Gince radio spectrum is a limited resource shared by all users, a method must be
devised to divide up the bandwidth among as many users as possible. The method chosen
by GGM is a combination of Time- and Frequency-Division Multiple Access
(TDMA/FDMA). The FDMA part involves the division by frequency of the (maximum)
 MHz bandwidth into 14 carrier frequencies spaced 00 kHz apart. One or more
carrier frequencies are assigned to each base station. ach of these carrier frequencies is
then divided in time, using a TDMA scheme. The fundamental unit of time in this TDMA
scheme is called a burst periodcand it lasts 1/6 ms (or approx. 0.77 ms). ight burst
periods are grouped into a TDMA frame (10/6 ms, or approx. 4.61 ms), which forms
the basic unit for the definition of logical channels. One physical channel is one burst
period per TDMA frame.
Channels are defined by the number and position of their corresponding burst
periods. All these definitions are cyclic, and the entire pattern repeats approximately
every 3 hours. Channels can be divided into dedicated channels which are allocated to a
mobile station, and common channels which are used by mobile stations in idle mode.

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A traffic channel (TCH) is used to carry speech and data traffic. Traffic channels
are defined using a 6-frame multiframe, or group of 6 TDMA frames. The length of a
6-frame multi frame is 10 ms, which is how the length of a burst period is defined (10
ms divided by 6 frames divided by 8 burst periods per frame). Out of the 6 frames, 4
are used for traffic, 1 is used for the Glow Associated Control Channel (GACCH) and 1 is
currently unused.
In addition to these full-ratec TCHs, there are also half-rate TCHs defined,
although they are not yet implemented. Half-rate TCHs will effectively double the
capacity of a system once half-rate speech coders are specified (i.e., speech coding at
around 7 kbps, instead of 13 kbps). ighth-rate TCHs are also specified, and are used for

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 The signalling protocol in GGM is structured into three general layers 1], 19],
depending on the interface, as shown in Figure 3. Layer 1 is the physical layer, which
uses the channel structures discussed above over the air interface. Layer  is the data link
layer. Across the Um interface, the data link layer is a modified version of the LAPD
protocol used in IGDN, called LAPDm. Across the A interface, the Message Transfer Part
layer  of Gignalling Gystem Number 7 is used. Layer 3 of the GGM signalling protocol is
itself divided into 3 sublayers.
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Mobility Management handles the control functions required for mobility e.g.
‡c Authentication
‡c Assignment of TMGI
‡c Management of subscriber location
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The role of the

management layer is to establish and release stable connection
between mobile stations (MG) and an MGC for the duration of a call, and to maintain it
despite user movements. The following functions are performed by the MGC
‡c Call selection
‡c Handover
‡c Allocation and take-down of point-to-point channels
‡c Monitoring and forwarding of radio connections
‡c Introduction of encryption
‡c Change in transmission mode
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Connection Management is used to setup, maintain and take down call
connections; it is comprised of three subgroups:
‡c Call Control (CC)- Manages call connections.
‡c Gupplementary Gervice Gupport (GG):- Handles special services.
‡c Ghort Message Gervice Gupport (GMG):- Transfers brief texts.

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FIG.4.:cGGM P
OTOCOL GTACKG

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'c Layer 1: Physical layer.
'c Layer : Here the LAP-Dm protocol is used (similar to IGDN LAP-D). LAP-Dm
has the following functions:
‡c Connectionless transfer on point-to-multipoint signalling channels.
‡c Connection-oriented transfer with retention of the transmission sequence, error
detection and error correction.
'c Layer 3: Contains the following sub layers which control signalling channel
functions (BCH, CCCH and DCCH).

 c8c)&%1%c
GGM
adio interface uses the base FDMA+TDMA technologies along with an
optional Glow Frequency Hopping. The specs are the specifications are mentioned below.
‡c 14 radio carriers, inter carrier spacing 00 kHz.
‡c 890 to 91 MHz mobile to base ± UPLINK
‡c 93 to 960 MHz base to mobile - DOWNLINK
‡c 8 channels/carrier

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 Our GGM modem is one of the most exciting and innovative electronic products
ever developed. With it you can stay in contact with your office, your home, emergency
services, and others, wherever service is provided.
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Our modem utilizes the GGM standard for cellular technology. GGM is a newer
radio frequency («
F») technology than the current FM technology that has been used for
radio communications for decades. The GGM standard has been established for use in the
uropean community and elsewhere. Your modem is actually a low power radio
transmitter and receiver. It sends out and receives radio frequency energy. When you use
your modem, the cellular system handling your calls controls both the radio frequency
and the power level of your cellular modem.

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For our modem to operate at the lowest power level, consistent with satisfactory
call quality: If your modem has an extendible antenna, extend it fully. Gome models allow
you to place a call with the antenna retracted. However your modem operates more
efficiently with the antenna fully extended. Do not hold the antenna when the modem is
«IN UG ». Holding the antenna affects call quality and may cause the modem to operate
at a higher power level than needed.
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Do not use the modem with a damaged antenna. If a damaged antenna comes into
contact with the skin, a minor burn may result.
eplace a damaged antenna immediately.
Consult your manual to see if you may change the antenna yourself. If so, use only a
manufacturer-approved antenna. Otherwise, have your antenna repaired by a qualified
technician. Use only the supplied or approved antenna. Unauthorized antennas,
modifications or attachments could damage the modem and may contravene local
F
emission regulations or invalidate type approval.

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Check the laws and regulations on the use of cellular devices in the area where
you drive. Always obey them. Also, when using your modem while driving, please: give

c
full attention to driving, pull off the road and park before making or answering a call if
driving conditions so allow. When applications are prepared for mobile use they should
fulfil road-safety instructions of the current law!
c
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Most electronic equipment, for example in hospitals and motor vehicles is
shielded from
F energy. However
F energy may affect some malfunctioning or
improperly shielded electronic equipment.

%9%c%&)c@02%)&
Check your vehicle manufacturer¶s representative to determine if any on board
electronic equipment is adequately shielded from
F energy.

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Performance is critical in three areas: in-channel, out-of-channel, and out-of band
In-channel measurements determine the link quality seen by the user in question:
Phase error and mean frequency error
Mean transmitted
F carrier power
Transmitted
F carrier power versus time
Out-of-channel measurements determine how much interference the user causes other

 c0(%(c
‡c Gpectrum due to modulation and wide band noise
‡c Gpectrum due to switching
‡c TX and
X band spuriousc
Out-of-band measurements determine how much interference the user causes
other users of the radio spectrum (military, aviation, and police):
Other spurious (cross band and wideband)

%%?%(c
Performance is critical in the following area: sensitivity. Gensitivity measurements
determine the link quality seen by the user in low signal level conditions:
Gtatic reference sensitivity level

c

)(c1c %(0%%)&(c
GGM transmitter and receiver measurements originate from the following TGI
3GPP standards:
‡c 3GPP TG 0.0.V8.1.0:
adio access network; radio transmission and reception
‡c 3GPP TG 11.1 V8.6.0: Base station system (BGG) equipment specification; radio
aspects.

It is worth noting that these specifications were written for the purposes of full
type approval and they are extensive. It is not practical to make the whole suite of
measurements in most application areas. For example, in manufacturing where
throughput and cost are key drivers, it is necessary to use a subset of the measurements
defined in the specifications above. Optimization is key, the objective should be to test
sufficiently to prove correct assembly, perform correct calibration and assure correct field
operation, but with a minimum of expense. It is not necessary to type approve
infrastructure component shipped. This application note aims to help the reader to
interpret the standards and apply tests appropriately. The standards can be difficult to
understand, and independent parties might interpret them differently. Agilent
Technologies uses the standards as a basis from which to design measurement algorithms
c
&&%)&)c)8(c
GGM engines are referred to as following term:
1) M (Mobile quipment);
) MG (Mobile Gtation);
3) TA (Terminal Adapter);
4) DC (Data Communication quipment) or facsimile DC (FAX modem, FAX board);

In application, controlling device controls the GGM engine by sending AT Command via
its serial interface. The controlling device at the other end of the serial line is referred to
as following term:
1) T (Terminal quipment);
) DT (Data Terminal quipment) or plainly ³the application´ which is running on an
embedded system;

c )8c(3)&7c

c
 The "AT" or "at" prefix must be set at the beginning of each command line. To terminate
a command line enter <C
.
Commands are usually followed by a response that
includes.´<C
<LF<response<C
<LF´
Throughout this document, only the responses are presented, <C
<LF are omitted
intentionally.
The AT command set implemented by GIM300 is a combination of GGM07.0,
GGM07.07 and ITU-T recommendation V.ter and the AT commands developed by
GIMCOM.
&%c
)3c %)&%c c )8c &909c (%c 2&c 1&%c  $44c (c 2:%c )c )8c
)(&%8c %(0&c 8%c ABCc (c %%?%8c 1c (%c 2&c )8c 1c 0)(&%8c
%(0&c8%C 6c4Cc%&0)%8c&c)8&%(c c8c()D&c2%(%)&c1c0&'08)c(c
%)'%8Ec&9%c)(&%8c%(0&c 8%(cABCc)8c(c)c%c)&c)8&%8c:9%)c30c
(&&c02c&9%c 7&%)8%8c3)&7cc
These commands can operate in several modes, as following table:
Table 1: Types of AT commands and AT+ß
Î The mobile equipment
responses Test command returns the list of
parameters and value
ranges set with the
corresponding Write
command or by internal
processes.

ead command AT+ß
This command returns the
currently set value of the
parameter or parameters.
Write command AT+<xÎ<  This command sets the
user-definable parameter
values.
xecution command AT+<x The execution command
reads non-variable
parameters affected by
internal processes in the
GGM engine
c

c
 '))cc)8(c)c&9%c(%c)8c)%c
You can enter several AT commands on the same line. In this case, you do not need to
type the ³´ or ³&´ prefix before every command. Instead, you only need type ³´ or
³´ at the beginning of the command line. Please note to use a semicolon as command
delimiter.
The command line buffer can accept a maximum of 6 characters. If the characters
entered exceeded this number then none of the command will executed and TA will
returns ³
´.
*/c)&%)c(0%((?%cc)8(c)c(%2&%c)%(c
When you need to enter a series of AT commands on separate lines, please note that you
need to wait the final response (for example OK, CM error, CMG error) of last AT
command you entered before you enter the next AT command.

/c022&%8c9&%c(%&(c

The GIM300 AT command interface defaults to the c character set. The GIM300
supports the following character sets:
‡ GGM format
‡ UCG
‡H X
‡ I
A
‡ PCCP437
‡ PCDN
‡ 889_1

The character set can be set and interrogated using the ³F  ´ command (GGM
07.07). The character set is defined in GGM specification 07.0.

?%?%:c1cc )8(c8)c&c 4G4/c

AT+CMGF G L CT GMG M GGAG
FO
MAT
F c%%&c c %((%c&cF c%%&c c %((%c&c

ead Command
esponse
F Hc F c<mode

6c

c
 Parameters
see write
command
Test Command
esponse
F IHc F clist of supported <modes

6c
Write Command
esponse
F IJK8%LMc TA sets parameter to denote which
input and output format of messages to
use.

6c
Parameters
DU mode
1 text mode
c
c
c
c
c
AT G T COMMAND CHO MOD
c
c%&c)8c%9c8%cc%&c)8c%9c8%c
Write command
esponse
JK?0%LMc This setting determines whether or not
the TA echoes characters received from
T during command state.

6c
Parameter
cho mode off
1 cho mode on
c
AT+CMGG G ND GMG M GGAG

esponse

c
TA sends message from a T to the network (GMG-GUBMIT). Message reference value
<mr is returned to the T on successful message delivery. Optionally (when +CGMG
<service value is 1 and network supports) <scts is returned. Values can be used to
identify message upon unsolicited delivery status report result code.
1) If text mode(+CMGFÎ1) and sending successful:
F c<mr

6c
) If PDU mode(+CMGFÎ0) and sending successful:
F c<mr

6c
3)If error is related to M functionality:
F c
cK%Lcc
c
c
c
c
c
c
! c"7c
c

Liquid crystal display is very important device in embedded system. It offers high
flexibility to user as he can display the required data on it. But due to lack of proper
approach to LCD interfacing many of them fail. Many people consider LCD interfacing a
complex job but according to me LCD interfacing is very easy task, you just need to have
a logical approach. This page is to help the enthusiast who wants to interface LCD with
through understanding. Copy and Paste technique may not work when an embedded
system engineer wants to apply LCD interfacing in real world projects.

You will be knowing about the booster rockets on space shuttle. Without these booster
rockets the space shuttle would not launch in geosynchronous orbit. Gimilarly to
understand LCD interfacing you need to have booster rockets attached! To get it done
right you must have general idea how to approach any given LCD.This page will help you
develop logical approach towards LCD interfacing.

c
First thing to begin with is to know what LCD driver/controller is used in LCD.Yes, your
LCD is dumb it does not know to talk with your microcontroller. LCD driver is a link
between the microcontroller and LCD. You can refer the datasheet of LCD to know the
LCD driver for e.g. JHD 16A is name of LCD having driver HD44780U.You have to
interface the LCD according to the driver specification. To understand the algorithm of
LCD interfacing user must have datasheet of both LCD and LCD driver. Many people
ignore the datasheets and end up in troubles. If you want to interface LCD successfully
you must have datasheets.

Why people ignore datasheets Most of us do not like to read 100 pages of datasheet. But
for a accurate technical specification datasheets are must. I will show you a technique to
manipulate a datasheet within minutes.

First thing to find out in datasheet is the features viz. operating voltage, type of interface,
maximum speed for interface in MHz, size of display data
AM, number of pixels, bits
per pixel, number of row and columns. You must have the pin diagram of LCD.Pin
diagram of LCD driver can be omitted.

Gtudy the type of communication protocol whether it is parallel or serial interface. Check
how LCD discriminates data bytes and command bytes, which pins on LCD are used for
communication. Gtudy Interface timing diagram given in the datasheet.

From datasheet of LCD driver find out whether hardware reset is required at startup, what
is the time of reset pulse, is it active low and which pins of LCD are to be toggled.

Major task in LCD interfacing is the initialization sequence. In LCD initialization you
have to send command bytes to LCD. Here you set the interface mode, display mode,
address counter increment direction, set contrast of LCD, horizontal or vertical addressing
mode, color format. This sequence is given in respective LCD driver datasheet. Gtudying
the function set of LCD lets you know the definition of command bytes. It varies from
one LCD to another. If you are able to initialize the LCD properly 90% of your job is
done.

Next step after initialization is to send data bytes to required display data
AM memory
location. Firstly set the address location using address set command byte and than send
data bytes using the DD
AM write command. To address specific location in display
data
AM one must have the knowledge of how the address counter is incremented.

c
! c   c
The most commonly used Character based LCDs are based on Hitachi's HD44780
controller or other which are compatible with HD4480. In this, we will discuss about
character based LCDs, their interfacing with various microcontrollers, various interfaces
(8-bit/4-bit), programming, special stuff and tricks you can do with these simple looking
LCDs which can give a new look to your application.
c
)c%(2&)c
The most commonly used LCDs found in the market today are 1 Line,  Line or 4 Line
LCDs which have only 1 controller and support at most of 80 characters, whereas LCDs
supporting more than 80 characters make use of  HD44780 controllers. Most LCDs with
1 controller has 14 Pins and LCDs with  controller has 16 Pins (two pins are extra in
both for back-light L D connections). Pin description is shown in the table below.

ccccccccccccc 9&%c! c&32%c
**G-4c)c8c

c

c
cccccccccccccccccccccccccccccccccccccccc 9&%c! c2)(c:&9cc )&%c

ccccccccccccccccccccccccccccccccc 9&%c! c2)(c:&9cc )&%c

c

 >(23c8&c c
c

c
Display data
AM (DD
AM) stores display data represented in 8-bit character codes. Its
extended capacity is 80 X 8 bits, or 80 characters. The area in display data
AM
(DD
AM) that is not used for display can be used as general data
AM. Go whatever you
send on the DD
AM is actually displayed on the LCD. For LCDs like 1x16, only 16
characters are visible, so whatever you write after 16 chars is written in DD
AM but is
not visible to the user.
Figures below will show you the DD
AM addresses of 1 Line,  Line and 4 Line LCDs.c
c

 c88%((c1cc!)%c! c
c

cccccccccccccccccccccccccccccccccc  c88%((c1cc!)%c! 

 c88%((c1c*c!)%c! c


c>c 9&%c%)%&c
c

Now you might be thinking that when you send an AGCII value to DD
AM, how the
character is displayed on LCD Go the answer is CG
OM. The character generator
OM
generates  x 8 dot or  x 10 dot character patterns from 8-bit character codes. It can
generate 08  x 8 dot character patterns and 3  x 10 dot character patterns. User
defined character patterns are also available by mask-programmed
OM.

c
  c>c 9&%c%)%&c c

CG
AM area is used to create custom characters in LCD. In the character generator

AM, the user can rewrite character patterns by program. For  x 8 dots, eight character
patterns can be written, and for  x 10 dots, four character patterns can be written. c

c>c 0(3cc

Busy Flag is a status indicator flag for LCD. When we send a command or data to the
LCD for processing, this flag is set (i.e. BF Î1) and as soon as the instruction is executed
successfully this flag is cleared (BF Î 0). This is helpful in producing and exact amount
of delay. To read Busy Flag, the condition
G Î 0 and
/W Î 1 must be met and The
MGB of the LCD data bus (D7) act as busy flag. When BF Î 1 means LCD is busy and
will not accept next command or data and BF Î 0 means LCD is ready for the next
command or data to process.
c
)(&0&)c%(&%c;=c)8c&c%(&%c;=c
There are two 8-bit registers in HD44780 controller Instruction and Data register.
Instruction register corresponds to the register where you send commands to LCD e.g.
LCD shift command, LCD clear, LCD address etc. and Data register is used for storing
data, which is to be displayed on LCD when send the enable signal of the LCD is
asserted, the data on the pins is latched in to the data register and data is then moved
automatically to the DD
AM and hence is displayed on the LCD
Data
egister is not only used for sending data to DD
AM but also for CG
AM, the
address where you want to send the data, is decided by the instruction you send to LCD.
c
)8(c)8c)(&0&)c(%&c
Only the instruction register (I
) and the data register (D
) of the LCD can be controlled
by the MCU. Before starting the internal operation of the LCD, control information is
temporarily stored into these registers to allow interfacing with various MCUs, which
operate at different speeds, or various peripheral control devices. The internal operation
of the LCD is determined by signals sent from the MCU. These signals, which include
register selection signal (
G), read/write signal (
/W), and the data bus (DB0 to DB7),
make up the LCD instructions (table below). There are four categories of instructions
that:

c
 rc Designate LCD functions, such as display format, data length, etc.
rc Get internal
AM addresses
rc Perform data transfer with internal
AM
rc Perform miscellaneous functions

'%c )8c)8c)(&0&)c(%&c1c! c&32%c
**G-4

Although looking at the table you can make your own commands and test them. Below is
a brief list of useful commands which are used frequently while working on the LCD.

c
 %@0%)&3c0(%8c)8(c)8c)(&0&)(c1c! 

! c)&N&)c

Before using the LCD for display purpose, LCD has to be initialized either by the internal
reset circuit or sending set of commands to initialize the LCD. It is the user who has
to decide whether an LCD has to be initialized by instructions or by internal reset circuit.
we will discuss both ways of initialization one by one.
c
c
Initialization by internal
eset Circuitc
c
An internal reset circuit automatically initializes the HD44780U when the power is turned
on. The following instructions are executed during the initialization. The busy flag (BF) is
kept in the busy state until the initialization ends (BF Î 1). The busy stat e lasts for 10 ms
after VCC rises to 4. V.

c
 rc Display clear
rc Function set:
DL Î 1; 8-bit interface data
N Î 0; 1-line display
F Î 0;  x 8 dot character font
rc Display on/off control:
D Î 0; Display off
C Î 0; Cursor off
B Î 0; Blinking off
rc ntry mode set:
I/D Î 1; Increment by 1
G Î 0; No shift

:%c0223c)8&)c1c)&%)c%(%&c0&
Figure 7 shows the test conditions which are to be met for internal reset circuit to be
active.

c
Now the problem with the internal reset circuit is, it is highly dependent on power supply,
to meet this critical power supply conditions is not hard but are difficult to achieve when
you are making a simple application. Go usually the second method i.e. Initialization by
instruction is used and is recommended most of the time.

Initialization by instructionsc
Initializing LCD with instructions is really simple. Given below is a flowchart that
describes the step to follow, to initialize the LCD.

:c9&c1c! c)&N&)
As you can see from the flow chart, the LCD is initialized in the following sequence.
1) Gend command 0x30 - Using 8-bit interface
) Delay 0ms

c
 3) Gend command 0x30 - 8-bit interface
4) Delay 0ms
) Gend command 0x30 - 8-bit interface
6) Delay 0ms
7) Gend Function set - see Table 4 for more information
8) Display Clear command
9) Get entry mode command - explained below

The first 3 commands are usually not required but are recommended when you are using
4-bit interface. Go you can program the LCD starting from step 7 when working with 8-
bit interface. Function set command depends on what kind of LCD you are using and
what kind of interface you are using.

! c)&%1)c:&9c )&%(>*'&c8%c

In 4-bit mode the data is sent in nibbles, first we send the higher nibble and then the lower
nibble. To enable the 4-bit mode of LCD, we need to follow special sequence of
initialization that tells the LCD controller that user has selected 4-bit mode of operation. We
call this special sequence as resetting the LCD. Following is the reset sequence of LCD.

ic Wait for about 0mG

ic Gend the first init value (0x30)
ic Wait for about 10mG
ic Gend second init value (0x30)
ic Wait for about 1mG
ic Gend third init value (0x30)
ic Wait for 1mG
ic Gelect bus width (0x30 - for 8-bit and 0x0 for 4-bit)
ic Wait for 1mG

The busy flag will only be valid after the above reset sequence. Usually we do not use
busy flag in 4-bit mode as we have to write code for reading two nibbles from the LCD.
Instead we simply put a certain amount of delay usually 300 to 600uG. This delay might
vary depending on the LCD you are using, as you might have a different crystal

c
frequency on which LCD controller is running. Go it actually depends on the LCD
module you are using. Go if you feel any problem running the LCD, simply try to increase
the delay. This usually works.

! c))%&)(c)c*>'&c 8%c
c

Above is the connection diagram of LCD in 4-bit mode, where we only need 6 pins to
interface an LCD. D4-D7 are the data pins connection and nable and
egister select are
for LCD control pins. We are not using
ead/Write (
W) Pin of the LCD, as we are only
writing on the LCD so we have made it grounded permanently. If you want to use it.
Then you may connect it on your controller but that will only increase another pin and
does not make any big difference. Potentiometer
V1 is used to control the LCD contrast.
The unwanted data pins of LCD i.e. D0-D3 are connected to ground.

c
c
c
c
c
c

c

+c

!c
c c 
c-4c

>+% is a device communications bus system designed by Dallas Gemiconductor Corp.

that provides low-speed data, signaling, and power over a single signal.1] 1-Wire is
similar in concept to I²C, but with lower data rates and longer range. It is typically used to
communicate with small inexpensive devices such as digital thermometers and weather
instruments. A network of 1-Wire devices with an associated master device is called a
¢
.

One distinctive feature of the bus is the possibility to use only two wires: data and
ground. To accomplish this, 1-wire devices include an 800 pF capacitor to store charge,
and power the device during periods where the data line is used for data.

Dependent on function, native 1-wire devices are available as single components in

integrated circuit and TO9 packaging, and in some cases a portable form called an
  that resembles a watch battery. Manufacturers also produce products that are
more complex than a single component, and use the 1-wire bus to communicate.

A 1-Wire device may be just one of many components on a circuit board within a
product, but are also found in isolation within devices such as a temperature sensor probe,
or attached to a device being monitored. Gome laboratory systems and other data
acquisition and control systems connect to 1-Wire devices using cords with modular
connectors or with CAT- cable, with the devices themselves mounted in a socket,
incorporated in a small PCB, or attached to the object being monitored. In such systems,

J11 (6PC or 6P4C modular plugs, commonly used for telephones) are popular.

Gystems of sensors and actuators can be built by wiring together 1-Wire components,
each including all of the logic needed to operate on the 1-Wire bus. xamples include
temperature loggers, timers, voltage and current sensors, battery monitors, and memory.
These can be connected to a PC using a bus converter. UGB,
G-3 serial, and parallel
port interfaces are popular solutions for connecting the MicroLan to the host PC.
MicroLans also interface to microcontrollers, such as the Arduino, Parallax BAGIC
Gtamp, Parallax Propeller, PICAX , the Microchip PIC family and
N GAG family.

The  0&&) (also known as the (c 6%3) is a mechanical packaging standard that
places a 1-Wire component inside a small stainless steel "button" similar to a disk-shaped
battery. iButtons are connected to 1-Wire bus systems by means of sockets with contacts

c
which touch the "lid" and "base" of the canister. iButtons are used as Akbil smart tickets
for the Public transport in Istanbul. Alternatively, the connection can be semi-permanent
with a different socket type; the iButton clips into it, but is easily removed.

The ?c), a ring-mounted iButton with a Java Virtual Machine compatible with the
Java Card .0 specification within, was given to attendees of the JavaOne 1998
conference.]

ach 1-Wire chip has a unique code buried within it. This feature makes the chips,
especially in an iButton package, ideal for use as a key to open a lock, arm and deactivate
burglar alarms, authenticate computer system users, operate time clock systems, and other
similar uses.

à   

In any MicroLan, there is always exactly one master in overall charge, which may be a
PC or a microcontroller. The master initiates activity on the bus, simplifying the
avoidance of collisions on the bus. Protocols are built into the software to detect
collisions. After a collision, the master tries again to effect the required communication.

The Dallas 1-Wire network is physically implemented as an open drain master device
connected to one or more open drain slaves3] . A single pull-up resistor is common to all
devices and acts to pull the bus up to 3 or  volts, and may provide power to the slave
devices. Communication occurs when a master or slave asserts the bus low that is,
connects the pull up resistor to ground through its output MOGF T. Gpecific 1-Wire
driver and bridge chips are also available. Data rates of 16.3 kbit/s can be achieved. There
is also an overdrive mode which speeds up the communication by a factor of 10.

The master starts a transmission with a "reset" pulse, which pulls the wire to 0 volts for
480 µs. This resets every slave device on the bus, probably by depriving them all of
power. After that, any slave device, if present, shows that it exists with a "presence"
pulse: it holds the wire to ground for at least 60 µs after the master releases the bus.

To send a "1", the bus master software sends a very brief (1 - 1 µs) low pulse. To send a
"0", the software sends a 60 µs low pulse. The falling (negative) edge of the pulse is used
to start a monostable multivibrator in the slave device. The multivibrator in the slave
clocks to read the data line about 30 µs after the falling edge. The slave's multivibrator

c
unavoidably has analog tolerances that affect its timing accuracy, which is why the output
pulses have to be 60 µs long, and the starting pulse can't be longer than 1 µs.

If a parallel port is inconvenient or the operating system interferes with the timing, a
UA
T running at 100 kbit/s with a few resistors and special software can produce and
sense acceptable 1-wire pulses. Gerial or UGB "bridge" chips are also available that
handle the timing and waveform requirements of the 1-Wire bus, and are particularly
useful in utilizing long (greater than 100 m) cables effectively. Up to 300 meter long
buses consisting of simple twistedpair telephone cable has been tested by the
manufacturer. It will however require adjustment of pull-up resistances from say kȍ to 1
kȍ.

When receiving data, the master sends a 1-1 µs 0 volt pulse to start each bit. If the
transmitting slave unit wants to send a "1", it does nothing, and the wire goes
immediately up to the pulled-up voltage. If the transmitting slave wants to send a "0", it
pulls the data line to ground for 60 µs.

The basic sequence is a reset pulse followed by an 8-bit command, and then data is sent
or received in groups of 8-bits.

When a sequence of data is being transferred, errors can be detected with an 8-bit C
C
(weak data protection).

Many devices can share the same bus. ach device on the bus has a unique 64-bit serial
number. The least significant byte of the serial number is an 8-bit number that tells the
type of the device. The most significant byte is a standard (for the 1-wire bus) 8-bit
C
C.4]

There are several standard broadcast commands, and commands addressed to particular
devices. The master can send a selection command, and then the address of a particular
device, and then the next command is executed only by the selected device.

The bus also has an algorithm to recover the address of every device on the bus. Gince the
address includes the device type and a C
C, recovering the address roster also produces a
reliable inventory of the devices on the bus. The 64-bit address space is searched as a
binary tree, allowing up to 7 devices to be found per second.

c
To find the devices, the master broadcasts an enumeration command, and then an address,
"listening" after each bit of an address. If a slave has all the address bits so far, it returns a
0. The master uses this simple behavior to search systematically for valid sequences of
address bits. The process is much faster than a brute force search of all possible 64-bit
numbers because as soon as an invalid bit is detected, all subsequent address bits are
known to be invalid. An enumeration of 10 or 1 devices finishes very quickly.

The location of devices on the bus is sometimes significant. For these situations, the
manufacturer has a special device that either passes through the bus or switches it off.
Goftware can therefore explore sequential

Y
 
 


The following signals were generated by an FPGA, which was the master for the
communication with a DG43 ( P
OM) chip, and measured with a logic analyzer.
High on the 1-wire output means that the output of the FPGA is in tri-state mode and the
1-wire device can pull down the bus. Low means that the FPGA pulls down the bus. The
1-wire input is the measured bus signal. On input sample time high, the FPGA samples
the input for detecting the device response and receiving bits.

c
 8c3%c

The 8c 3% is a term referring to all or any of the events related to the flow or
blood pressure that occurs from the beginning of one heartbeat to the beginning of the
next.1] The frequency of the cardiac cycle is described by the heart rate. ach beat of the
heart involves five major stages. The first two stages, often considered together as the
"ventricular filling" stage, involve the movement of blood from atria into ventricles. The
next three stages involve the movement of blood from the ventricles to the pulmonary
artery (in the case of the right ventricle) and the aorta (in the case of the left ventricle).1]

The first, "late diastole", is when the semilunar valves close, the atrioventricular (AV)
valves open, and the whole heart is relaxed. The second, "atrial systole", is when the
atrium contracts, the AV valves open, and blood flows from atrium to the ventricle. The
third, "isovolumic ventricular contraction", is when the ventricles begin to contract, the
AV and semilunar valves close, and there is no change in volume. The fourth,
"ventricular ejection", is when the ventricles are empty and contracting, and the semilunar
valves are open. During the fifth stage, "Isovolumic ventricular relaxation", pressure
decreases, no blood enters the ventricles, the ventricles stop contracting and begin to
relax, and the semilunar valves close due to the pressure of blood in the aorta.

Throughout the cardiac cycle, blood pressure increases and decreases. The cardiac cycle
is coordinated by a series of electrical impulses that are produced by specialized heart
cells found within the sinoatrial node and the atrioventricular node. The cardiac muscle is
composed of myocytes which initiate their own contraction without help of external
nerves (with the exception of modifying the heart rate due to metabolic demand). Under
normal circumstances, each cycle takes approximately one second.

c
 c
c
c
c
c
c

Ê

 
   

 

The heart is a four-chambered organ consisting of right and left halves. Two of the
chambers, the left and right atria, are entry-points into the heart, while the other two
chambers, the left and right ventricles, are responsible for contractions that send the heart
through the circulation. The circulation is split into the pulmonary and systemic
circulation. The right ventricle's role is to pump deoxygenated blood to the body through
the aorta. The left ventricle's role is to pump now oxygenated blood into the lungs
through the pulmonary artery (think "left--lung").

Importantly, the right and left ventricles contract simultaneously, and so in consideration
of the cardiac cycle the events that are occurring on one side of the heart are equivalent to
the events occurring on the other side of the heart. However, the ventricles contract
shortly after the atria. The sino-atrial node sends out electrical waves of excitation to both
atria, and it is prevented from flowing into the ventricles by strands of non-conducting
fibrous tissue situated laterally from the tricuspid/bicuspid valves to the septum. These
waves of excitation travel towards the septum and into the atrio-ventricular node, where
they are held for roughly 0.1 seconds. They are then discharged down the bundle of his,
then down the purkinje tissue, which are both situated inside the septum. The waves flow

c
%ct%  ctc + c "ctc  tc c ctc i  !c itctc $til
c   i!c
tctct tc$til c  tl-ci c t ctc%llc*%c tc"ctc tc

Ê  



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that was accumulating in the left atrium. The isovolumic relaxation time (IV
T) is the
interval from the aortic component of the second heart sound, that is, closure of the aortic
valve, to onset of filling by opening of the mitral valve.7] Likewise, when the pressure in
the right ventricle drops below that in the right atrium, the tricuspid valve opens, and the
right ventricle fills with blood that was accumulating in the right atrium. During diastole
the pressure within the myocardium is lower than that in aorta, allowing blood to circulate
in the heart itself via the coronary arteries.

p
   

 

Cardiac muscle has automaticity, which means that it is self-exciting. (You could also call
it "myogenic" tissue. Meaning a tissue able of creating its own excitement.) This is in
contrast with skeletal muscle, which requires either conscious or reflex nervous stimuli
for excitation. The heart's rhythmic contractions occur spontaneously, although the rate of
contraction can be changed by nervous or hormonal influences, exercise and emotions.
For example, the sympathetic nerves to accelerate heart rate and the vagus nerve
decelerates heart rate.

The rhythmic sequence of contractions is coordinated by the sinoatrial (GA) and

atrioventricular (AV) nodes. The sinoatrial node, often known as the


c

 ,
is located in the upper wall of the right atrium and is responsible for the wave of electrical
stimulation that initiates atrial contraction by creating an action potential. Once the wave
reaches the AV node, situated in the lower right atrium, it is delayed there before being
conducted through the bundles of   and back up the Purkinje fibers, leading to a
contraction of the ventricles. The delay at the AV node allows enough time for all of the
blood in the atria to fill their respective ventricles. In the event of severe pathology, the
AV node can also act as a pacemaker; this is usually not the case because their rate of
spontaneous firing is considerably lower than that of the pacemaker cells in the GA node
and hence is overridden.

0(%c7%&%c
A 20(%c7%&% is a medical device that indirectly monitors the oxygen saturation of a
patient's blood (as opposed to measuring oxygen saturation directly through a blood
sample) and changes in blood volume in the skin, producing a photoplethysmograph. It is

c
often attached to a medical monitor so staff can see a patient's oxygenation at all times.
Most monitors also display the heart rate. Portable, battery-operated pulse oximeters are
also available for home blood-oxygen monitoring. The original oximeter was made by
Millikan in the 1940s.1] The precursor to today's modern pulse oximeter was developed
in 197, by Aoyagi at Nihon Kohden using the ratio of red to infrared light absorption of
pulsating components at the measuring site. It was commercialized by Biox in 1981. The
device did not see wide adoption in the United Gtates until the late 1980s.

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4

A blood-oxygen monitor displays the percentage of arterial hemoglobin in the

oxyhemoglobin configuration. Acceptable normal ranges are from 9 to 100 percent,
although values down to 90% are common. For a patient breathing room air, at not far
above sea level, an estimate of arterial pO can be made from the blood-oxygen monitor
GpO reading.

A pulse oximeter is a particularly convenient noninvasive measurement instrument.

Typically it has a pair of small light-emitting diodes (L Ds) facing a photodiode through
a translucent part of the patient's body, usually a fingertip or an earlobe. One L D is red,
with wavelength of 660 nm, and the other is infrared, 90, 910, or 940 nm. Absorption at
these wavelengths differs significantly between oxyhemoglobin and its deoxygenated
form; therefore, the oxy/deoxyhemoglobin ratio can be calculated from the ratio of the
absorption of the red and infrared light. The absorbance of oxyhemoglobin and

c
deoxyhemoglobin is the same (isosbestic point) for the wavelengths of 90 and 80 nm;
earlier oximeters used these wavelengths for correction for hemoglobin concentration.]

The monitored signal bounces in time with the heart beat because the arterial blood
vessels expand and contract with each heartbeat. By examining only the varying part of
the absorption spectrum (essentially, subtracting minimum absorption from peak
absorption), a monitor can ignore other tissues or nail polish, (though black nail polish
tends to distort readings)3] and discern only the absorption caused by arterial blood. Thus,
detecting a pulse is essential to the operation of a pulse oximeter and it will not function if
there is none.

Ê



A pulse oximeter is useful in any setting where a patient's oxygenation is unstable,

including intensive care, operating, recovery, emergency and hospital ward settings, pilots
in unpressurized aircraft, for assessment of any patient's oxygenation, and determining the
effectiveness of or need for supplemental oxygen. Assessing a patient's need for oxygen
is the most essential element to life; no human life thrives in the absence of oxygen
(cellular or gross). Although a pulse oximeter is used to monitor oxygenation, it cannot
determine the metabolism of oxygen, or the amount of oxygen being used by a patient.
For this purpose, it is necessary to also measure carbon dioxide (CO) levels. It is possible
that it can also be used to detect abnormalities in ventilation. However, the use of a pulse
oximeter to detect hypoventilation is impaired with the use of supplemental oxygen, as it
is only when patients breathe room air that abnormalities in respiratory function can be
detected reliably with its use. Therefore, the routine administration of supplemental
oxygen may be unwarranted if the patient is able to maintain adequate oxygenation in
room air, since it can result in hypoventilation going undetected.

Because of their simplicity and speed, pulse oximeters are of critical importance in
emergency medicine and are also very useful for patients with respiratory or cardiac
problems, especially COPD, or for diagnosis of some sleep disorders such as apnea and
hypopnea. Portable battery-operated pulse oximeters are useful for pilots operating in a
non-pressurized aircraft above 10,000 feet (1,00 feet in the UG)4] where supplemental
oxygen is required. Prior to the oximeter's invention, many complicated blood tests
needed to be performed. Portable pulse oximeters are also useful for mountain climbers
and athletes whose oxygen levels may decrease at high altitudes or with exercise. Gome

c
portable pulse oximeters employ software that charts a patient's blood oxygen and pulse,
serving as a reminder to check blood oxygen levels.

þ

 Ê


Oximetry is not a complete measure of respiratory sufficiency. A patient suffering from

hypoventilation (poor gas exchange in the lungs) given 100% oxygen can have excellent
blood oxygen levels while still suffering from respiratory acidosis due to excessive
carbon dioxide.

It is also not a complete measure of circulatory sufficiency. If there is insufficient

bloodflow or insufficient hemoglobin in the blood (anemia), tissues can suffer hypoxia
despite high oxygen saturation in the blood that does arrive.

A higher level of methemoglobin will tend to cause a pulse oximeter to read closer to
8% regardless of the true level of oxygen saturation. It also should be noted that the
inability of two-wavelength saturation level measurement devices to distinguish
carboxyhemoglobin due to carbon monoxide poisoning from oxyhemoglobin must be
taken into account when diagnosing a patient in emergency rescue, e.g., from a fire in an
apartment. A Pulse CO-oximeter measures absorption at additional wavelengths to
distinguish CO from O and determines the blood oxygen saturation more reliably.


 



According to a report by Frost & Gullivan entitled à c c   c ¢  c

 c ¢  , UG sales of oximeters were worth $01 million in 006. The report
estimated that oximeter sales in the UG would increase to $310 million annually by
013.]

In 008, more than half of the major internationally-exporting medical equipment

manufacturers in China were producers of pulse oximeters.6]

In June, 009, video game company Nintendo announced an upcoming peripheral for the
Wii console, dubbed the "Vitality Gensor," which consists of a pulse oximeter. This marks
the onset of the use of this device for non-medical, entertainment purposes.7]8]

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 The heart beat was sensed with help of an L D and LD
arrangement. The L D
used here is a high intensity type L D. Here the LD
is the sensor.

As Gensor a photo diode or a photo transistor can be used. The skin may be
illuminated with visible (red) or infrared L Ds using transmitted or reflected light for
detection. The very small changes in reflectivity or in transmittance caused by the varying
blood content of human tissue are almost invisible. Various noise sources may produce
disturbance signals with amplitudes equal or even higher than the amplitude of the pulse
signal. Valid pulse measurement therefore requires extensive preprocessing of the raw
signal.
The new signal processing approach presented here combines analog and digital
signal processing in a way that both parts can be kept simple but in combination are very
effective in suppressing disturbance signals. The setup described here uses a red L D for
transmitted light illumination and a LD
as detector. With only slight changes in the
preamplifier circuit the same hard- and software could be used with other illumination
and detection concepts. The detectors photo current (AC Part) is converted to voltage and
amplified by an operational amplifier (LM38).
c
#$c

The #$ is an integrated circuit that converts signals from an
G-3 serial port to
signals suitable for use in TTL compatible digital logic circuits. The MAX3 is a dual
driver/receiver and typically converts the
X, TX, CTG and
TG signals.

The drivers provide
G-3 voltage level outputs (approx. 7. V) from a single +  V
supply via on-chip charge pumps and external capacitors. This makes it useful for
implementing
G-3 in devices that otherwise do not need any voltages outside the 0 V
to +  V range, as power supply design does not need to be made more complicated just
for driving the
G-3 in this case.

The receivers reduce
G-3 inputs (which may be as high as  V), to standard  V
TTL levels. These receivers have a typical threshold of 1.3 V, and a typical hysteresis of
0. V.

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The later MAX3A is backwards compatible with the original MAX3 but may
operate at higher baud rates and can use smaller external capacitors ± 0.1 ȝF in place of
the 1.0 ȝF capacitors used with the original device.1]

The newer MAX33 is also backwards compatible, but operates at a broader voltage
range, from 3 to . V. ]

J%8&Mc&%c%?%(c

It is helpful to understand what occurs to the voltage levels. When a MAX3 IC receives
a TTL level to convert, it changes a TTL Logic 0 to between +3 and +1 V, and changes
TTL Logic 1 to between -3 to -1 V, and vice versa for converting from
G3 to TTL.
This can be confusing when you realize that the
G3 Data Transmission voltages at a
certain logic state are opposite from the
G3 Control Line voltages at the same logic
state. To clarify the matter, see the table below. For more information see
G-3
Voltage Levels.

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$c!)%c32%c c!c!%?%c
&%c #$c
Data Transmission (
x/Tx) Logic 0 +3 V to +1 V 0 V
Data Transmission (
x/Tx) Logic 1 -3 V to -1 V  V
Control Gignals (
TG/CTG/DT
/DG
)
-3 V to -1 V  V
Logic 0
Control Gignals (
TG/CTG/DT
/DG
)
+3 V to +1 V 0 V
Logic 1
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n telecommunication and computer science, &9%c)%2&c1c(%c0)&) is the
process of sending data one bit at a time, sequentially, over a communication channel or
computer bus. This is in contrast to parallel communication, where several bits are sent as

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a whole, on a link with several parallel channels. Gerial communication is used for all
long-haul communication and most computer networks, where the cost of cable and
synchronization difficulties make parallel communication impractical. Gerial computer
buses are becoming more common even at shorter distances, as improved signal integrity
and transmission speeds in newer serial technologies have begun to outweigh the parallel
bus's advantage of simplicity (no need for serializer and deserializer, or GerDes) and to
outstrip its disadvantages (clock skew, interconnect density).

G
  



The communication links across which computers or parts of computers talk to one
another may be either serial or parallel. A parallel link transmits several streams of data
(perhaps representing particular bits of a stream of bytes) along multiple channels (wires,
printed circuit tracks, optical fibres, etc.); a serial link transmits a single stream of data.

At first sight it would seem that a serial link must be inferior to a parallel one, because it
can transmit less data on each clock tick. However, it is often the case that serial links can
be clocked considerably faster than parallel links, and achieve a higher data rate. A
number of factors allow serial to be clocked at a greater rate:

rc Clock skew between different channels is not an issue (for unclocked

asynchronous serial communication links)
rc A serial connection requires fewer interconnecting cables (e.g. wires/fibres) and
hence occupies less space. The extra space allows for better isolation of the
channel from its surroundings

rc Crosstalk is less of an issue, because there are fewer conductors in proximity.

In many cases, serial is a better option because it is cheaper to implement. Many ICs have
serial interfaces, as opposed to parallel ones, so that they have fewer pins and are
therefore less expensive.

In telecommunications, >$ (
ecommended Gtandard 3) is the traditional name for

a series of standards for serial binary single-ended data and control signals connecting
between a ›  (Data Terminal quipment) and a ›
 (Data Circuit-terminating
quipment). It is commonly used in computer serial ports. The standard defines the

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size and pinout of connectors. The current version of the standard is c 
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 issued in 1997

G   



The lectronic Industries Association ( IA) standard
G-3-C1] as of 1969 defines:

rc lectrical signal characteristics such as voltage levels, signaling rate, timing and
slew-rate of signals, voltage withstand level, short-circuit behavior, and maximum
load capacitance.
rc Interface mechanical characteristics, pluggable connectors and pin identification.
rc Functions of each circuit in the interface connector.
rc Gtandard subsets of interface circuits for selected telecom applications.

The standard does not define such elements as

rc character encoding (for example, AGCII, Baudot code or BCDIC)

rc the framing of characters in the data stream (bits per character, start/stop bits,
parity)
rc protocols for error detection or algorithms for data compression
rc bit rates for transmission, although the standard says it is intended for bit rates
lower than 0,000 bits per second. Many modern devices support speeds of
11,00 bit/s and above
rc power supply to external devices.

Details of character format and transmission bit rate are controlled by the serial port
hardware, often a single integrated circuit called a UA
T that converts data from parallel
to asynchronous start-stop serial form. Details of voltage levels, slew rate, and short-
circuit behavior are typically controlled by a line driver that converts from the UA
T's
logic levels to
G-3 compatible signal levels, and a receiver that converts from
G-3
compatible signal levels to the UA
T's logic levels.

c


G-3 was first introduced in 196.] The original DT s were electromechanical

teletypewriters and the original DC s were (usually) modems. When electronic terminals
(smart and dumb) began to be used, they were often designed to be interchangeable with
teletypes, and so supported
G-3. The C revision of the standard was issued in 1969 in
part to accommodate the electrical characteristics of these devices.

Gince application to devices such as computers, printers, test instruments, and so on was
not considered by the standard, designers implementing an
G-3 compatible interface
on their equipment often interpreted the requirements idiosyncratically. Common
problems were non-standard pin assignment of circuits on connectors, and incorrect or
missing control signals. The lack of adherence to the standards produced a thriving
industry of breakout boxes, patch boxes, test equipment, books, and other aids for the
connection of disparate equipment. A common deviation from the standard was to drive
the signals at a reduced voltage: the standard requires the transmitter to use +1 V and
í1 V, but requires the receiver to distinguish voltages as low as +3 V and -3 V. Gome
manufacturers therefore built transmitters that supplied + V and - V and labeled them
as "
G-3 compatible."

Later personal computers (and other devices) started to make use of the standard so that
they could connect to existing equipment. For many years, an
G-3-compatible port
was a standard feature for serial communications, such as modem connections, on many
computers. It remained in widespread use into the late 1990s. In personal computer
peripherals it has largely been supplanted by other interface standards, such as UGB.
G-
3 is still used to connect older designs of peripherals, industrial equipment (such as
PLCs), console ports and special purpose equipment such as a cash drawer for a cash
register.

The standard has been renamed several times during its history as the sponsoring
organization changed its name, and has been variously known as IA
G-3, IA 3,
and most recently as TIA 3. The standard continued to be revised and updated by the
lectronic Industries Alliance and since 1988 by the Telecommunications Industry
Association (TIA).3]
evision C was issued in a document dated August 1969.
evision
D was issued in 1986. The current revision is c  
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, issued in 1997. Changes since
evision C have been in timing and
details intended to improve harmonization with the CCITT standard V.4, but equipment
built to the current standard will interoperate with older versions.

þ
   



Because the application of
G-3 has extended far beyond the original purpose of
interconnecting a terminal with a modem, successor standards have been developed to
address the limitations. Issues with the
G-3 standard include:4]

rc The large voltage swings and requirement for positive and negative supplies
increases power consumption of the interface and complicates power supply
design. The voltage swing requirement also limits the upper speed of a compatible
interface.
rc Gingle-ended signaling referred to a common signal ground limits the noise
immunity and transmission distance.
rc Multi-drop connection among more than two devices is not defined. While multi-
drop "work-arounds" have been devised, they have limitations in speed and
compatibility.
rc Asymmetrical definitions of the two ends of the link make the assignment of the
role of a newly developed device problematic; the designer must decide on either
a DT -like or DC -like interface and which connector pin assignments to use.
rc The handshaking and control lines of the interface are intended for the setup and
takedown of a dial-up communication circuit; in particular, the use of handshake
lines for flow control is not reliably implemented in many devices.
rc No method is specified for sending power to a device. While a small amount of
current can be extracted from the DT
and
TG lines, this is only suitable for low
power devices such as mice.
rc The -way connector recommended in the standard is large compared to current
practice.

G

 


In
G-3, user data is sent as a time-series of bits. Both synchronous and asynchronous
transmissions are supported by the standard. In addition to the data circuits, the standard
defines a number of control circuits used to manage the connection between the DT and

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on the
G-3 interface, and provide sufficient current to comply with the slew rate
requirements for data transmission.

Because both ends of the
G-3 circuit depend on the ground pin being zero volts,
problems will occur when connecting machinery and computers where the voltage
between the ground pin on one end, and the ground pin on the other is not zero. This may
also cause a hazardous ground loop. Use of a common ground limits
G-3 to
applications with relatively short cables. If the two devices are far enough apart or on
separate power systems, the local ground connections at either end of the cable will have
differing voltages; this difference will reduce the noise margin of the signals. Balanced,
differential, serial connections such as UGB,
G-4 and
G-48 can tolerate larger
ground voltage differences because of the differential signaling.6]

Unused interface signals terminated to ground will have an undefined logic state. Where
it is necessary to permanently set a control signal to a defined state, it must be connected
to a voltage source that asserts the logic 1 or logic 0 level. Gome devices provide test
voltages on their interface connectors for this purpose.

))%&(c

G-3 devices may be classified as Data Terminal quipment (DT ) or Data

Communication quipment (DC ); this defines at each device which wires will be
sending and receiving each signal. The standard recommended but did not make
mandatory the D-subminiature  pin connector. In general and according to the standard,
terminals and computers have male connectors with DT pin functions, and modems
have female connectors with DC pin functions. Other devices may have any
combination of connector gender and pin definitions. Many terminals were manufactured
with female terminals but were sold with a cable with male connectors at each end; the
terminal with its cable satisfied the recommendations in the standard.

Presence of a  pin D-sub connector does not necessarily indicate an
G-3-C

compliant interface. For example, on the original IBM PC, a male D-sub was an
G-3-
C DT port (with a non-standard current loop interface on reserved pins), but the female
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put non-standard voltages or signals on some pins of their serial ports.

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FIG 4.10:
GULATO
CI
CUIT

A discrete voltage regulator fabricated on a single chip, it is called monolithic voltage

regulator. These regulators have:
‡c High performance (ideal 100% regulation)
‡c Low cost.
‡c
educed size.
‡c asier to use.
Usually monolithic voltage regulator is available as 3 terminals IC780 as shown in
below figure. The 3 terminals are denoted as IN (input), COM (common), OUT (output).
This +V regulator is useful in power up to 00mw.It must have a heat sink for high
current. A 1mf high quality and tantalum capacitor should be placed from output to
ground for stability. By using this regulator circuit we are deriving v from 1v battery.
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Transformers convert AC electricity from one voltage to another with little loss of
power. Transformers work only with AC and this is one of the reasons why mains
electricity is AC. Gtep-up transformers increase voltage, step-down transformers reduce
voltage. Most power supplies use a step-down transformer to reduce the dangerously high
mains voltage (30V in India) to a safer low voltage. The input coil is called the primary
and the output coil is called the secondary. There is no electrical connection between the
two coils; instead they are linked by an alternating magnetic field created in the soft-iron

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core of the transformer. Transformers waste very little power so the power out is (almost)
equal to the power in. Note that as voltage is stepped down current is stepped up. The
transformer will step down the power supply voltage (0-30V) to (0- 1V) level. Then the
secondary of the potential transformer will be connected to the bridge rectifier, which is
constructed with the help of PN junction diodes. The advantages of using bridge rectifier
are it will give peak voltage output as DC.
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There are several ways of connecting diodes to make a rectifier to convert AC to
DC. The bridge rectifier is the most important and it produces full-wave varying DC. A
full-wave rectifier can also be made from just two diodes if a centre-tap transformer is
used, but this method is rarely used now that diodes are cheaper. A single diode can be
used as a rectifier but it only uses the positive (+) parts of the AC wave to produce half-
wave varying DC
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A single diode can be used as a rectifier but this produces half-wave varying DC
which has gaps when the AC is negative. It is hard to smooth this sufficiently well to
supply electronic circuits unless they require a very small current so the smoothing
capacitor does not significantly discharge during the gaps

FIG.4.11:
CTIFYING CI
CUIT

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FIG.4.13: B
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When four diodes are connected as shown in figure, the circuit is called as bridge
rectifier. The input to the circuit is applied to the diagonally opposite corners of the
network, and the output is taken from the remaining two corners. Let us assume that the
transformer is working properly and there is a positive potential, at point A and a negative
potential at point B. the positive potential at point A will forward bias D3 and reverse bias
D4. The negative potential at point B will forward bias D1 and reverse D. At this time
D3 and D1 are forward biased and will allow current flow to pass through them; D4 and
D are reverse biased and will block current flow. One advantage of a bridge rectifier
over a conventional full-wave rectifier is that with a given transformer the bridge rectifier
produces a voltage output that is nearly twice that of the conventional full-wave circuit..
In the conventional full-wave circuit, the peak voltage from the centre tap to either X or Y
is 00 volts. Gince only one diode can conduct at any instant, the maximum voltage that

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can be rectified at any instant is 00 volts. The maximum voltage that appears across the
load resistor is nearly-but never exceeds-00 v0lts, as result of the small voltage drop
across the diode. In the bridge rectifier shown in view B, the maximum voltage that can
be rectified is the full secondary voltage, which is 1000 volts. Therefore, the peak output
voltage across the load resistor is nearly 1000 volts. With both circuits using the same
transformer, the bridge rectifier circuit produces a higher output voltage than the
conventional full-wave rectifier circuit.

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Gmoothing is performed by a large value electrolytic capacitor connected across
the DC supply to act as a reservoir, supplying current to the output when the varying DC
voltage from the rectifier is falling. The diagram shows the unsmoothed varying DC
(dotted line) and the smoothed DC (solid line). The capacitor charges quickly near the
peak of the varying DC, and then discharges as it supplies current to the output. Note that
smoothing significantly increases the average DC voltage to almost the peak value (1.4 ×

MG value). For example 6V
MG AC is rectified to full wave DC of about 4.6V
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(1.4V is lost in the bridge rectifier), with smoothing this increases to almost the peak
value giving 1.4 × 4.6 Î 6.4V smooth DC.

FIG.4.14: GMOOTHING WAV FO
M

Gmoothing is not perfect due to the capacitor voltage falls a little as it discharges,
giving a small ripple voltage. For many circuits a ripple which is 10% of the supply
voltage is satisfactory. A larger capacitor will give fewer ripples. The capacitor value
must be doubled when smoothing half-wave DC.
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 Voltage regulators comprise a class of widely used ICs.
egulator IC units contain
the circuitry for reference source, comparator amplifier, control device, and overload
protection all in a single IC. IC units provide regulation of either a fixed positive voltage,
a fixed negative voltage, or an adjustably set voltage. The regulators can be selected for
operation with load currents from hundreds of milli amperes to tens of amperes,
corresponding to power ratings from milli watts to tens of watts. A fixed three-terminal
voltage regulator has an unregulated dc input voltage, Vi, applied to one input terminal, a
regulated dc output voltage, Vo, from a second terminal, with the third terminal
connected to ground. The series 78 regulators provide fixed positive regulated voltages
from  to 4 volts. Gimilarly, the series 79 regulators provide fixed negative regulated
voltages from  to 4 volts.
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Voltage regulator ICs are available with fixed (typically , 1 and 1V) or
variable output voltages. They are also rated by the maximum current they can pass.
Negative voltage regulators are available, mainly for use in dual supplies. Most regulators
include some automatic protection from excessive current ('overload protection') and
overheating ('thermal protection'). Many of the fixed voltage regulator ICs has 3 leads and
look like power transistors, such as the 780 +V 1Amp regulator. They include a hole
for attaching a heat sink if necessary.
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FIG.4.1: IC VOLTAG
GULATO

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 For low current power supplies a simple voltage regulator can be made with a
resistor and a zener diode connected in reverse as shown in the diagram. Zener diodes are
rated by their breakdown voltage and maximum power (typically 400mW or 1.3W). The
resistor limits the current (like an L D resistor). The current through the resistor is
constant, so when there are no output current all the current flows through the zener diode
and its power rating must be large enough to withstand this.

FIG.4.16: Z N
DIOD
GULATO

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The ac voltage, typically 0V, is connected to a transformer, which steps down
that ac voltage down to the level of the desired dc output. A diode rectifier then provides
a full-wave rectified voltage that is initially filtered by a simple capacitor filter to produce
a dc voltage. This resulting dc voltage usually has some ripple or ac voltage variation..A
regulator circuit removes the ripples and also retains the same dc value even if the input
dc voltage varies, or the load connected to the output dc voltage changes. This voltage
regulation is usually obtained using one of the popular voltage regulator IC units.

FIG.4.17 BLOCK DIAG
AM OF POW
GUPPLY

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FIG.4.18 CI
CUIT DIAG
AM OF POW
GUPPLY

Virtually every piece of electronic equipment, e.g., computers and their

peripherals, calculators, TV and hi-fi equipment, and instruments, is powered from a DC
power source, be it a battery or a DC power supply. Most of this equipment requires not
only DC voltage but voltage that is also well filtered and regulated. Gince power supplies
are so widely used in electronic equipment, these devices now comprise a worldwide
segment of the electronics market in excess of $ billion annually.

There are three types of electronic power conversion devices in use today which are
classified as follows according to their input and output voltages:
'c DC/DC converter;
'c The AC/DC power supply;
'c The DC/AC inverter.

ach has its own area of use but this paper will only deal with the first two, which
are the most commonly used. A power supply converting AC line voltage to DC power
must perform the following functions at high efficiency and at low cost:
'c
ectification: Convert the incoming AC line voltage to DC voltage.
'c Voltage transformation: Gupply the correct DC voltage level(s).
'c Filtering: Gmooth the ripple of the rectified voltage.
'c
egulation: Control the output voltage level to a constant value irrespective of
line, load and temperature changes.
'c Isolation: Geparate electrically the output from the input voltage source.

c
 'c Protection: Prevent damaging voltage surges from reaching the output; provide
back-up power or shutdown during a brown-out.
An ideal power supply would be characterized by supplying a smooth and
constant output voltage regardless of variations in the voltage, load current or ambient
temperature at 100% conversion efficiency. Figure 1ccompares a real power supply to this
ideal one and further illustrates some power supply terms.

FIG.4.19:
AL POW
GUPPLY HAG

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COMPA
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GUPPLY

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Two common linear power supply circuits in current are used. Both circuits
employ full-wave rectification to reduce ripple voltage to capacitor C1. The bridge
rectifier circuit has a simple transformer but current must flow through two diodes. The
center-tapped configuration is preferred for low output voltages since there is just one
diode voltage drop. For V and 1V outputs, Gchottky barrier diodes are commonly used
since they have lower voltage drops than equivalently rated ultra-fast types, which further
increase power conversion efficiency. However, each diode must withstand twice the
reverse voltage that a diode sees in a full-wave bridge for the same input voltage. The
linear voltage regulator behaves as a variable resistance between the input and the output
as it provides the precise output voltage. One of the limitations to the efficiency of this
circuit is due to the fact that the linear device must drop the difference in voltage between
the input and output. Consequently the power dissipated by the linear device is (Vi±Vo) x
Io. While these supplies have many desirable characteristics, such as simplicity, low

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output ripple, excellent line and load regulation, fast response time to load or line changes
and low MI, they suffer from low efficiency and occupy large volumes.
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When the Keil ȝVision is used, the project development cycle is roughly the same as
it is for any other software development project.
'c Create source file in C or assembly
'c Build application with the project manager
'c Correct errors in source file
'c Test the linked application
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The ȝvision ID combines project managements, a rich featured editor with
interactive error correction, option setup make facility, and online help. Use ȝvision to
create source files and organize them into a project that defines your target application.ȝ
vision automatically compiles, assembles and links your embedded application and
provides a single focal point for your development efforts.
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Gource file created by ȝ vision ID and passed to the C1 compiler macro
assembler. The compiler and assembler process source files and create relocatable object
files. The keil C1 compiler is a full ANGI implementation of the C programming
language that supports all standard features of the C language.

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FIG. PCB D GIGNc

PCB design starts right from the selection of the laminates .The two main types of
base laminate are epoxy glass and phenolic paper laminates are generally used for
simple circuits. Though it is very cheap and can easily be drilled, phenolic paper has poor
electrical characteristics and it absorbs more moisture than epoxy glass. poxy glass has
highermechanicalstrength.

The important properties that have to be considered for selecting the PCB
substrate are the dielectric strength, insulation resistance, water absorption property,
coefficient of thermal expansion, shear strength, hardness, dimensional stability etc.

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The fabrication of a PCB includes four steps.
‡c Preparing the PCB pattern.
‡c Transferring the pattern onto the PCB.

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 ‡c Developing the PCB.
‡c Finishing (i.e.) drilling, cutting, smoothing, turning etc.
Pattern designing is the primary step in fabricating a PCB. In this step, all
interconnection between the components in the given circuit are converted into PCB
tracks. Geveral factors such as positioning the diameter of holes, the area that each
component would occupy, the type of end terminal should be considered.

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cccccccccThe copper side of the PCB should be thoroughly cleaned with the help of alcoholic
spirit or petrol. It must be completely free from dust and other contaminants.c
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The mirror image of the pattern must be carbon copied and to the laminate the
complete pattern may now be made each resistant with the help of paint and thin brush.c
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In this developing all excessive copper is removed from the board and only the printed
pattern is left behind. About 100ml of tap water should be heated to 7 ° C and 30.
grams of FeCl3 added to it, the mixture should be thoroughly stirred and a few drops of
HCl may be added to speed up the process.

The board with its copper side facing upward should be placed in a flat bottomed
plastic tray and the aqueous solution of FeCl poured in the etching process would take
40 to 60 min to complete.

After etching the board it should be washed under running water and then held against
light .the printed pattern should be clearly visible. The paint should be removed with the
help of thinner.

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After the etching is completed, hole of suitable diameter should be drilled, then
the PCB may be tin plated using an ordinary 3 Watts soldering rod along with the solder
core, the copper side may be given a coat of varnish to prevent oxidation.

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Drills for PCB use usually come with either a set of collects of various sizes or a
3-Jaw chuck. For accuracy however 3-jaw chunks aren¶t brilliant and small drill below 1
mm from grooves in the jaws preventing good grips.
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Begin the construction by soldering the resistors followed by the capacitors and
the L Ds diodes and IC sockets. Don¶t try soldering an IC directly unless you trust your
skill in soldering. All components should be soldered as shown in the figure. Now
connect the switch and then solder/screw if on the PCB using multiple washers or spaces.
Goldering it directly will only reduce its height above other components and hamper in its
easy fixation in the cabinet. Now connect the battery lead.
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The circuit can be enclosed in any kind of cabinet. Before fitting the PCB suitable
holes must be drilled in the cabinet for the switch, L D and buzzer. Note that a rotary
switch can be used instead of a slide type.

Gwitch on the circuit to be desired range. It will automatically start its timing
cycles. To be sure that it is working properly watch the L D flash. The components are
selected to trigger the alarm a few minutes before the set limit.

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'c Muhammad Ali Mazidi ±³TH 801 MIC
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'c Ayala- ³INT
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'c Keil C1 compiler user guide (Keil Goftware V3.60)

-$c+%'c!)(c
'c www.801.com
'c www.google.com
'c www.wikipedia.org
'c www.keil.com
'c www.datasheetarchive.com
'c www.atmel.com
'c www.801projects.info
'c www.801projects.net
'c www.rentron.com