CHAPTER 1

INTRODUCTION

1.1 EXISTING TECHNOLOGIES:

It is very important to be informed about the pollution levels anytime, especially
when they exceed certain limits that are considered unsafe. The Pollution Guard
system is designed to provide up-to-date information about pollution levels from
specific locations and send warnings whenever the composition of the air
becomes dangerous.
If a value of one of the substances presented in the air exceeds a certain
threshold value, then the GPRS data transmission takes place immediately.
The data communication is made through the GSM or GPRS network. CO, Co2
temperature sensors are used to collect the data about the air composition.
But the disadvantage of using this system is that the data will be sent to the
designated monitoring desktop which has not been designed to intimate the
concerned power plant of the excess emission of pollutants into the air
automatically. It also cannot control the excess emission of pollutants by the
power plant.

1.2 PROPOSED SYSTEM:

In our proposed method the continuous emissions is monitored as well as controlled.
The acquirement of data from the carbon monoxide, temperature, Carbon dioxide
provides therefore realistic information to the system. The data about the air
composition will be thus updated and automatically displayed on the website for each
location where a sensor panel is placed. The advantage in our system is that the
website can be accessed by the concerned person at anytime from anywhere with the
static port address given to him. The controller in turn does the intimating work on its
own. If the power plant does not respond the controller can shut down the power
supply to that plant with the help of relay.

1
Practically the air pollution data is being collected from every place in the country.

1.3 FUNCTIONAL BLOCK DIAGRAM:

CO2
Sensor

Figure1

Co
Sensor
The Block diagram of slave and master consisting of Microcontroller, CO,
Temperature, Carbon dioxides, LCD, GPRS Modem, web server is shown above.

Sensor Unit:
The Sensors are interfaced with microcontroller and The GPRS modem is interfaced
Temperature
with the controller via the standard serial port. The data from the carbon monoxide,

Sensor
Carbon dioxide, Temperature sensors provides relative information to controller.
Controllers are designed at hardware level.
If the controller predicted that the data is less or more than the critical limit the
Alerting message is send to the pre stored number in the microcontroller through SMS
and simultaneously the data is send to the server through GPRS modem.

2
 Monitoring Unit:
In this data will arrive at the server, it will be processed and updated and automatically
displayed on the website for each location where a sensor panel is placed. The data
communication is made through the GPRS network.

1.4 LITERATURE SURVEY:

The mainstay of this project to provide up-to date information about pollution

levels from specific locations like thermal power plant and send all relevant

data like CO, Temperature, CO2 to the Central Monitoring Unit through

Internet. By referring the following papers we were able to understand the

concepts clearly and do this project with less difficulty. Those papers are as

follows.

A wireless network based on the combination of Zigbee and GPRS by Shen

Lin; Shixiangquan; LingMing; Nanjing Univ. of Sci. & Technol., Nanjing in

+Shen Lin+Shi xia

which it is clearly stated that due to its low-power consumption,

low-cost, self-organization and powerful ability to route data, ZigBee, an

emerging wireless network technology, has plenty of applications; GPRS

(general packet radio service) network, a convenient way to access Internet,

covers widely nowadays. This paper combines GPRS and ZigBee to establish a

multi-mode network structure which employs GPRS as the data transmission

device in the wide-area while ZigBee in the local area. This kind of network

structure, providing a simple way to setup wireless network between terminal

equipment, remote devices and personal stuff, will make the data servicing
3
people freely. Developing Data Acquisition and Handling System for

continuous emission monitoring system from coal-fired power plant by

Haiming Zheng; Guiji Tang; Dept. of Mech. Eng., North China Electr. Power

Univ., Baoding in which he explains that Continuous emission monitoring

system (CEMS) measures and reports the sum of pollutant emissions from

stationary sources. Itpsilas a time-tested, efficient and reliable technique that

has been used and perfected during its three-decade applications in a variety of

industries. Today, the China EPA requires continuous monitoring of emissions

produced by coal-and oil-fired power plants, municipal and hazardous waste

incinerators, cement plants, as well as many other types of industrial sources.

The emissions data reported to the China EPA provide a continuous record that

can be used to guide further regulations and determine the compliance of

stationary sources with their emission limitations. Data acquisition and handling

system (DAHS) is an important part of CEMS. This paper expatiates the basic

structure of CEMS and DAHS function. We program DAHS for Beijing

Guohua power plant based on FIX configuration software, which works well.

CEMS Analyser Bias and Linearity Effects Study by Russell S. Berry Jack C.

Martin RMB Consulting & Research, Inc.Charles E. Dene Electric Power

Research Institute which explains us Over the last five years continuous

emissions monitoring system (CEMS) operators have raised concerns regarding

the sulfur dioxide (SO2) nitrogen oxides (NOx) and carbon dioxide (CO2)

measurements being made under the Acid Rain Program (40 CFR Part 75). In

4
part, these concerns have arisen due to difficulties frequently encountered when

conducting linearity tests. Part 75 CEMS operators have also raised concerns

about CEMS measurements as they relate to the determination of heat input into

the boilers and the subsequent impact on unit heat rate determinations and mass

emissions of SO2 (i.e., SO2 allowances). As a result of these concerns and

observations made by utilities nationwide, the Electric Power Research Institute

(EPRI) has been investigating possible CEMS analyzer biases and linearity

effects. This paper summarizes the results of a comprehensive laboratory study

conducted by EPRI to investigate possible CEMS measurement errors

associated with gaseous analyzer inferences and biases and dilution ratio

variability. The primary results of this study were the development of dilution

ratio correction algorithms and general guidelines for implementing the

algorithms on Part 75 dilution CEMS.

CHAPTER 2
MODULES ELUCIDATION:

2.1 MICROCONTROLLER:

MICROCONTROLLER FEATURES:

• 20K Bytes of In-System Reprogrammable Flash Memory

5
– Endurance: 1,000 Write/Erase Cycles
• Fully Static Operation: 0 Hz to 33 MHz
• 256 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-bit Timer/Counters
• Eight Interrupt Sources
• Low Power Idle and Power Down Modes

DESCRIPTION:
2.1 PIC16F877 MICROCONTROLLER CORE FEATURES:
 High performance RISC CPU
 Only 35 single word instructions to learn
 All single cycle instructions except for program branches which are two cycle
 Up to 8K x 14 words of FLASH Program Memory, Up to 368 x 8 bytes of Data
Memory (RAM) up to 256 x 8 bytes of EEPROM Data Memory
 Interrupt capability (up to 14 sources)
 Direct, indirect and relative addressing modes
 Power-on Reset (POR)
 Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
 Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable
operation
 Programmable code protection
 Power saving SLEEP mode
 Selectable oscillator options
 Low power, high speed CMOS FLASH/EEPROM technology
 In-Circuit Serial Programming (ICSP) via two pins
 Single 5V In-Circuit Serial Programming capability
 In-Circuit Debugging via two pins
 Processor read/write access to program memory
 Wide operating voltage range: 2.0V to 5.5V
6
  High Sink/Source Current: 25 mA
 Commercial, Industrial and Extended temperature ranges
 Low-power consumption:
○ < 0.6 mA typical @ 3V, 4 MHz
○ 20 μA typical @ 3V, 32 kHz
○ < 1 μA typical standby current

PIN DIAGRAM:

7
FIGURE 2
PERIPHERAL FEATURES:
• Timer0: 8-bit timer/counter with 8-bit prescaler
• Timer1: 16-bit timer/counter with prescaler, can be incremented during SLEEP via
external crystal/clock
• Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler
• Two Capture, Compare, PWM modules
- Capture is 16-bit, max resolution is 12.5 ns
- Compare is 16-bit, max resolution is 200 ns
- PWM max resolution is 10-bit
• 10-bit multi-channel Analog-to-Digital converter
• Synchronous Serial Port (SSP) with SPI (Master mode) and I2C (Master/Slave)
• Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI) with 9-bit
address detection
• Parallel Slave Port (PSP) 8-bits wide, with external RD, WR and CS controls.

BLOCK DIAGRAM:
8
 Figure3

PIN OUT DESCRIPTION:

9
 Table1

MEMORY ORGANIZATION

10
Data Memory Organization
The data memory is partitioned into multiple banks which contain the General Purpose
Registers and the Special Function Registers. Bits RP1 (STATUS<6>) and RP0
(STATUS<5>) are the bank select bits. Each bank extends up to 7Fh (128 bytes). The
lower locations of each bank are reserved for the Special Function Registers. Above
the Special Function Registers are General Purpose Registers, implemented as static
RAM. All implemented banks contain Special Function Registers. Some frequently
used Special Function Registers from one bank may be mirrored in another bank for
code reduction and quicker access.

11
GENERAL PURPOSE REGISTER:

REGISTER BANK SUMMARY:

12
REGISTER BANK (CONTINUED):

13
REGISTER BANK (CONTINUED):

14
Table 2

I/O PORTS:

15
Some pins for these I/O ports are multiplexed with an alternate function for the
peripheral features on the device. In general, when a peripheral is enabled, that pin may
not be used as a general purpose I/O pin.
PORTA and the TRISA Register
PORTA is a 6-bit wide, bi-directional port. The corresponding data direction register is
TRISA. Setting a TRISA bit (= 1) will make the corresponding PORTA pin an input
(i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing a TRISA
bit (= 0) will make the corresponding PORTA pin an output (i.e., put the contents of
the output latch on the selected pin).

PORTB and the TRISB Register

PORTB is an 8-bit wide, bi-directional port. The corresponding data direction register
is TRISB. Setting a TRISB bit (= 1) will make the corresponding PORTB pin an input
(i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing a TRISB
bit (= 0) will make the corresponding PORTB pin an output (i.e., put the contents of
the output latch on the selected pin).

PORTC and the TRISC Register

PORTC is an 8-bit wide, bi-directional port. The corresponding data direction register
is TRISC. Setting a TRISC bit (= 1) will make the corresponding PORTC pin an input
(i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing a TRISC
bit (= 0) will make the corresponding PORTC pin an output (i.e., put the contents of
the output latch on the selected pin).

PORTD and TRISD Registers

PORTD is an 8-bit port with Schmitt Trigger input buffers. Each pin is individually
configurable as an input or output.

PORTE and TRISE Register

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PORTE has three pins (RE0/RD/AN5, RE1/WR/AN6, and RE2/CS/AN7) which are
individually configurable as inputs or outputs. These pins have Schmitt Trigger input
buffers.
ADDRESSABLE UNIVERSAL SYNCHRONOUS ASYNCHRONOUS
RECEIVER
TRANSMITTER (USART):
The Universal Synchronous Asynchronous Receiver Transmitter (USART)
module is one of the two serial I/O modules. (USART is also known as a Serial
Communications Interface or SCI.) The USART can be configured as a full
duplex asynchronous system that can communicate with peripheral devices such
as CRT terminals and personal computers, or it can be configured as a half
duplex synchronous system that can communicate with peripheral devices such
as A/D or D/A integrated circuits, serial EPROM’s etc.
The USART can be configured in the following modes:
• Asynchronous (full duplex)
• Synchronous - Master (half duplex)
• Synchronous - Slave (half duplex)
Bit SPEN (RCSTA<7>) and bits TRISC<7:6> have to be set in order to
configure pins RC6/TX/CK and RC7/RX/DT as the Universal Synchronous
Asynchronous Receiver Transmitter.
TXSTA: TRANSMIT STATUS AND CONTROL REGISTER

Bit 7 CSRC: Clock Source Select bit

Asynchronous mode:
Don’t care
Synchronous mode:

17
1 = Master mode (clock generated internally from BRG)
0 = Slave mode (clock from external source)
Bit 6 TX9: 9-bit Transmit Enable bit
1 = Selects 9-bit transmission
0 = Selects 8-bit transmission
Bit 5 TXEN: Transmit Enable bit
1 = Transmit enabled
0 = Transmit disabled
Note: SREN/CREN overrides TXEN in SYNC mode.
Bit 4 SYNC: USART Mode Select bit
1 = Synchronous mode
0 = Asynchronous mode
Bit 3 Unimplemented: Read as '0'
Bit 2 BRGH: High Baud Rate Select bit
Asynchronous mode:
1 = High speed
0 = Low speed
Synchronous mode:
Unused in this mode
Bit 1 TRMT: Transmit Shift Register Status bit
1 = TSR empty
0 = TSR full
Bit 0 TX9D: 9th bit of Transmit Data, can be parity bit

RCSTA: RECEIVE STATUS AND CONTROL REGISTER:

18
Bit 7 SPEN: Serial Port Enable bit
1 = Serial port enabled (configures RC7/RX/DT and RC6/TX/CK pins as serial
port pins)
0 = Serial port disabled
Bit 6 RX9: 9-bit Receive Enable bit
1 = Selects 9-bit reception
0 = Selects 8-bit reception
Bit 5 SREN: Single Receive Enable bit
Asynchronous mode:
Don’t care
Synchronous mode - master:
1 = Enables single receive
0 = Disables single receive
This bit is cleared after reception is complete.
Synchronous mode - slave:
Don’t care
Bit 4 CREN: Continuous Receive Enable bit
Asynchronous mode:
1 = Enables continuous receive
0 = Disables continuous receive
Synchronous mode:
1 = Enables continuous receive until enable bit CREN is cleared (CREN
overrides SREN)
0 = Disables continuous receive
Bit 3 ADDEN: Address Detect Enable bit
Asynchronous mode 9-bit (RX9 = 1):

19
1 = Enables address detection, enables interrupt and load of the receive buffer
when RSR<8> is set
0 = Disables address detection, all bytes are received, and ninth bit can be used
as parity bit
Bit 2 FERR: Framing Error bit
1 = Framing error (can be updated by reading RCREG register and receive next
valid byte)
0 = No framing error
Bit 1 OERR: Overrun Error bit
1 = Overrun error (can be cleared by clearing bit CREN)
0 = No overrun error
Bit 0 RX9D: 9th bit of Received Data (can be parity bit, but must be calculated
by user firmware)
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown

USART ASYNCHRONOUS MODE

In this mode, the USART uses standard non-return-to zero (NRZ) format (one
START bit, eight or nine data bits, and one STOP bit). The most common data
format is 8-bits. An on-chip, dedicated, 8-bit baud rate generator can be used to
derive standard baud rate frequencies from the oscillator. The USART transmits
and receives the LSB first. The transmitter and receiver are functionally
independent, but use the same data format and baud rate. The baud rate
generator produces a clock, either x16 or x64 of the bit shift rate, depending on
bit BRGH (TXSTA<2>). Parity is not supported by the hardware, but can be
implemented in software (and stored as the ninth data bit). Asynchronous mode
is stopped during SLEEP. Asynchronous mode is selected by clearing bit SYNC
(TXSTA<4>).
USART ASYNCHRONOUS TRANSMITTER:

20
The heart of the transmitter is transmitting (serial) shift register (TSR). The shift
register obtains its data from the read/write transmit buffer, TXREG. The
TXREG register is loaded with data in software. The TSR register is not loaded
until the STOP bit has been transmitted from the previous load. As soon as the
STOP bit is transmitted, the TSR is loaded with new data from the TXREG
register (if available). Once the
TXREG register transfers the data to the TSR register (occurs in one TCY), the
TXREG register is empty and flag bit TXIF (PIR1<4>) is set. This interrupt can
be enabled/disabled by setting/clearing enable bit TXIE (PIE1<4>). Flag bit
TXIF will be set, regardless of the state of enable bit TXIE and cannot be
cleared in software.
It will reset only when new data is loaded into the TXREG register. While flag
bit TXIF indicates the status of the TXREG register, another bit TRMT
(TXSTA<1>) shows the status of the TSR register. Status bit TRMT is a read
only bit, which is set when the TSR register is empty. No interrupt logic is tied
to this bit, so the user has to poll this bit in order to determine if the TSR register
is empty. Transmission is enabled by setting enable bit TXEN (TXSTA<5>).
The actual transmission will not occur until the TXREG register has been loaded
with data and the baud rate generator (BRG) has produced a shift clock (Figure
10-2). The transmission can also be started by first loading the TXREG register
and then setting enable bit TXEN. Normally, when transmission is first started,
the TSR register is empty. At that point, transfer to the TXREG register will
result in an immediate transfer to TSR, resulting in an empty TXREG. A back-
to-back transfer is thus possible. Clearing enable bit TXEN during a
transmission will cause the transmission to be aborted and will reset the
transmitter. As a result, the RC6/TX/CK pin will revert to hi-impedance. In
order to select 9-bit transmission, transmit bit TX9 (TXSTA<6>) should be set
and the ninth bit should be written to TX9D (TXSTA<0>). The ninth bit must be
written before writing the 8-bit data to the TXREG register. This is because a
data write to the TXREG register can result in an immediate transfer of the data
21
to the TSR register (if the TSR is empty). In such a case, an incorrect ninth data
bit may be loaded in the TSR register.
USART ASYNCHRONOUS RECEIVER
The data is received on the RC7/RX/DT pin and drives the data recovery block.
The data recovery block is actually a high speed shifter, operating at x16 times
the baud rate; whereas, the main receive serial shifter operates at the bit rate or at
FOSC.
Once Asynchronous mode is selected, reception is enabled by setting bit CREN
(RCSTA<4>). The heart of the receiver is receiving (serial) shift register (RSR).
After sampling the STOP bit, the received data in the RSR is transferred to the
RCREG register (if it is empty). If the transfer is complete, flag bit RCIF
(PIR1<5>) is set. The actual interrupt can be enabled/ disabled by
setting/clearing enable bit RCIE (PIE1<5>). Flag bit RCIF is a read only bit,
which is cleared by the hardware. It is cleared when the RCREG register has
been read and is empty. The RCREG is a double buffered register (i.e., it is a
two deep FIFO). It is possible for two bytes of data to be received and
transferred to the RCREG FIFO and a third byte to begin shifting to the RSR
register. On the detection of the STOP bit of the third byte, if the RCREG
register is still full, the overrun error bit OERR (RCSTA<1>) will be set. The
word in the RSR will be lost. The RCREG register can be read twice to retrieve
the two bytes in the FIFO. Overrun bit OERR has to be cleared in software. This
is done by resetting the receive logic (CREN is cleared and then set). If bit
OERR is set, transfers from the RSR register to the RCREG register are
inhibited, and no further data will be received. It is therefore, essential to clear
error bit OERR if it is set. Framing error bit FERR (RCSTA<2>) is set if a
STOP bit is detected as clear. Bit FERR and the 9th receive bit are buffered the
same way as the receive data. Reading the RCREG will load bits RX9D and
FERR with new values, therefore, it is essential for the user to read the RCSTA
register before reading the RCREG register in order not to lose the old FERR
and RX9D information.
22
ANALOG-TO-DIGITAL CONVERTER (A/D) MODULE
The Analog-to-Digital (A/D) Converter module has eight inputs for the 40-pin
devices and eight for the other devices. The analog input charges a sample and
hold capacitor. The output of the sample and hold capacitor is the input into the
converter. The converter then generates a digital result of this analog level via
successive approximation.
The A/D conversion of the analog input signal results in a corresponding 10-bit
digital number. The A/D module has high and low voltage reference input that is
software selectable to some combination of VDD, VSS, RA2, or RA3. The A/D
converter has a unique feature of being able to operate while the device is in
SLEEP mode. To operate
in SLEEP, the A/D clock must be derived from the A/D’s internal RC oscillator.
The A/D module has four registers. These registers are:
• A/D Result High Register (ADRESH)
• A/D Result Low Register (ADRESL)
• A/D Control Register0 (ADCON0)
• A/D Control Register1 (ADCON1)

ADCON0 REGISTER:

Bit 7-6 ADCS1:ADCS0: A/D Conversion Clock Select bits

00 = FOSC/2
01 = FOSC/8
10 = FOSC/32
11 = FRC (clock derived from the internal A/D module RC oscillator)

23
Bit 5-3 CHS2:CHS0: Analog Channel Select bits
000 = channel 0, (RA0/AN0)
001 = channel 1, (RA1/AN1)
010 = channel 2, (RA2/AN2)
011 = channel 3, (RA3/AN3)
100 = channel 4, (RA5/AN4)
101 = channel 5, (RE0/AN5) (1)
110 = channel 6, (RE1/AN6) (1)
111 = channel 7, (RE2/AN7) (1)
Bit 2 GO/DONE: A/D Conversion Status bit
If ADON = 1:
1 = A/D conversion in progress (setting this bit starts the A/D conversion)
0 = A/D conversion not in progress (this bit is automatically cleared by hardware
when the A/D conversion is complete)
Bit 1 Unimplemented: Read as '0'
Bit 0 ADON: A/D on bit

1 = A/D converter module is operating

0 = A/D converter module is shut-off and consumes no operating current
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown
ADCON1 REGISTER:

Bit 7 ADFM: A/D Result Format Select bit

1 = Right justified. 6 Most Significant bits of ADRESH are read as ‘0’.
0 = Left justified. 6 Least Significant bits of ADRESL are read as ‘0’.

24
Bit 6-4 Unimplemented: Read as '0'
Bit 3-0 PCFG3:PCFG0: A/D Port Configuration Control bits:
The ADRESH: ADRESL registers contain the 10-bit result of the A/D
conversion. When the A/D conversion is complete, the result is loaded into this
A/D result register pair, the GO/DONE bit (ADCON0<2>) is cleared and the
A/D interrupt flag bit ADIF is set. The block diagram of the A/D module is
shown in Figure. After the A/D module has been configured as desired, the
selected channel must be acquired before the conversion is started. The analog
input channels must have their corresponding TRIS bits selected as inputs. To
determine sample time, after this acquisition time has elapsed, the A/D
conversion can be started.

A/D CONVERSIONS

Clearing the GO/DONE bit during a conversion will abort the current
conversion. The A/D result register pair will NOT be updated with the partially

25
completed A/D conversion sample. That is, the ADRESH: ADRESL registers
will continue to contain the value of the last completed conversion (or the last
value written to the ADRESH: ADRESL registers). After the A/D conversion is
aborted, a 2TAD wait is required before the next acquisition is started. After this
2TAD wait, acquisition on the selected channel is automatically started. The
GO/DONE bit can then be set to start the conversion.
A/D RESULT REGISTERS:
The ADRESH: ADRESL register pair is the location where the 10-bit A/D result
is loaded at the completion of the A/D conversion. This register pair is 16-bits
wide.
The A/D module gives the flexibility to left or right justify the 10-bit result in
the 16-bit result register. The A/D Format Select bit (ADFM) controls this
justification.
Figure 11-4 shows the operation of the A/D result justification. The extra bits are
loaded with ’0’s’. When an A/D result will not overwrite these locations (A/D
disable), these registers may be used as two general purpose 8-bit registers

2.2 TEMPERATURE SENSOR

The LM35 series are precision integrated-circuit temperature sensors, whose
output voltage is linearly proportional to the Celsius (Centigrade) temperature.

26
The LM35 thus has an advantage over linear temperature sensors calibrated in °
Kelvin, as the user is not required to subtract a large constant voltage from its
output to obtain convenient Centigrade scaling.

Figure 5
The LM35 does not require any external calibration or trimming to provide
typical accuracies of ±¼°C at room temperature and ±¾°C over a full -55 to
+150°C temperature range. Low cost is assured by trimming and calibration at
the wafer level. The LM35's low output impedance, linear output, and precise
inherent calibration make interfacing to readout or control circuitry especially
easy. It can be used with single power supplies, or with plus and minus supplies.
As it draws only 60 µA from its supply, it has very low self-heating, less than
0.1°C in still air. The LM35 is rated to operate over a -55° to +150°C
temperature range, while the LM35C is rated for a -40° to +110°C range (-10°
with improved accuracy). The LM35 series is available packaged in hermetic
TO-46 transistor packages, while the LM35C, LM35CA, and LM35D are also
available in the plastic TO-92 transistor package. The LM35D is also available
in an 8-lead surface mount small outline package and a plastic TO-220 package.
Features

• Calibrated directly in ° Celsius (Centigrade)

27
• Linear + 10.0 mV/°C scale factor
• 0.5°C accuracy guarantee able (at +25°C)
• Rated for full -55° to +150°C range
• Suitable for remote applications
• Low cost due to wafer-level trimming
• Operates from 4 to 30 volts
• Low self-heating, 0.08°C in still air
• Nonlinearity only ±¼°C typical

Parameters Values

1,Temperature Accuracy (+/-) 1, 0.5 deg C

2,Temperature Min -40, 0, -55 deg C

3,Temperature Max 100, 110, 150 deg C

4,Sensor Gain 10 mV/Deg C

5,Supply Max 30 Volt Single Supply

6,Output Impedance 0.4 Ohm

7,Quiescent Current 0.056 mA

8,Automotive Selection Guide Yes

9,Quiescent Current 56 uA

10,Supply Min 4 Volt

28
2.2 CO2 SENSOR:
A carbon dioxide sensor or CO2 sensor is an instrument for the measurement
of carbon dioxide gas. The most common principles for CO2 sensors are infrared
gas sensors (NDIR) and chemical gas sensors. Measuring carbon dioxide is
important in monitoring Indoor air quality and many industrial processes.

Nondispersive Infrared (NDIR) CO2 Sensors

NDIR sensors are spectroscopic sensors to detect CO2 in a gaseous environment

by its characteristic absorption. The key components are an infrared source, a
light tube, an interference (wavelength) filter, and an infrared detector. The gas
is pumped or diffuses into the light tube and the electronics measures the
absorption of the characteristic wavelength of light. NDIR sensors are most
often used for measuring carbon dioxide.[1] The best of these have sensitivities of
20-50 PPM.[1] Typical NDIR sensors are still in the (US) $100 to $1000 range.
New developments include using Microelectromechanical systems to bring
down the costs of this sensor and to create smaller devices (for example for use
in air conditioning applications).

Chemical CO2 Sensors

Chemical CO2 gas sensors with sensitive layers based on polymer- or

heteropolysiloxane have the principal advantage of very low energy
consumption and can be reduced in size to fit into microelectronic-based
systems. On the downside, short- and long term drift effects as well as a rather
low overall lifetime are major obstacles when compared with the NDIR
measurement principle [2].

Applications

• For air conditioning applications these kinds of sensors can be used to

monitor the quality of air and the tailored need of fresh air, respectively.

29
• In applications where direct temperature measurement is not applicable
NDIR sensors can be used. The sensors absorb ambient infrared radiation (IR)
given off by a heated surface.

2.2 CO SENSOR:

A carbon monoxide detector or CO detector is a device that detects the

presence of the carbon monoxide (CO) gas in order to prevent carbon monoxide
poisoning. CO is a colorless and odorless compound produced by incomplete
combustion. It is often referred to as the "silent killer" because it is virtually
undetectable without using detection technology. Elevated levels of CO can be
dangerous to humans depending on the amount present and length of exposure.
Smaller concentrations can be harmful over longer periods of time while
increasing concentrations require diminishing exposure times to be harmful.

CO detectors are designed to measure CO levels over time and sound an alarm
before dangerous levels of CO accumulate in an environment, giving people
adequate warning to safely ventilate the area or evacuate. Some system-
connected detectors also alert a monitoring service that can dispatch emergency
services if necessary.

While CO detectors do not serve as smoke detectors and vice versa, dual
smoke/CO detectors are also sold. Smoke detectors detect the smoke generated
by flaming or smoldering fires, whereas CO detectors go into alarm and warn
people about dangerous CO buildup caused, for example, by a malfunctioning
fuel-burning device. In the home, some common sources of CO include open
flames, space heaters, water heaters, blocked chimneys or running a car inside a
garage

2.3 LCD(Liquid crystal Display):

Liquid crystal display is very important device in embedded system. It offers
high flexibility to user as he can display the required data on it. But due to lack

30
of proper approach to LCD interfacing many of them fail. Many people consider
LCD interfacing a complex job but according to me LCD interfacing is very
easy task, you just need to have a logical approach. This page is to help the
enthusiast who wants to interface LCD with through understanding. Copy and
Paste technique may not work when an embedded system engineer wants to
apply LCD interfacing in real world projects.

LCD driver is a link between the microcontroller and LCD. e.g. JHD 162A is
name of LCD having driver HD44780U.The LCD is interfaced according to the
driver specification. Major task in LCD interfacing is the initialization sequence.
In LCD initialization you have to send command bytes to LCD. Set the interface
mode, display mode, address counter increment direction, set contrast of LCD,
horizontal or vertical addressing mode, color format. This sequence is given in
respective LCD driver datasheet.

LCD COMMANDS:

31
 TABLE 5

NOTES:

• DDRAM = Display Data RAM.

• CGRAM = Character Generator RAM.

• DDRAM address corresponds to cursor position.

• Address Counter is used for both DDRAM and CGRAM.

• * = Don’t care.

• ** = Based on Fosc = 250 KHz.

2.2 RELAY:

32
A relay is an electrically operated switch. Current flowing through the coil of
the relay creates a magnetic field which attracts a lever and changes the switch
contacts. The coil current can be on or off so relays have two switch positions
and they are double throw (changeover) switches.

Relays allow one circuit to switch a second circuit which can be completely
separate from the first. For example a low voltage battery circuit can use a relay
to switch a 230V AC mains circuit. There is no electrical connection inside the
relay between the two circuits; the link is magnetic and mechanical.

The coil of a relay passes a relatively large current, typically 30mA for a 12V
relay, but it can be as much as 100mA for relays designed to operate from lower
voltages. Most ICs (chips) cannot provide this current and a transistor is usually
used to amplify the small IC current to the larger value required for the relay
coil. The maximum output current for the popular 555 timer IC is 200mA so
these devices can supply relay coils directly without amplification.

Relays are usually SPDT or DPDT but they can have many more sets of switch
contacts, for example relays with 4 sets of changeover contacts are readily
available. For further information about switch contacts and the terms used to
describe them please see the page on switches.

Most relays are designed for PCB mounting but you can solder wires directly to
the pins providing you take care to avoid melting the plastic case of the relay.

The supplier's catalogue should show you the relay's connections. The coil will
be obvious and it may be connected either way round. Relay coils produce brief
high voltage 'spikes' when they are switched off and this can destroy transistors
and ICs in the circuit. To prevent damage you must connect a protection diode
across the relay coil.

The animated picture shows a working relay with its coil and switch contacts.
You can see a lever on the left being attracted by magnetism when the coil is

33
switched on. This lever moves the switch contacts. There is one set of contacts
(SPDT) in the foreground and another behind them, making the relay DPDT.

The relay's switch connections are usually labeled COM, NC and NO:

• COM = Common, always connect to this, it is the moving part of the

switch.

• NC = Normally Closed, COM is connected to this when the relay coil is

off.

• NO = Normally Open, COM is connected to this when the relay coil is

on.

CHAPTER 3

APPLICATIONS AND CONCLUSION:

34
The CEMS based on GPRS wireless communication realizes accurately

monitoring and measuring smoke emission in power plant. The environmental

departments can know power plant’s emission and other pollution in time, and

greatly increased convenience.

To further develop the system, communication between the CEMS terminal

and the cell phone will be realized, and will embody greatly mobility. The

system is being used in production and everyday life widely.

APPENDICES

CODING:

ADC:

35
#include<pic.h>
void main(void)
{
int result;
ADCON0=0X41;
ADCON1=0X80;
while(1)
{
ADGO=1;
while(ADIF==0);
result=ADRESH;
result=result<<8;
result=result|ADRESL;
}
}

LCD:

#include<pic.h>
void Lcd_cmd(char);
void delay(unsigned long);
void Lcd_Data(char);
void Lcd_Init(void);
void Lcd_Enable(void);
void Lcd_Init()
{

TRISB=0X00;
PORTB=0X00;

36
Lcd_cmd(0X02); //lcd reset
Lcd_cmd(0X24); //4 bit mode
Lcd_cmd(0X01); //clear
Lcd_cmd(0X06); //entry mode
Lcd_cmd(0X0c); //move cursor to 2nd line

void Lcd_cmd(char e)
{
char b,c,d;
RB4=0; //rs
b=e&0XF0;
c=b>>4;
PORTB=c;
Lcd_Enable();

RB4=0;
d=e&0X0F;
PORTB=d;
Lcd_Enable();
}
void Lcd_Enable()
{
RB5=1;
delay(200);
RB5=0;
}
void Lcd_Data(char dat)
37
{
char b,c,d;

RB4=1;
b=dat&0XF0;
c=b>>4;
PORTB=c;
Lcd_Enable();

d=dat&0X0F;
PORTB=d;
RB4=1;
Lcd_Enable();
}

void delay(unsigned long d)

{
while(d--);
}

void main()
{
int i;
char p[8];
TRISD=0X00;
Lcd_Init();

Lcd_Data('A');
Lcd_Data('B');
38
Lcd_Data('C');
PORTD=0X00;
delay(1000);
PORTD=0XFF;
delay(1000);

UART:

#include<pic.h>

__CONFIG(0X3F3A);
#define RS RB4
#define EN RB5
void LCD_Cmd(unsigned char command);

void LCD_Init(void)
{
TRISB=0X00;
TRISD=0X00;
RBPU=0;
LCD_Cmd(0x02);
LCD_Cmd(0x28);
LCD_Cmd(0x06);
LCD_Cmd(0x0c);

}
void delay(unsigned long delay)
{
39
while(delay--);
}

void LCD_Cmd(unsigned char command)

{
unsigned char Temp_command,Temp2_command;
Temp_command=command;
Temp_command=Temp_command>>4;
PORTB=Temp_command;
RS=0;
EN=1;
delay(400);
EN=0;
Temp2_command=command;
Temp2_command=Temp2_command&0X0F;
PORTB=Temp2_command;
RS=0;EN=1;
delay(100);
EN=0;
}

void lcd_data(unsigned char data)

{
unsigned char Temp_data,Temp2_data;
Temp_data=data;
Temp_data=Temp_data>>4;
PORTB=Temp_data;
RS=1;
40
EN=1;delay(400);
EN=0;
Temp2_data=data;
Temp_data=Temp_data&0X0F;
PORTB=Temp2_data;
RS=1;EN=1;delay(100);EN=0;
}

void LCD(unsigned char const *dat)

{

while(*dat)
{ lcd_data(*dat);*dat++; }
}

void Uart_Init(void)
{

TXSTA=0x24;
RCSTA=0x90;

TXIF=0;
SPBRG=25;//9600 Baud rate,4Mhz
}

41
/
****************************************************************
*********************/
//SENd data through serial port
void UART_Send(unsigned char sdata)
{
TXREG=sdata;
while(TXIF==0);

TXIF=0;

void main()
{
char i;
char str[]="global techno solution tsssdfsdfsdgsdfgsdgs";
LCD_Init();
Uart_Init();
LCD_Cmd(0x01);
LCD_Cmd(0xc0);
LCD("UART");

while(1)
{
i=0;
while(str[i])
{
UART_Send(str[i]);
i++;
42
}

delay(65535);

}
}

REFERENCES

[1] Peter R. Summary of USEPA instrumental test methods used forcompliance

determination and CEMS validation. InterferenceCEM’98, 1998:1-5

[2] Review of CEM 2004. 6th international conference on emission monitoring,

Mila,Italy,9-11 June 2004

[3] Marquard LC, Wagner T and Platt U. Improved Air Mass Factor Concepts
foe Scattered Radition Differential Optical Absorption Spectroscopy of
Atmospheric Species, J.Geophys.Res. Voll05,2000:1315-1327

[4] Crowe CT. Multiphase Flows with Droplets and Particles. Boca Taton:CRC
Press,1998

[5] Li Xianyong. Communication Technology based on Visual C++ project.

Beijing: People’s Press,2002

43
[6] Tamara Dean .Remote Communication. Beijing: Tsinghua University
Press,2004.

[7] R.J.(Bud) Bates. Technology and Application for GPRS. Beijing:

People’s Post Press, 2004
[8] Wang Jinbiao. Computer Control on Process. Beijing Tsinghua University
Press ,1992

[9] SIMCOM Corp. Manual for SIMCOM300.

44