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AGC (automatic-gain-con- element’s nonlinear transfer charac- Ideas, visit www.edn.com/design
trol) amplifiers use the nonlin- teristic, which causes a relatively large ideas.
ear characteristics of control devices. degree of nonlinear signal distortion
The magnitude of the real component once the processed voltage amplitude
in some of their differential parame- exceeds millivolts (Reference 2). The circuit in this Design Idea uses a
ters changes depending on variations A photoresistor, which has a VA char- radiation source whose spectral char-
in their dc operating points. A typical acteristic that’s linear in a large range acteristic fits the spectral characteris-
example is the VA characteristic of a of voltages, is up to the task. Common tic of the photoresistor, and its radiat-
silicon PN junction, which results in photoresistors remain perfectly linear ed power should, if possible, be a linear
the differential conductance directly for signal amplitudes of 100V or more. function of the drive signal. Such op-
proportional to the passing dc current Therefore, the amplification-control tocouplers are commercially available,
(Reference 1). In this form of con- device can be an optocoupler whose but few have properties good enough
trol, the main problem is the control controlled element is a photoresistor. for this purpose. Common photo-
resistors have spectral characteristics
close to the spectral characteristics of
the human eye, whose peak sensitiv-
ity has approximately a 500-nm wave-
length. So a white or green LED (light-
emitting diode) is a good alternative.
To obtain the highest possible sensitiv-
ity, this circuit uses a white HB (high-
brightness) LED.
Figure 1 shows the individual com-
ponents of the optocoupler and the as-
sembled device. The optocoupler com-
prises a cylindrical holder that accepts
a standard 5-mm HB LED from one
end and a photoresistor at the other
end. An opaque nonconductive seal
prevents external light from entering
the device. The polished metallic inner
wall of the holder results in minimum
light loss between the LED and the
photoresistor. Available off-the-shelf
photoresistors include the LDR 05, the
LDR 07, and a standard white, 5-mm
Figure 1 A metal tube with an HB LED and a photoresistor forms the optocou- HB LED type L-53MWC*E, with out-
pler (left). put-light flux of 2500 mcd at a 20-mA
drive current (Reference 3).
input to protect the LED from reverse nal at 1 kHz yields higher harmonics ing Amplifier,” Proceedings of the
polarization at no-signal conditions. with amplitudes lower than A1’s noise Fifth WSEAS International Confer-
This LED current-control circuit has level for all input voltages to 200 mV ence on Microelectronics, Nanoelec-
an important advantage: It permits an rms and below 275 dB for input volt- tronics, Optoelectronics, March
almost-independent adjustment of the ages to 1.5V rms. The nonlinear distor- 2006, pg 6.
attack and release time. You can adjust tion becomes noticeable only at large 3 Opto-isolator Catalogue, Tesla Bla-
the attack time through variable re- input amplitudes exceeding the regu- tná, www.tesla-blatna.cz.
signal generator
sweeps frequency FREQUENCY
Yi-Chu Liao and Shao-Wei Leu, (kHz)
National Taiwan Ocean University,
Keelung, Taiwan
Many power ICs use frequen-
cy jitter, which spreads a con- 100
The basic clock frequency can range CLKOUT CLK CLKOUT1 OUTPUT
PHASE 1
from 600 to 720 kHz. You can develop 50 MHz CLK STATE_OUT STATE_OUT
CLKOUT2 OUTPUT
the three-phase generator using Veri COUNT1[15..0] COUNT1[15..0]
PHASE 2
log (www.verilog.com) HDL code and CLKOUT3 OUTPUT
PHASE 3
Altera (www.altera.com) FPGAs. RESET RESET RESET
The three-phase generator starts RESET
with a 50-MHz clock and ends with
three output phases (Figure 2). The EDN100422DI4644_FIG2.eps
Figure 2 The three-phase generator starts with a 50-MHz clock and ends with
circuit’s two main parts are the se-
three output phases.
quential frequency-scanning part and
the three-phase model. The frequency-
scanning part comprises the frequency
model and Model 2 blocks. The se- START BASIC WORK
quential frequency-scanning part gen- FREQUENCY OF FPGA:
50 MHz
erates a frequency of 600 to 720 kHz. COUNT
The three-phase model receives the
variable clock-period frequency from DIVIDE TO 80 Hz
the output of Model 2. One phase pe-
riod comprises six clock periods from
COUNT=6000
the three-phase input frequency. The
relations of phases 1, 2, and 3 are 101, VARIABLE 600- TO 720-kHz ALGORITHM OF
100, 110, 010, 011, and 001, respec- COUNT=COUNT+6000 INPUT FREQUENCY OF THREE-PHASE MODEL
tively, over six clock pulses. Together, 50 MHz
COUNT NUMBER =
they construct a three-phase waveform [600 kHz+(COUNT–6000)] Hz
with a 1208 phase difference. COUNT=120,000
NO
frequency:
Figure 4 The three-phase frequency changes in sequence, counting up from
600 kHz ↔ 720 kHz EDN100422DI4644_FIG4
100 to 120 kHz and back down.eps
to 100 kHz in 1-kHz steps over 0.5 seconds.
100 kHz ↔ 120 kHz =
6 .
The first phase starts on the posi- shows how the count number derives kHz and back down to 100 kHz in 1-
tive edge of the first period, and the from the 50-MHz clock signal. kHz steps over 0.5 seconds. Figure 4
second phase starts after two peri- The counter increases in value to shows the relationships among the
ods of the input clock at the positive 6000 in 0.0125 seconds, or 80 Hz, three phases.
edge. The second phase now lags by until it reaches 120,000. The count Using this algorithm, you can de-
two input clock periods, or 1208. The then decreases back to 6000. The vari- velop and implement a lightweight,
third phase then starts after two more able “count” is the input to the Model low-cost, three-phase signal with a
input-clock periods. The counter starts 2 block, which generates clocks of 600 1208 relative phase difference and si-
with a value of 6000 because the period to 720 kHz—the input-clock period multaneous sweeping on one FPGA
of the three-phase model requires six of the three-phase block. Finally, the chip. You can use three lowpass filters
clock times, and the sweeping frequen- three-phase frequency changes in se- to create sine-wave signals from the
cy is 1 kHz. The equation in Figure 3 quence, counting up from 100 to 120 outputs.EDN
A previously published Design MAX934, an ultra-low-power quad reference voltage is 1.2V, IC1B’s output
Idea describes a practical gadget comparator with a built-in 1.2V refer- changes from low to high. So when the
that has the potential to save a lot with ence. The chip uses about 6 mA. IC1A, probe is dry and the battery voltage is
little investment (Reference 1). How- R1, and R2 provide water-leakage de- higher than 6.6V, IC1B’s output is low,
ever, the circuit uses 120V line voltage tection. R1 is the water probe, which which forces IC1C’s output high, and
and, as such, it is not that convenient can be two bare copper wires wrapped IC1D’s output stays low.
for many applications. This Design in a sponge. R1 has high impedance Either a wet probe or a low-voltage
Idea describes a portable water-leak when the sponge is dry, so IC1A’s output battery can force IC1B’s output high,
detector that uses a common 9V bat- stays high. Once the circuit detects the freeing a narrow-duty-cycle oscillator
tery for power (Figure 1). The circuit water leak, R1’s value decreases to less comprising IC1C, C2, R5, R8, and D3.
consumes less than 10 mA during de- than a few hundred kilohms, which The oscillation period is approximate-
tection mode, and a 9V alkaline bat- forces IC1A’s output low. Through D1, ly 7 seconds, and IC1C’s output is low
tery has greater-than-500-mAhr ca- it makes the output of IC1B high. for about 0.3 seconds. That low output
pacitance. So one battery can last more allows a 2.4-kHz oscillator comprising
than five years, which is equivalent to IC1D, C3, and R9 to operate. When the
the battery’s shelf life. When the bat-
This portable circuit detects a water leak or the bat-
tery voltage drops below 6.5V, the de- water-leak detec- tery’s power is low, the buzzer sounds
tector beeps to indicate that it is time for a fraction of a second every 7 sec-
to change the battery.
tor uses a com- onds. In this way, the warning sound
The design uses Maxim Integrat- mon 9V battery. can last for a long time before the bat-
ed Circuits’ (www.maxim-ic.com) tery gets too low.
R2 R4
7.5M 10M R10 R11
3.9M 10M
R6 13
7 7.5M �
� R7 15
1 10M
12 �
6 �
D2
BT1 5 1N4148 IC1D
� 3
9V 2 IC1B MAX934
4 � MAX934
11 R9
14 D1 �
C1 16 10M
1N4148
1 µF IC1A 10 �
MAX934 D4
1N4148
IC1C
8 R3 MAX934
1.2V R1 C2 C3
SENSOR 2.2M 1 µF R8 D3 22 pF
REF- BZ1
ERENCE 9 200k 1N4148 BUZZER
R5
10M
Figure 1 IC1A and IC1B determine the conditions for sounding the buzzer, and IC1C oscillates to provide the trigger for IC1D.
EDN100422DI4649_FIG1.eps