Simulation-based Procedure for Implementing

Theory of Constraints: Extension for Cases with Multiple Bottlenecks

Chompoonoot Kasemset†1and Voratas Kachitvichyanukul†2
Industrial Engineering and Management, 
School of Engineering and Technology, Asian Institute of Technology,
P.O. Box 4, Klong Luang, Pathumthani 12120, Thailand
Tel: (66 2) 0-2524-5675; Fax: (66 2) 0-2524-5697
Email: st104182@ait.ac.th1and voratas@ait.ac.th 2

Abstract.
This paper presents a simulation-based procedure to implement TOC policy in a manufacturing environment
with multiple bottlenecks. The procedure is an extension of the single bottleneck case originally proposed by
Kasemset and Kachitvichyanukul (2005). The procedure uses simulation to identify bottlenecks, set up DBR
system and evaluate the performance of the new system.
The cases with multiple bottlenecks are much more difficult than the cases with single bottleneck. Starting
with bottleneck identification, bottlenecks are identified by conducting simulation experiments to identify all
system bottlenecks. After the real bottlenecks are identified, more simulation experiments are carried out to
determine buffer size for each bottleneck station. The final step is to establish the DBR (Drum-Buffer-Rope).
The performance evaluation is done to verify the effectiveness of the resulting DBR. An example is given to
illustrate the procedure.

Keywords: Theory of Constraints (TOC), Simulation-based Procedure, Multiple Bottlenecks, DBR (Drum-
Buffer-Rope).

1. INTRODUCTION Step1: Identify the system’s constraint

“An hour lost at the bottleneck is an hour lost for the
entire system. An hour saved at a non-bottleneck is a
mirage”. Theory of constraint concentrates on how to
manage the system constraint, i.e., the bottleneck resource
or CCR, to drive more income and for company to survive
in the real world business (Goldratt and Cox 1986).
The key TOC concept is “The system output rate is
limited by the machine with the slowest rate”. In TOC,
there are only two types of machines; a bottleneck machine
or CCR (Capacity constraint resource) and a non-
bottleneck machine or non-CCR. Bottleneck Resource or
CCR is the resource that its capacity is equal or less than
the demand. There are fewer resources of this type in the
factory. The other type is the non-bottleneck machine or
non-CCR. It is the resource that its capacity is greater than
the demand. The main point of this procedure is to balance
flow of product by making the output rate at the bottleneck
equal to or a little bit more than the market demand. In
order to implement TOC, there are five steps as listed
below.
Step2: Exploit the system’s constraint
Step3: Subordinate the system’s constraint
Step4: Elevate the system’s constraint
Step5: Return to first step but prevent inertia from
being the next constraint
The execution of all steps can result in a shifting of the
system constraint. Thus, it is necessary to return to the first
step and identify the new system constraint. Preventing
inertia means examining the new system configuration to
ensure that it remains appropriate.
In this study, the system proposed by Kasemset and
Kachitvichyanukul (2005) is extended for cases with
multiple bottlenecks.
2. PREVIOUS RESEARCH
Kasemset and Kachitvichyanukul (2005) proposed a
simulation-based system which consists of two generic
models (Physical job flow model and Information control
flow model). The models are implemented in ARENA. The
users can model various production systems simply by

________________________________________
† : Corresponding Author

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defining basic manufacturing data: machines, jobs,
processes, demand target, warehouse limitation etc.
The procedure to use the model in accordance with the
five steps of TOC is described below.
Step 0: Preparation
Users define the manufacturing input data for base-
line case. This step is done whenever there are changes in
the production system.
Step 1: Bottleneck Identification
The simulation is run for existing system to collect
statistics of the following key performance indicators; (1)
Throughput of existing system and (2) Utilization of each
machine and (3) Time between arrival and departure of
each process.
Bottleneck Candidate Identification Procedure
(Kasemset and Kachitvichyanukul 2007)
To identify the bottleneck candidates, three factors,
utilization, throughput rate and utilization factor are
required. Considering each factor;
(1) Utilization data: The machines or processes that
have high utilization are selected to be the bottleneck
candidates.
(2) Throughput Rate: Following the basic principle of
Factory Physics (Hopp and Spearman 2001), the
throughput rate of each station comes from the ratio
between the number of processed parts and operation time.
In each product route, the output rate of every station is
calculated. Among them, Bottleneck Rate (Rb) is the
minimum value of output rate. Thus, the station with Rb
qualifies to be bottleneck candidates.
(3) Utilization Factor: Based on queuing theory, a
single-server system with finite queue of no more than K
units, M/M/1/K (Radovilsky 1998). The utilization factor
(ρ) is calculated from ρ = λ / µ, λ and µ are arrival and
departure rate for each process/ machine. If processes or
machines have high utilization factor, they are identified to
be bottleneck candidates.
For the cases with single bottleneck, several
bottleneck candidates can be identified from the utilization
statistics collected from the simulation runs and from the
bottleneck rate calculation. Simulation experiments are
then carried out to find the real bottleneck from among the
candidates. In the experiment, many scenarios are created
by adding one of each bottleneck candidate for each
scenario and rerun the simulation to collect throughput
statistics for each scenario to construct the mean confident
interval of throughput for comparison. The scenario with
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significantly higher mean confident interval of throughput
than the base case is identified to be the system bottleneck,
(see Kasemset 2005 and Kasemset and Kachitvichyanukul
2007).
Step 2 to Step 4: Bottleneck Exploitation, System
Subordination and Elevation
After the system bottleneck is identified, Drum-
Buffer-Rope (DBR) can be defined in the information flow
model.
Drum is a location of bottleneck. Then, Buffer is
placed before the bottlenecks. Time buffer is applied as a
waiting line of incoming products before the CCR.
Buffer size in the experiment can be calculated based
on two concepts;
(1) The buffer size (K) can be calculated based on the
M/M/1/K system. The buffer size of K units is needed to
keep the bottleneck from being idle with probability less
than P0 (P0(K) < x) (Radovilsky 1998).
(2) Critical WIP based on factory physics (Hopp and
Spearman 2001).
To set the buffer size for each bottleneck, the
simulation experiment is also carried out to collect
throughput statistics for every scenario and to construct the
confident intervals of throughput mean for comparison.
There are many values of buffer size for each bottleneck
created depended on threshold value P0 or x that the users
want to test and one possible value must be the critical WIP
(W0).
Rope is used to control the movement of physical flow
by changing the control information. There are two ropes to
be set; (1) Rope for material release and (2) Rope to protect
unneeded parts from processing too soon. The first rope
controls material entering the system. The second rope
protects the system from processing the unneeded product
type.
Step 5: If the results from the first four steps can
yield a throughput that exceeds the demand, then
the process stop. Otherwise, go back to the Step 1.
The mean confident intervals of throughput are
calculated and compared with throughput target. The
Output Analyzer program in ARENA can help the user to
construct the mean confident interval comparison from the
results from the simulation runs. After the output is
confirmed by comparing the mean throughput with the
target throughput and it reaches the target demand, the
manufacturing configuration for TOC can be concluded.
Figure 1 show the overall proposed system from Kasemset
and Kachitvichyanukul (2005).
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Figure 1: Overall System Proposed by Kasemset and Kachitvichyanukul (2005and 2007)
3. THE EXTENSION FOR MULTIPLE
BOTTLENECK CASE
As in Figure 1, the blocks with different color are the
steps that were modified for the cases with multiple
bottlenecks.
The first colored block is in bottleneck identification
step. For the cases with multiple bottlenecks, more than one
simulation experiment is required because the result from
the first experiment may not distinctly identify the real
system bottlenecks. The second simulation is carried out
while each scenario is created by increasing the capacity of
a pair of bottleneck candidates. Simulation is rerun to
collect the throughput statistics of each scenario. The
comparison and judgment are made similar to the case for
single bottleneck.
The second and third colored blocks in steps 2 to 4 are
different from the single bottleneck case because the
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numbers of drums and ropes will increase subsequently as
the number of bottlenecks increased.
The fourth and fifth highlighted blocks in steps 2 to 4
are for the setting of buffer sizes. In the multiple bottleneck
case, each scenario comes from combination of each
bottleneck’s buffer size. Various buffer size combinations
must be tested to find the optimal situation that can meet
the target demand by comparing the throughput mean
confident interval with the target throughput.
In case of multiple bottlenecks under flow shop, there
are four DBR systems introduced by Gilland (2002) and
Tanaka et al. (2004); PFB1, PFB2, PFBB1 and PFBB2. In
job shop cases the DBR is set depended on each product
sequence because each product may pass through different
bottleneck processes.
The other steps that were not mentioned above are the
same as those for cases with single bottleneck. An
illustrative example will be shown in the next section.
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4. ILLUSTRATIVE EXAMPLE When the utilization factor is calculated and compared

among all stations, A and E have highest value (See Table
Three different types of jobs move through the 4). Thus, A and E are accepted to be bottleneck candidates.
production shop. Three job-types are designated as type 1, Based on the discussion above, the bottleneck
type 2, and type 3. Each job-type requires that operations candidate list consists of machine stations A, B, E, and F.
be performed at specified machines in a specified sequence. The number of machines for these candidate stations will
All operation times are exponentially distributed. Job be varied in the verification experiments as described in
arrives at the shop with exponential inter-arrival times. The Table 5.
details of job sequence and operation time are provided in Table 1B: Product and Process Information for the
Tables 1A-1B. Example Job Shop
Job arrives at the shop with exponential inter-arrival
times with a mean of 9.6 minutes. 24% is job type 1, 42% Mean
Total number Machine
is job type 2 and the remaining is job type 3. The type of Job Operation
of machine to Visitation
arriving job is independent of the job type of the preceding Type Time
be visited Sequence
arrival. The operation time of the production shop is 5 (minutes)
separate 40-hour weeks. 1 4 Casting Unit 125
Working Time is 5 days per week, eight hours per days. Planer 35
The warehouse limits of finish goods storage for each Lathe 20
product are set at no more than 60, 105, and 85 unit/month Polishing
for Products 1, 2, and 3 respectively. 60
Machine
The goal is to find the machine configuration of the 2 3 Shaper 105
system that can meet the external demand of target Drill Press 90
throughput of at least 200 parts per week. Lathe 65
The utilization statistics collected from simulation are 3 5 Casting Unit 235
shown and analyzed in Table 2. The bottleneck rate Shaper 250
calculation data is shown in Table 3. The utilization factor
Drill Press 50
calculation is shown in Table 4.
Planer 30
The output from simulation run is 187.5 parts per
Polishing
week. 25
Machine
Table 1A: Machine Information for Test Problem
Table 2: Machine Information for Test Problem
Number of
Machine Group Description Machines in Machine Station Name Average Utilization %
Group A (Casting Units) 81.50%
1 Casting Unit 12 B (Lathes) 67.98%
2 Lathes 4 C (Planners) 47.93%
3 Planers 3 D (Drill Presses) 74.20%
4 Drill Presses 6 E (Shapers) 85.43%
5 Shapers 12
F (Polishing Machines) 59.25%
Polishing
6 3
Machine
Table 5: Scenarios for Bottleneck Experiment of Test
Problem (1st Step)
4.1 Bottleneck Identification
Scenario Detail
Based on the utilization statistics from simulation in
Based All machines are the same.
Table 2, machines A and E have the highest utilization.
1 Add A one machine.
Thus, machines A and E are identified as bottleneck
2 Add B one machine.
candidates.
By checking the throughput statistics in Table 3, 3 Add E one machine.
machines B, E and F are also identified as bottleneck 4 Add F one machine.
candidates.

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Table 3: Machine Information for Test Problem

Job Operation Operation Time per Rate

Type Sequence Time (Min) station (Min) (part/min) rb
1 A 125 10.42 0.096
(24%) C 35 11.67 0.086
B 20 5.00 0.200
F 60 20.00 0.050 0.050
Total 240 47.08
2 E 105 8.75 0.114

(44%) D 90 15.00 0.067

B 65 16.25 0.062 0.062

Total 260 40.00

3 A 235 19.58 0.051

(34%) E 250 20.83 0.048 0.048

D 50 8.33 0.120

C 30 10.00 0.100

F 25 8.33 0.120

Total 590 67.08

Table 4: Utilization Factor Comparison for Test Problem

Machine Name A B C D E F
λ (part/min) 0.0595 0.0599 0.047 0.065 0.0748 0.0466

µ (part/min) 0.0534 0.0589 0.0566 0.0633 0.065 0.0456

Utilization Factor, ρ 1.114 1.017 1.008 1.027 1.151 1.02

Figure 2: Comparison of Mean Throughputs for Test Problem (1st Step)

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In this experiment, Mean Interval Comparison Test is
set to observe how the throughput increases in different
situation. The result is shown in Figure 2
As can be seen in Figure 2, No test scenario is
distinctly different from one another at 75% confident
interval, so additional tests must be performed.
The number of machines for these candidate stations
will be varied in pair in the verification experiments as
described in Table 6.
Table 6: Detail of the Bottleneck Experiment for Test
Problem (2nd Step)
Scenario Detail
Based All machines are the same.
1 Add A and B one machine per type.
2 Add A and E one machine per type.
3 Add A and F one machine per type.
4 Add B and E one machine per type.
5 Add B and F one machine per type.
6 Add E and F one machine per type.
Same as previous step, Mean Interval Comparison
Test is used again to compare each scenario throughput.
The result is shown in Figure 3.
As can be seen in Figure 3, among all means of
scenario, only the scenario that machine A and E is added
is significantly different from others and higher than based
scenario. Therefore, A and E are identified to be the
bottleneck.
4.2 DBR Setting
After machine stations A and E are identified as
bottlenecks, Buffer and Rope can be located. For products
1 and 2, their production sequences pass through only one
bottleneck machine, A for product 1 and E for product 2, so
DBR setting is the same as in case of single bottleneck.
(See in Figure 4A and 4B)
The production sequence of Product 3 passes through
multiple bottlenecks so the DBR setting should be selected
from among PFB1, PFB2, PFBB1 and PFBB2 methods. In
this example, PFB 1 is selected to apply. (See Figure 4C)

 
nd
Figure 3: Comparison of Mean Throughputs for Test Problem (2 Step)

Product 1:
Buffer Location: Before A
Buffer type: Raw material
Rope Location: After A connect to raw material release.

 
Figure 4A: DBR Setting for Product 1

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Product 2:
Buffer Location: Before E
Buffer type: Raw material
Rope Location: After E connect to raw material release.

Figure 4B: DBR Setting for Product 2

Product 3:
Buffer Location: Before A
Buffer type: Raw material
Rope Location: After A connect to raw material release.
(Following PFB1 Policy)

Figure 4C: DBR Setting for Product 3

4.3 Buffer Size Calculation throughput.

The parameter values used in the formula are
estimated using statistics collected from the simulation run
as shown in Table 7.
The buffer values are then set for the next set of
simulation runs as given in Table 8. The results are given in
Table 9 and Figure 5. As the target throughput is 200,
several of the buffer sizes combinations can meet the target
As can be seen in Figure 5, many cases of buffer
setting for both bottlenecks give the throughput that
exceeds the target. The users will have to make the final
selection.
In this problem, the cased of buffer at A 10 and at E
19 is selected because of the least of total buffer size and
the highest throughput compared with other cases with the
same total buffer size.

Table 7: Buffer Calculation Factors for System Bottleneck

First Bottleneck Second

Item
(A) Bottleneck (E)
Time Between Arriving to CCR (min) 16.80 13.362
Time Between Leaving from CCR (min) 18.72 15.382
Arriving Rate (λ) part/min 0.0595 0.0748
Leaving Rate (µ) part/min 0.0534 0.0650
Utilization Factor (ρ = λ / µ.) 1.114 1.151

Table 8: Buffer Values for Test Problem

x With 1% idle With 5% idle W0

Bottleneck A 22 10 20
Bottleneck E 19 9 20

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Table 9: Buffer Evaluation for Test Problem

Item (Buffer A, Buffer E) Average Throughput (part)

(22, 20) 211.03
(22, 19) 211.83
(22, 9) 202.20
(20, 20) 213.16
(20, 19) 212.33
(20, 9) 205.26
(10, 20) 208.40
(10, 19) 209.36
(10, 9) 199.10

Figure 5: Buffer Evaluation Result for Test Problem

Table 10 Manufacturing Configuration for a Production Shop Problem

Item Detail
Target Throughput 200 parts/week
Tested Throughput 187.5 parts/week (current system)
209 part/week (under TOC)
Bottleneck Station (Drum) Station A (Casting Units) and E
(Shapers)
Buffer Location In front of station A and E
Buffer Size A = 10, B = 19
Machine Sequencing Rule FIFO
Rope 1st Rope is located between
ending of process A and the release of
material.
2nd Rope is located between
ending of process E and the release of
material.
3rd Rope is located between
system output and the release of
material and each machine station.

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4.4 Manufacturing Configuration Conclusion production system with multiple bottlenecks: A simulation
analysis. Proceedings of the Fifth Asia Pacific Industrial
After finishing TOC implementation, the Engineering and Management Systems Conference 2004.
manufacturing configuration can be concluded in Table 10.
AUTHOR BIOGRAPHIES
5. SUMMARY
Chompoonoot Kasemset is a doctoral student in Industrial
This paper extends the approach from Kasemset and
Engineering and Management, School of Engineering and
Kachitvichyanukul (2005) that uses simulation as a Technology, Asian Institute of Technology, Thailand. Her
decision support tool to manage manufacturing systems research interests include operation management and
with multiple bottlenecks operated under the TOC policy. simulation and applied operation research. Her email
With the presents of multiple bottlenecks, the procedure to address is <st104182@ait.ac.th>
implement TOC is more complicated than that for the
single bottleneck case. An illustrative example shows how Voratas Kachitvichyanukul is an Associate Professor in
this procedure works in the case with multiple bottlenecks. Industrial Engineering & Management, School of
Simulation is used to identify the bottleneck and set up Engineering and Technology, Asian Institute of
DBR, as well as to evaluate system performance of new Technology, Thailand. He received a Ph. D. from the
configuration. School of Industrial Engineering at Purdue University in
In this study, only FIFO machine sequencing rule is 1982. He has extensive experiences in modeling of
used. Other policies can also be applied and compared to manufacturing systems. He had worked for FORTUNE 500
find the best policy for improving the system under TOC Companies such as Compaq Computer Corporation and
policy. Motorola Incorporated. He had also worked for
SEMATECH as technical coordinator of the future factory
REFERENCES program. His teaching and research interests include
evolutionary algorithms for combinatorial optimization,
Gilland, W.G. (2002) A simulation study comparing planning and scheduling, supply chain and logistics, high
performance of CONWIP and bottleneck-based release rule, performance computing and applied operations research
Production Planning & Control, 13 (2), 211-219. with special emphasis on industrial systems. His email
address is <voratas@ait.ac.th>
Goldratt, E.M. and Cox, J. (1986) The Goal: A
Process of Ongoing Improvement (Revised Edition), North  
River Press.
Hopp, W.J. and Spearman, M.L (2001) Factory
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Kasemset, C. (2005) Simulation-based Tool for
Theory of Constraints (TOC) Implementation, Master’s
Thesis, Asian Institute of Technology, Bangkok, Thailand.
Kasemset, C. and Kachitvichyanukul, V. (2005),
Simulation-based tool for implementing theory of
constraints. Proceeding of the 6th APIEMS Conference,
Manila, Philippines.
Kasemset, C. and Kachitvichyanukul, V. (2007)
Simulation-based procedure for bottleneck identification.
Proceeding of AsiaSim 2007, Asia Simulation Conference
2007, Seoul, Korea.
Radovilsky, Z.D. (1998) A quantitative approach to
estimate the size of the time buffer in the theory of
constraints, International Journal Production Economics,
55, 113-119.
Tanaka, K., Myreshka, Morikawa, K. and Takahashi,
K. (2004) Effective order release system for a multistage

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