ANER TENNEN * at10f8d46@westpost.

net
408-733-2070 (home) * 732-995-5835 (cell)
Analog/Mixed-Signal - System/IC/Hardware - Architecture & Design
R&D, Product Definitions, Applications
Highly inventive Senior MSEE Engineer w/12+ years of experience rooted in R&D fo
r telecom, semiconductor, measurements, biomedical and solar segments. Eager to
utilize skills in developing System/IC/HW. Analytical and proactive, with a repu
tation for identifying and filling internal and market needs with industry-leadi
ng solutions. Strengths in modeling and simulations, leading R&D, and finding so
lutions that have eluded others. Rapidly gain mastery of new tools, technologies
, and methodologies.
Research & Development (R&D) * Problem Solving & Issue Resolution * Analysis/Spe
c., Design & Simulation * Failure Analysis * RFIC Transceivers Design * Analog C
MOS IC Design * High-Speed Modem * Passive / Active Filters * Semiconductors * M
easurement * Performance Testing * Product Development & Support * A/D Communica
tions * Adaptive / Nonlinear Control * Noise Generators & Controlled-Oscillators
* PLLs, LNA, Mixers * Debug & Lab Integration * Customers Support * Presentatio
n, Mentoring & Teaching.

PROFESSIONAL EXPERIENCE
Q1 2010 - End 2010 Enphase Energy, Petaluma, CA
Sr. Principal, Analog/Mixed-Signal/Communication - System & Chipset Architect, A
SIC Group
Leading the architecture & spec. of a System-on-Silicon Chipset (2 CMOS ICs) tha
t is the core of a -Inverter w/ Power-Line Modem in a product for the solar mark
et. The main IC contains: the System-Brain (>1M gates - glue logic & -Processor)
, Sensing & monitoring (Temp/Current sensors & ultra-low offset Inst. Amp, MUXs,
ADCs), Command & Control (I/Os, SPIs, digital serial hi-speed inter-chip-link i
nterface over Hi-V barrier through capacitive coupling, complete Power-Line Comm
unication Modem including advanced AFE). The other ASIC is a Hi-V CMOS IC residi
ng on Hi-Voltages domains, which performs Measurements, Monitoring, and Command
& Control functionalities through the above Hi-Voltage Insulated digital serial
hi-speed interfaces.
* This new chipset architecture significantly increased company margin by multi-
millions Dollars saving, and significantly reduced BOM/power/area, in addition t
o improved functionality & performances.
* Also, responsibility for the Power-Line Communication (PLC) Modem included: pl
anning & performing comprehensive PLC testing (sensitivity, PSD & EMI mask, SNDR
, Packet Error Rate, Impulse Immunity) and architecting, spec.ing & designing of
a complete & innovative AFE for significant COMM improvement.
Q1 2009 - End 2009 SVTI, San Jose, CA
RFIC Technical Project Leader
Head a project to develop an RFIC Front-End IC for a Bluetooth receiver in a 0.1
8m CMOS 7RF IBM process. Conduct system and circuit analyses, behavioral modelin
g, simulations, and design. Define and execute design & testing plans and partne
r with team members to eliminate design and simulation issues. Identify and cust
omize off-the-shelf components. Performed system architecture & spec. for each I
C block, and played a key role in the team designing and simulating blocks.
Q4 2008 Matisse Networks, Mountain View, CA
Senior Analog-Hardware
In this short-term role with a startup company, implemented new procedures to re
duce costs and increase efficiency by defining and streamlining processes while
leading a major project. Developed a high-density, fast, automatic optical power
 control and monitoring board to stabilize input power for the system's optical
amplifier. Partner with optical, mechanical, and hardware engineers as needed. D
eveloped and tested prototypes to reduce risk as needed. Designed system archite
cture, performed analyses, wrote specifications, and performed electronic design
. Conducted block and transistor-level simulation using MathCAD and PSpice. Capt
ured schematics using OrCAD.
* Drove substantial safety improvements by introducing safety monitoring for the
company's high-powered lasers, including monitoring systems, alarms, and physic
al protection on the equipment.
* Implemented new processes and procedures to reduce costs and increase efficien
cy by defining and streamlining processes.
Q3 2006 - Q3 2008 Ikanos Communications, Fremont, CA
Analog Design, Principal Analog-System/Hardware Expert
As senior topic matter expert, supported front-end IC definition and architectur
e and performed system / circuit analyses, design, and simulations critical to a
ccelerating time to market and delivering best-in-class solutions for optimal co
st and performance. Supported and mentored engineers, technicians, and layout sp
ecialists. Facilitated communication between the system and IC design groups. Cr
eated and executed testing and characterization plans. Developed a variety of te
chnical reports and documentation. Interfaced frequently with vendors. Designed
and implemented numerous new topologies and circuits. Designed and tested bring-
up boards for IC characterization.
* Designed IC analog circuitry to solidify the company's competitive position.
* Proved instrumental to revitalizing a customer relationship by resolving a tec
hnical requirement that no competitors could address, creating a circuit to prov
ide performance compensation for a nonstandard lightning protection module that
severely degraded modem performance.
* Uncovered and eliminated a performance problem during final field testing that
had been caused by a third-party vendor, saving the account.
* Developed the complex "Adaptive Hybrid & Line Interface for A/VDSL Modem" bloc
k for a major Tier 1 customer, using in-depth analyses and simulations to ensure
compliance with conflicting requirements and specifications to create a success
ful, cost-effective, highly responsive solution.
Q1 2003 - Q3 2006 Conexant Systems, Broadband Access Networks, Red Bank, NJ
Technical Leader, Analog-System R&D
Provided essential technical expertise to 2 key projects: "Low-Power / -Cost, Hi
gh-Efficiency Class-D Line Driver IC for ADSL2+" and "APF - Miniature Low-Power
/ -Cost Programmable Active POTS Filter for A/VDSL." For each project, identifie
d the need for such a solution, conceptualized it, and delivered a compelling pr
esentation to engineering, marketing, and management teams to secure buy-in. Des
igned IC architecture and developed circuit design, optimization, and system sim
ulation platforms. Partnered with resources such as senior IC designers and othe
r engineers. Wrote technical reports and prepared technical presentations on pro
ject progress and success.
* Delivered a global breakthrough by developing a novel line driver architecture
that met stringent and conflicting ADSL2 requirements for wideband low distorti
ons and high efficiency and low power on the central office side.
* Wrote a patent and co-authored a paper presented at the annual International S
olid State Circuits Conference (ISSCC) for the APF project.
Q2 1999 - Q1 2003 GlobespanVirata (formerly GlobeSpan)
Technical Leader, Analog-System Development
Led joint development of CO ADSL+POTS systems with Agere Systems and Legerity, c
reating a comprehensive and complete solution to integrate GlobespanVirata's sys
tem with those of vendors. Performed extensive measurement and testing, data ana
lysis, and development recommendations. Managed face-to-face and phone conferenc
es to track and drive project progress.
* Overcame the challenge of coordination between marketing and engineering depar
tments of the 2 companies by providing written materials to guide collaboration
and set direction.
* Met or beat all deadlines throughout tenure.
Early Career (additional details on request) ECI Telecom, Petah-Tikva, Israel
Technical Leader, Analog / Mixed Signal R&D
Led the Analog in a joint development of AFE & Line-Driver ICs for ADSL Chipset
w/ Infineon.
* Conceptualized and delivered an industry-first adaptive hybrid block to fulfil
l a project requirement for echo cancellation for lower cost, faster launch, and
less space and power.
* Co-authored a patent and a paper presented at the annual International Solid S
tate Circuits Conference (ISSCC).
Education: MS (& BS) Electrical & Computer Engineering, Ben-Gurion University, B
eer-Sheva, Israel.
SW Tools: MathCAD, MATLAB, PSpice, Spectre, OrCAD, Simulink, Super-Filter, Visi
o, MS Office