This model will give typical performance characteristics for the following parameters. Gain and phase vs bandwidth output current and voltage limiting offset voltage (is non-static, will vary with gain) ibias (again, is static, will not vary with vcm) current on output will be reflected to the supplies.
This model will give typical performance characteristics for the following parameters. Gain and phase vs bandwidth output current and voltage limiting offset voltage (is non-static, will vary with gain) ibias (again, is static, will not vary with vcm) current on output will be reflected to the supplies.
Copyright:
Attribution Non-Commercial (BY-NC)
Available Formats
Download as TXT, PDF, TXT or read online from Scribd
This model will give typical performance characteristics for the following parameters. Gain and phase vs bandwidth output current and voltage limiting offset voltage (is non-static, will vary with gain) ibias (again, is static, will not vary with vcm) current on output will be reflected to the supplies.
Copyright:
Attribution Non-Commercial (BY-NC)
Available Formats
Download as TXT, PDF, TXT or read online from Scribd
* Refer to "README.DOC" file for License Statement. Use of this model * indicates your acceptance with the terms and provisions in the License Stateme nt. * This model will give typical performance characteristics * for the following parameters; * closed loop gain and phase vs bandwidth * output current and voltage limiting * offset voltage (is non-static, will vary with gain) * ibias (again, is static, will not vary with vcm) * slew rate and step response performance * (slew rate is based on 10-90% of step response) * current on output will be reflected to the supplies * vnoise, not included in this version * inoise, not included in this version * Vocm is varable and include input typical offset * distortion is not characterized * cmrr is not characterized in this version. * Node assignments * non-inverting input * | inverting input * | | positive supply * | | | negative supply * | | | | output positive * | | | | | output negative * | | | | | | vocm input * | | | | | | | .SUBCKT ad8138 3a 9 99 50 71b 71 110 ****************************input stage***************************************** ** *****positive input left side***** I1 99 5 .4E-3 Q1 50 2 5 QX vos 3a 2 -1.95E-3 **RAIL CLIPING**** Dlim+ 75 14b dx Vlim+ 99 14b 2.1 Dlim 14c 75 dx Vlim 14c 50 2.1 Dlim- 13b 76 DX Vlim- 13b 50 2.1 Dlim-B 76 13C dx Vlim-B 99 13C 2.1 ** VOCM INPUT RAIL CLIPING**** DOCMa 100 100A dx VOCMa 99 100A 1.899
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