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ICSE2006 Proc.

2006, Kuala Lumpur, Malaysia

Characteristics of Serial Peripheral Interfaces (SPI) Timing Parameters for Optical Mouse Sensor
M.K. Md Arshad, U. Hashim, Chew Ming Choo School of Microelectronic, Kolej Universiti Kejuruteraan Utara Malaysia Blok A, Kompleks Pusat Pengajian KUKUM Jalan Kangar-Arau. 02600 Jejawi PERLIS Tel: 04-9798435 Fax: 04-97984305 E-mail:modkar Abstract - In this paper we report the characterizations results of Serial Peripheral Interface (SPI) timing parameters for optical mouse sensor. SPI is an interface that facilitates the transfer of synchronous serial data. It supports two-way communication between mouse sensor and microcontroller. The test setups were used consist of digital oscilloscope, power supply, mouse sensor, test board and personal computer. The SPI timing parameters that were evaluated are readaddress data delay, the timing between read and subsequent commands, rise and fall time, hold time, setup time, NCS to SCLK active, SCLK to NCS inactive (read operation) and SCLK to NCS inactive (write operation). The timing parameters results were within the limit as specified in product datasheet. Keywords: Serial peripheral interface (SPI), optical mouse sensor.
I.
INTRODUCTION

For years, the standard peripheral for interacting with computers was the mechanical mouse. Douglas Engelbart invented the mechanical computer mouse in the late 1950s [1]. Over the years, mousepads, trackballs, and tablets were developed for use with the mechanical mouse, but computer users complained that mice get dirty, need cleaning, and are imprecise [1]. In late 1999 [2], Agilent Technologies unveiled the first optical mouse, unlike the earlier mechanical models, it has no moving parts. It offers precise tracking, it doesn't need cleaning, and it can be used on nearly any surfaces. Optical mouse actually uses a tiny camera to take 1,500 pictures every second. Able to work on almost any surface, the mouse has a small, red light-emitting diode (LED) that

bounces light off that surface onto a complimentary metal-oxide semiconductor (CMOS) sensor. The CMOS sensor sends each image to a digital signal processor (DSP) for analysis. The DSP, operating at 18 MIPS (million instructions per second), is able to detect patterns in the images and see how those patterns have moved since the previous image. Based on the change in patterns over a sequence of images, the DSP determines how far the mouse has moved and sends the corresponding coordinates to the computer. The data moved and sends is control by microcontroller that later moves the cursor on the screen based on the coordinates received from the mouse. This happens hundreds of times each second, making the cursor appear to move very smoothly. The moving and sending data between mouse sensor and microcontroller is known as Serial Peripheral Interface (SPI) [3-4]. The technique is sending or receiving address and data in serial order and bit by bit. There are full duplex and half duplex of communication line involved in SPI. Half duplex is a one way of communication in a period of time while full duplex is a two way of communication in a period of time [5]. SPI Timing is the timing requires in ensuring read and writes operation between an optical mouse sensor and microcontroller is properly functioning. A basic SPI signal involves Negative Chip Select (NCS), Serial Clock (SCLK) and Serial Data Input and Output (SDIO) for 3-wires [3] of communication line as shown in Figure 1. Communication between optical mouse sensor and microcontroller is essential to make sure read and write operation in an optical mouse sensor perform accordingly to datasheet specification. There are minimum timing requirements between read and write commands on the serial port in order to deliver and receive data correctly. Failure in timing requirement

0-7803-9731-2/06/$20.00 2006 IEEE

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ICSE2006 Proc. 2006, Kuala Lumpur, Malaysia

could lead to failure in cursor movement that display on computer screen. In this paper we characterize a set of SPI timing parameters according to product datasheet specification of an optical mouse sensor. The test setups consist of digital oscilloscope, power supply, mouse sensor, test board and personal computer were used to evaluate the optical mouse sensor.

_optica
M4toue5

NCS
SCLK

IMico-

controller

Figure 1: SPI signals for 3-wires communication are NCS, SCLK, and SDIO. II. EXPERIMENTAL

occur between microcontroller and mouse sensor. Read operation occur requires data information collected from optical mouse sensor while write operation requires to write data to optical mouse sensor. The digital oscilloscope is used to capture the output waveform for SPI timing pins such as SCLK, SDIO and NCS. The sample are tested at different temperature condition for hot temperature (55C), ambient temperature (25C) and cold temperature (-1 5C) by using thermal stream. The samples tested are from different skew units with sample size of three for each skew unit and across three different temperatures. Skew unit is a sample with different gate length on optical array to differentiate the different sensor performing. The combinations of skew units are Fast-Fast, Fast, Nominal, Slow and Slow-Slow. However, in this experiment only three different skew (F, N, SS) units will be evaluated.

A set of SPI timing parameters namely between Read address-data delay (tsRAD), between Read and either Write or subsequent Read commands (tSRW and tsRR), Serial Input and Output Data (SDIO) rise time, SDIO fall time, SDIO hold time, SDIO setup time, Chip Select Input (NCS) to Serial Clock Input (SCLK) active, SCLK to NCS inactive (read operation), SCLK to NCS inactive (write operation), and NCS to SDIO high-Z had been verified. The SPI timing setup is shown in Figure 2 and the result obtained is compare to datasheet limit specification for each of the SPI timing parameter tested. The test starts with loading the HEX code for testing source code into microcontroller at test board through hyper-terminal program at personal computer (PC). Before start of testing, we need to make sure the power supply is on and the mouse sensor LED is light up. Then, perform calibration communication using hyper-terminal command at PC to ensure there is a proper function of data interface between mouse sensor and microcontroller. Each SPI timing parameters are tested separately using a test command at hyper-terminal program. Test command is send through communication port using RS-232 to link to the test board. Test command will control the selection of SPI timing parameters that need to be measured and waveform are captured at digital oscilloscope. Once the test command is to the send microcontroller board, microcontroller will communicate with mouse sensor. The operations of read and write will

Figure 2: SPI timing evaluation test model.


III. RESULTS AND DISCUSSION 1- SPI read address-data delay

Figure 3 shows SPI parameters for SPI read-address data delay. The SDIO ISt byte is address byte contained read operation when most significant bit (MSB) is logic '0'. The ISt byte of SDIO is to represent the address location and 2nd byte of SDIO is data byte. The SPI read addressdata delay (us), tsrad is measure in between of address byte and data byte for SDIO. The tsrad timing delay is important for read operation to avoid last bit of address byte reading overlap with ISt bit of data byte reading. However, when the MSB value is '1' it will indicate the write operation. This SPI parameter also acts as basic concept for others SPI parameters that will be tested. In product datasheet the tsrad is specified

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ICSE2006 Proc. 2006, Kuala Lumpur, Malaysia

at least 4

[ts

and the reading obtained in the

analysis is about 4.014

[ts.

Figure 3: SPI read address-data delay (us), tSRAD. Most significant bit (MSB) to indicate read operation when MSB is logic '0' and write operation when MSB is logic ' 1'.

2 - SPI Timing between read and subsequent commands (tsrr and tsrw) The SDIO serial read-read time (tsrr) and SDIO serial read-write time (tsrw) are the timing between two read commands and the timing

between read and write operation respectively. In the product datasheet, tsrr and tsrw both have their limit specified at a minimum of 500 ns. Due to limitation of the microcontroller and execution cycles taken in processing the instruction, these two (2) parameters were tested at -3.58 [ts.

Figure 4: SPI timing between (a) read-read operations (tsrr) (b) read-write operations.
Figure 4 (a) shows SDIO Ist byte and 2nd are read operation because of the MSB is byte
basic SDIO timing concept, the I st byte is address and 2nd byte is data byte. Therefore, in the case of Figure 4 (b) the SDIO operation is read address and writes data. This operation is known to be SDIO serial read-write time tsrw. Both tsrr and tsrw have about the same timing value which about -3.58 pIs. The timing of two reading operation is to avoid last bit of address

logic '0'. The timing between the read-read operations is being determined as SPI timing for tsrr* Figure 4 (b) shows that ISt byte of SDIO is read operation and follow by 2nd byte is write operation because of the first MSB logic is 'O' and followed by logic '1' respectively. Back to

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ICSE2006 Proc. 2006, Kuala Lumpur, Malaysia

byte reading overlap with 1st bit of data byte in reading (tsrr) and 1st bit of data byte in write operation (tsrw).
3- SDIO Rise & Fall Time

In product datasheet, the SDIO rise time (trsdio) and SDIO fall time (tfsdio) both have their limit specified at 150 ns as typical value. Due to

limitation of the microcontroller and execution cycles taken in processing the instructions, these parameters were tested at 104 ns (SDIO fall time) and -169 ns (SDIO rise time). Figure 5 illustrates that SDIO rise time is indicates by arrow face up and SDIO fall time indicates by arrow face down. Both SDIO rise time and fall time have the same typical value.

Figure 5: SDIO rise and fall time


4 -SDIO Hold Time

In product datasheet, SDIO hold time (thold) has limit of specifying at minimum of 0.5 [ts. Figure

6 indicates SDIO hold time is the timing for data held until next falling SCLK edge. Result tested at -462 ns. SDIO hold time specify the minimum timing required to hold data value in SPI for the sample tested.

Figure 6: SDIO hold time

5 - SDIO Setup Time


In product datasheet, SDIO setup time has limit of specifying at minimum of 120 ns. Figure 7 indicates SDIO setup time is the timing from

data valid to SCLK rising edge Result tested at -254 ns. SDIO setup time is the minimum timing required to) setup for received or sending, data value in SPI for sample tested.

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ICSE2006 Proc. 2006, Kuala Lumpur, Malaysia

Figure 7: SDIO Setup Time

6- NCS to SCLK active


In product datasheet, SDIO setup time has limit of specifying at minimum of 120 ns. Figure 8 shows that from NCS falling edge to first SCLK rising edge is the timing for NCS to SCLK

active. Result tested at -1.16 [ts. NCS to SCLK active meaning NCS is set to active low before the SCLK is active to capture all SDIO value in a frame and is a minimum timing for SCLK to start operates.

LIr~.
-

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Uisngdgefo In prdc

7-SLKoN S Inatv (read operatIon a (readoperation)1hs1limit1of1specifing11111111


daahet__iSI toNSInatv SCL
SCL

Fiur 8 NCS SCL inactive aahe, SCL to to NCactiv


riin

logic Fro las V.


loic'0. Fro

edge

to NC

rising edge fo vai

las SCKrsn

SDI

daatanfri

det

that leads to error of information.

timing for SCLK to NCS inactive (read operation). Result tested at -2.81 [ts. This timing is to ensure a set of two bytes SCLK is running properly then only NCS will inactive for read operation. This may avoid SDIO value missing at the last bit of data byte

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ICSE2006 Proc. 2006, Kuala Lumpur, Malaysia

mre 9: LLN 10NtoN inactive (reac operation) 1


8. SCLK to NCS inactive (write operation)
In product datasheet, SCLK to NCS inactive (write operation) has limit of specifying at minimum of 20 Is. Figure 10 shows SDIO Ist byte indicates a write operation in which MSB is logic '1'. From last SCLK rising edge to NCS rising edge, for valid SDIO data transfer is

timing for SCLK to NCS inactive (write operation). Result tested at -2.63 [ts. This timing is to ensure a set of two bytes SCLK is running properly then only NCS will inactive for write operation. This may avoid SDIO value missing at the last bit of data byte that leads to error of information.

U tm E

Fiur SCL to NCiacie _wi 10

tempratue Figupreti10 SClKtogs

mircnrle aeoeaigispcfatn rage Beieta _esralotsigi_ l teprtr adoeaigvlgs. h daa t hee onitin col.o edslsd ite operation) SPI. TiigEauto:Ts rga a spcii th reitrtob rteo ed nh delay timing required for each parameters being NCSinctver (wri tested

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SPI-ead timing Evaluation isTeste frogra writ esureii that commuiaertionewrtweenr senso andth b

IV. CONCLUSION

SPI-related timing evaluation is tested for write and read operations in optical mouse. This is to ensure that communication between sensor and microcontroller are operating in specification range. Beside that sensor also

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ICSE2006 Proc. 2006, Kuala Lumpur, Malaysia

testing in all temperature and operating voltages. SPI Timing Evaluation Test Program had specific the register to be write or read and the delay timing required for each parameters being tested. Result for each SPI timing parameter tested are comparable to datasheet limit specification across various temperature, voltage and three different skew units.
REFERENCES
[1].
H. J. Choi, D. S. Kwon & M. S. Kim. Design of Novel Haptic Mouse and Its Applications. Proceeding of the 2003 IEEE/RSJ, International

[2].

[3]. [4].

[5].

Conference on Intelligent Robots and Systems, Las Vegas Nevada, pp. 2260-2265, Oct 2003. G. Ji, T. Arabi & G. Taylor. Design and Validation of a Power Supply Noise Reduction Technique. Electrical Performance of Electronic Packaging, pp. 137-140, Oct 2003. Product Datasheet: Optical Mouse Sensor Serial Peripheral Interface Bus, Online http:Hen.wikipedia.org/wiki/microwire (access date 28 May 2006) Smart Computing Dictionary, Serial Peripheral Interface (SPI) (online) http://www.smartcomputing.com/editorial/dicti onary/detail.asp?guid=&searchtype= 1&DicID= 12820&RefType=Dictionary (access date 28 May 2006)

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