Abstract: The aim of this experiment to implement Three-phase switch mode inverter scheme.

Basically, a three-phase switch mode inverter contains the following blocks. Three-phase AC-source at 60 Hz. A full bridge diode rectifier with output filter Three-phase inverter bridge A PWM switching scheme to control the triggering of the switches through gate drive circuit.

The objective is to control the magnitude and frequency of inverter output voltage, across which a three-phase load is connected. We will measure the dc voltage and current on the input side of the inverter and ac voltages and currents on the output side of the inverter. We will further analyze these waveforms to quantify performance indicators such as %THD and harmonics factor to justify use of PWM switching scheme. Procedure : The fig. below shows the wiring diagram of the circuit used to perform this experiment.

The following sections have been identified in the above circuit. 3-phase input ac voltage terminals

3-phase diode bridge rectifier module DC output LC filter and the DC bus. 3-phase inverter bridge which consists of 3 dual pack IGBT modules The inverter ac output voltage terminals The gate drive circuitry and DSP control board which is located in the PC. 3-phase star connected lamp load. The PWM program has been downloaded to DSP controller. Matlab simulink files are used to create an interface between the gate drive circuit and the DSP controller. Now we measure the deadband between each pair of PWM signals on the same inverter leg. We connect switch a to channel 1 and switch b to channel 2 and the data has been captured in to a CSV file. These CSV files are plotted in Matlab and we obtain a deadband of 18.6 -secs as shown in fig. 2. I obtained fig.2 by zooming into fig.1 to view zero crossing This is acceptable to make sure that the IGBTs does not get short-circuited during switching from one switch to the other on the same leg. Fig.1
0.2

0.15

0.1

0.05

-0.05

-0.1

-0.15 -1.5

-1

-0.5

0.5

1.5 x 10
-4

Fig.2

Turn on ten lamps per phase on the load side o inverter and gradually increase the input voltage to the diode bridge rectifier through auto-transformer to obtain a DC output voltage of around 30 V. The following measurements have been obtained.

va_rms vab_rms vbc_rms vca input load load l The following plots are generated using matlab from the captured CSV files [V] [V] [V] 12.9
Va vs Time

Plots on the output side of Inverter :

17.8
d3 a t a

17.6

3 0

2 0

1 0

v a

1 0

2 0

3 0 -0 0 .2 5

-0 0 .2

-0 0 .1 5

-0 0 .1

-0 0 .0 5 T ie m

0 .0 0 5

0 .1 0

0 .1 0 5

0 .2 0

Harmonic spectrum of Va

9 d a ta 8 2

5 Vn
X : 2 9 4 0 Y : 3 . 8 9X 5 : 3 0 6 0 Y : 3 .6 9 4

3
X : 1 6 2 0 X : 1 3 8 0 Y : 2 .2 2 8 Y : 1 .9 8 3 X : 4 3 8 0 Y : 2 . 0 9 8X : 4 6 2 0 Y : 1 .9 1 2

2
X : 4 7 4 0 X : 4 2 6 0 Y : 0 .8 6 2 2 Y : 0 .6 8 9 7

2 0 0 0

4 0 0 0

6 0 0 0 fr e q u e n c y

8 0 0 0

1 0 0 0 0

1 2 0 0

From the above plot, we can obtain the harmonics factor,

H fn =

Vn V1

Frequency 60 1380 1620 2940 3060 4260 4380 4620 4740

Hfn 1 0.238255 0.267692 0.46798 0.44383 0.082867 0.252073 0.143218 0.103592

The total harmonic distortion can be obtained using the following formula
%THD = 100
2 2 V AN , RMS V A1, RMS

V A1, RMS

= 93 .55 % , where we have from measurements

Va = 11.4V and from the frequency spectrum of Va we have fundamental V1= 8.323 V. Observations : The THD we obtained is very high but we can see that due to PWM switching scheme, we are able to displace the harmonics to frequencies which are multiple of mf, which is ratio of switching frequency to the fundamental frequency. The switching frequency we used is 1.5 Khz and the fundamental frequency is 60 Hz. Therefore we have an mf of 25. From Hfn, we can see that the weight of Va components around about switching frequency and its multiples fors a considerable percentage of the fundamental frequency and thats why we obtained a high THD. Now if we employ a capacitor filter across the output of the inverter to filter out higher order harmonics then we can reduce the distortion appreciably as we are going to show next. Also the advantage of PWM switching scheme is that the size of capacitor filter becomes smaller as the frequency components it needs to filter grow higher. Lower order frequency spectrum of Va ( considered upto 15th harmonic) :
9 dt 1 a a 8 7 6 5 V n 4 3 2 1 0 0
X43 :4 Y0 63 :. 6 3 X50 :6 Y0 36 :. 1 5 X80 :8 Y0 09 :. 0 2 X6 :0 Y8 2 :. 3 3

10 0

20 0

30 0

40 0 50 0 feuny r qec

60 0

70 0

80 0

90 0

%THD loh =

0.3683 2 + 0.56 2 + 0.2009 2 * 100 = 8.122 % 8.323

Where V1= 8.323, V7 = 0.3683 , V9 = 0.56 and V15 = 0.2009

Plot of Ia vs Time:

Observations : The current waveform is consistent with the theory. Plot of Van and Vbn:
4 0

3 0

2 0 V n, V n a b

1 0

-0 1

-0 2

-0 3 -. 2 05 0

-. 2 0 0

-. 1 05 0

-. 1 0 0

-. 0 05 0 Te i m

00 . 5 0

01 . 0

01 . 5 0

02 . 0

For analysis purpose , I obtained plot of Van-Vbn, which is shown below

50 40 30 20 10 Van - Vbn 0 -10 -20 -30 -40 -50 -0.025

X: -0.0079 Y: 30

-0.02

-0.015

-0.01

-0.005 0 Time

0.005

0.01

0.015

0.02

Observation : As per theory, the maximum value of Van-Vbn should equal to the Dc side voltage Vd. We can see from the above waveform that (Van-Vbn) max = 30 V, therefore which is consistent. Plots on the input side of inverter : Vd vs Time
3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8 2 7 -0 04 .2 -0 02 .2 -0 0 .2 -0 08 .1 -0 06 .1 -0 04 .1 -0 02 .1 T ie m -0 0 .1 -0 08 .0 -0 06 .0 -0 04 .0

As evident from the plot, average value of Vd is 29.4v, i.e. around 30 V approximately.

V d

Id Vs Time
0 .8 d ta1 a 0 .7 0 .6 0 .5 Id 0 .4 0 .3 0 .2 0 .1 0 -0 2 .0 5

-0 2 .0

-0 1 .0 5

-0 1 .0

-0 0 .0 5 T e im

0 0 .0 5

0 1 .0

0 1 .0 5

0 2 .0

Observations : We obtained Id values which were both positive and negative, as it is on DC side, its value should be positive. Thats why I obtained the above waveform by considering the absolute values of CSV file. The Id average we obtained is 0.125 due to the same reason but for above waveform as we can see its around 0.8 amps.