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I b _:I : \\roto
) :.>. c.l... I (
An FPGA implementation of a C4FM software-defined
radio with Ethernet and JTAG interface
FPGA :--': :' s:'~ --'-- C4FM =-': : ~-:-' '- --~ ~-:- :':-' -:- JTAG
DOWNLOAD
PDF
Design and FPGA implementation of a log-domain
high-speed fuzzy control system
s:'~ --'-- : _=':= FPGA s:'- J:--- s' --~-~ V'- ~-:~ --'- -::: :'
DOWNLOAD
PDF
FPGA implementation of scatter search using Handel-
C
FPGA ----':- J-- :' --'--~' '- :=-~= :' s:'~ --'-- -
DOWNLOAD
PDF
FPGA implementation of HDCP encryption and
decryption on partial frame
FPGA _-'~-:-: : s:'--:-: :' s:'~ --'-- HDCP _-:= ~'--~- '- ~'- s:: :-
DOWNLOAD
PDF
Design and FPGA implementation of a SISO and a
MIMO wireless system for software defined radio
:' s:'~ --'-- : _=':= FPGA SISO --~ _- s' --~-~ : MIMO :':-' -:- s':-
:--': --~ ~-:-
DOWNLOAD
PDF
FPGA implementation of low density parity check
codes decoder
FPGA ::-~: s'-- _~::- ~-=:: --':- -- :' s:'~ --'--
DOWNLOAD
PDF
A novel non-linear load monitoring and identification
scheme with FPGA implementation
: :'- J:--- _== :-- '-: _-'~'-~ r:= s':=' '- FPGA
DOWNLOAD
PDF
A recursive computation of the two-dimensional DCT:
Algorithm, architrecutres and FPGA implementation
:' _-~-:'- ~'-~'=- DCT s-- :- : ---::-' architrecutres s':=' : FPGA
DOWNLOAD
PDF
ARM and FPGA implementations of baseband
processing unit for DRP assisted emergency radio
system
: ~~- FPGA :' s:'~ --'-- s':- --'- c:'-:- -=': DRP s' --~-~ c-':::'
~-- _-:--':
DOWNLOAD
PDF
Design and FPGA implementation of Min-Sum
algorithm and its variants
: _=':= FPGA J-'-= -:-=- ---::-' s:'~ --'-- ' -':-' :
DOWNLOAD
PDF
Low power two-channel PR QMF bank using CSD
coefficients and FPGA implementation
~-'- _-:-- =-':: J'-'- :- ~:-- -- QMF ~-':~ :' --'--~' '- CSD s':=' : FPGA
DOWNLOAD
PDF
Microarchitecture and FPGA implementation of the
multi-level computing architecture
: :-: FPGA *=~ --= ~'-~'=- s:'-- s:'~ --'--
DOWNLOAD
PDF
An FPGA implementation of the advanced encryption
standard with support for counter and feedback
modes
FPGA : -~ s' ~-'= :' _-'---~- '- --:~-- s:'--:-: -:'--'-~' :' s:'~ --'--
-::=:'-
DOWNLOAD
PDF
An FPGA implementation of the image space
reconstruction algorithm for hyperspectral imaging
analysis
FPGA ~- J--=- : -:=- s':- s:'~:'- :-:~- s'~- ---::-' :' s:'~ --'-- :-:
s:'-:- hyperspectral
DOWNLOAD
PDF
Design and FPGA implementation of complex
multipliers using the logarithmic number system
:' s:'~ --'-- : _=':= FPGA --'--~' '- ---=-- :-':- --= _---:'- --- --~-~ :'
DOWNLOAD
PDF
FPGA implementation of MIMO system for symbol-
wavelength-spaced antennas
FPGA --' --~-~ s:'~ --'-- MIMO :'- -~'- :- J:= -'-- s':-
DOWNLOAD
PDF
FPGA implementation of a wireless sensor node FPGA --~ _- :~= s' -:- :' s:'~ --'-- DOWNLOAD
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) :.>. c.l... I (
PDF
FPGA implementation of an unmanned aerospace
vehicle path planning genetic algorithm
FPGA _---: ---::-' _=':= '~-': -~-:~ :-- ---- --~: -': :' s:'~ --'--
DOWNLOAD
PDF
FPGA implementations of elliptic curve cryptography
and Tate pairing over binary field
FPGA -~: :' c-- -~ ~-= ~-- : s:~-- _-=-- s:'-:-: :' --~ s:'~ --'--
_-:-:-
DOWNLOAD
PDF
FPGA implementation of a video watermarking
algorithm
FPGA s:'- '+- :---: ---::-' :' s:'~ --'--
DOWNLOAD
PDF
Multiplierless CSD techniques for high performance
FPGA implementation of digital filters
Multiplierless c:: CSD s':=' s':- V'- _-':'- '- FPGA J'--=-- s' :---- :'
DOWNLOAD
PDF
On the FPGA implementation and performance
analysis of a digital carrier synchronizer
:- FPGA J'--=-- J-'= -'- -:--- J--=- : -:=- : s:'~ --'--
DOWNLOAD
PDF
Active tamper-detector: Hardware mechanism and
FPGA implementation
-:~: J'- - :'~:'~' : s:'~ --'-- : :':-' ~=~ -:--'- FPGA
DOWNLOAD
PDF
Blind adaptive equalization for QAM signals: New
algorithms and FPGA implementation
s' J'--~ s':- _---=- s:-':- ::- QAM : ---::-' s':=' : ---= s' FPGA
DOWNLOAD
PDF
FPGA implementation of a MIMO system with RAKE
receiver
FPGA --~-~ s:'~ --'-- MIMO -:- -= ~-= '- ---:-- '-
DOWNLOAD
PDF
FPGA implementation of a neural network control
system for a helicopter
FPGA :--:-- s':- _-~- s' -~ J:--- --~-~ ~- s:'~ --'--
DOWNLOAD
PDF
An FPGA implementation of the Ewald Direct Space
and Lennard-Jones compute engines
FPGA :' s:'~ --'-- Ewald : '~- ----~- Lennard - ::-:- -~'=- :-:=
DOWNLOAD
PDF
An FPGA implementation of the smooth particle mesh
Ewald Reciprocal Sum Compute Engine (RSCE)
FPGA c- ~'~ ~':- :' s:'~ --'-- Ewald ::-:- -~'=- -:-=- J-'--- ) RSCE (
DOWNLOAD
PDF
An FPGA implementation of face detection and lip
feature extraction
FPGA ~- ':=-~' ~---'- : ~::~ c-=~- s::'-- :' s:'~ --'--
DOWNLOAD
PDF
Design and FPGA implementation of trellis coded
modem based on DVB standard
s:'~ --'-- : _=':= FPGA :- --:- ~~-:'- -- :' DVB -:'--'-~' c'~' :-
DOWNLOAD
PDF
FPGA implementation of a digital communication
chain
FPGA _-'--=-- ='--:' -:-=-: ~- s:'~ --'--
DOWNLOAD
PDF
FPGA implementation of video noise estimation for
real-time processing
FPGA _-': '-: c:'-:- s':- '-~ : :~ :---: s'+~='~ :' _- s:'~ --'--
DOWNLOAD
PDF
FPGA implementation of congestion control routers in
high speed networks
FPGA V'- ~-:~ '- s' -~ :- -'=-:' J:--- s':-:: :' s:'~ --'--
DOWNLOAD
PDF
IP protection for DSP algorithms' FPGA
implementation
-::- ~-~ ':~-'- s' ---::-' s:'~ --'-- s':- _- s' :' ~='-= ' FPGA
DOWNLOAD
PDF
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) :.>. c.l... I (
A distributed arithmetic-based CORDIC algorithm and
its use in the FPGA implementation of the 2-D IDCT
---::-' :- _---- -::- ~'~= CORDIC :- ' :' --'--~' : FPGA :' s:'~ --'-- ' -
- IDCT
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PDF
An FPGA implementation of RM-BTC codec using Log-
MAP algorithm
FPGA --- :' --'--~' '- ::- -': :' J:--- :' s:'~ --'-- - BTC ---::-' ~-- -:::
DOWNLOAD
PDF
FPGA implementation of wavelet transform for image
compression
FPGA :-:~- s:'~ --:~- s':- ~=:- J---- :' s:'~ --'--
DOWNLOAD
PDF
ASIC microcontroller design of a radiation monitoring
system using VHDL modeling and FPGA
implementation
ASIC s':=' : ~:'=- c-'- :' --'--~' '- s:'~ J-- --~-~ ~- _=':= :-:---::--
FPGA VHDL
DOWNLOAD
PDF
FPGA implementation of adaptive interference
canceler for periodic signal
FPGA :' s:'~ --'-- canceler _-:'-- J'--~ s':- _---=- ~-'=-
DOWNLOAD
PDF
FPGA implementation of RNS structures s' -:'~ s':=' FPGA RNS
DOWNLOAD
PDF
An FPGA-based 77 GHzs RADAR signal processing
system for automotive collision avoidance
`` FPGA :- _---- GHzs -::=:- :' ~'--=' s':- J'--~ c:'-:- --~-~ :'-':
::-:=
DOWNLOAD
PDF
An FPGA implementation of a C4FM software-defined
radio with Ethernet and JTAG interface
FPGA :--': :' s:'~ --'-- C4FM =-': : ~-:-' '- --~ ~-:- :':-' -:- JTAG
DOWNLOAD
PDF
An implementation of high performance FPGA-based
genus 3 HECC
c-= V'- _-':'- '- s:'~ --'-- FPGA :- _---- * HECC
DOWNLOAD
PDF
A study of on-chip FPGA system with 2D mesh
network
~':- s:: :- --~-~ -'=- FPGA c- -~ :' --'--~' '- ' D
DOWNLOAD
PDF
Design and FPGA implementation of a log-domain
high-speed fuzzy control system
s:'~ --'-- : _=':= FPGA s:'- J:--- s' --~-~ V'- ~-:~ --'- -::: :'
DOWNLOAD
PDF
Dual-LED bio-agent detection system design based on
FPGA
c'~' :- --~-~ _=':= c-=~- J-'- _-~-: s:-: - -'-:- FPGA
DOWNLOAD
PDF
Emulation of systemC applications for portable FPGA
binaries
s-:-:'- s' -'-:- :' ----- systemC s':- FPGA J-= J-'- s:--'-
DOWNLOAD
PDF
FPGA based fuzzy intrusion detection system for
network security
FPGA -~ ~---' s':- s:'- --~-~ c-=~- :--:-- c'~' :-
DOWNLOAD
PDF
FPGA-based real-time simulation of variable speed AC
drive
FPGA s:'~ --~ :- _---- :- :--- ~-:~ '- _----': :' _-': '-:
DOWNLOAD
PDF
FPGA based timing module and optical
communication card design for spallation neutron
source
J::'- FPGA : s::- s--- '-: c'~' :- --- s':- ~:'- _=':= ~'='--:'
spallation ::-:-
DOWNLOAD
PDF
FPGA implementation of scatter search using Handel-
C
FPGA ----':- J-- :' --'--~' '- :=-~= :' s:'~ --'-- -
DOWNLOAD
PDF
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) :.>. c.l... I (
FPGA implementation of HDCP encryption and
decryption on partial frame
FPGA _-'~-:-: : s:'--:-: :' s:'~ --'-- HDCP _-:= ~'--~- '- ~'- s:: :-
DOWNLOAD
PDF
Performance analysis of a scalable hardware FPGA
Skein implementation
:--- c'--- :':-' ~=~ -:--- J--=- : -:=- FPGA ~>- --~ s:-= : s:'~ --'--
--=--
DOWNLOAD
PDF
Reconfigurable stand-alone multi-channel data
acquisition, archiving, monitoring and processing
system using FPGA-SOPC technology with
heterogeneous maximal service scheduling
Reconfigurable :- ~:'=- : c:'-:- :-~:' ~'->=' J-~=- -'-'- --= J--~-
:' --'--~' '- --~-~ FPGA - SOPC :--'-= ~'--= s:-: -'-:- '- -'- s::-:--
DOWNLOAD
PDF
Utilisation de la reconfiguration dynamique des FPGA
pour le controle precis et exact des delais dans les
convertisseurs temps a numerique
Utilisation -:'-:- s--- :-- V - dynamique ---:'-:- FPGA :- ::- controle
':'- ~-'=- c:-: ~>= ---:'-:- --- delais dans - convertisseurs
temps Numrique
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PDF
VoteBox Nano: A smaller, stronger FPGA-based voting
machine
VoteBox :-'- : :- s:- :-=:- FPGA -~'- :- _---- s:-- s':
DOWNLOAD
PDF
A low-power FPGA-based AES coprocessor ~:-- -- FPGA :- _---- coprocessor AES
DOWNLOAD
PDF
A multiprocessor platform based on FPGA technology
targeted for a driver vigilance monitoring device
s::'-- -'- :- :'-:- --= s:':-' -:- s' :-~- FPGA ~- ~--':- -'-~- ----': s':-
~:'=-
DOWNLOAD
PDF
Analytic methods for the FPGA placement problem -'- :':- J~- s':- _---=- c:: FPGA
DOWNLOAD
PDF
Asynchronous designs on FPGA with soft error
tolerance for security algorithms
s:: :- ::-~' _=':= FPGA ~---' s' ---::-' s':- s:':-' -:- s'== J-=- '-
DOWNLOAD
PDF
A Verilog 8051 soft core for FPGA applications Verilog 8051 s-:-:'- s' -'-:- s':- s:':-' -:- -~ FPGA
DOWNLOAD
PDF
Compilation efficace pour FPGA reconfigurable
dynamiquement
efficace ::- ~--'- dynamiquement FPGA reconfigurable
DOWNLOAD
PDF
Design and FPGA implementation of a SISO and a
MIMO wireless system for software defined radio
:' s:'~ --'-- : _=':= FPGA SISO --~-~ : --~ _- s' MIMO :':-' -:- s':-
:--': --~ ~-:-
DOWNLOAD
PDF
Design and evaluation of an "FPGA based" hardware
accelerator for elliptic curve cryptography point
multiplication
_-'-::' : _=':= " :- _---- FPGA " s:~-- s:'-:-: s':- s:':-' ~=~ ---- ~'-~
=-- ~:~ _-=--
DOWNLOAD
PDF
Energy efficiency analysis and implementation of AES
on an FPGA
s:'~ --'-- : s::-' s:: -:+- J--=- : -:=- AES :- FPGA
DOWNLOAD
PDF
Feasibility analysis of FPGA based spindle motor
controller
_=-~ '-' J--=- : -:=- FPGA _~-: *- -:- ----- J:--- ::-:- :- _----
DOWNLOAD
PDF
FPGA-based soft vector processors FPGA -:- :'-:- ---:'-:- :- _----
DOWNLOAD
PDF
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) :.>. c.l... I (
FPGA-based MPEG-4 video encoder SOPC design with
performance acceleration of motion estimation block
FPGA :- _---- MPEG - 4 _=':= :'-- :-: :---: SOPC -:-- -:--- ~'-~ '-
-::':- ~-:=
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PDF
FPGA-based real time processing of time-varying
waveform distortions and power disturbances in
power systems
FPGA :- J~ '=:-' ~:'--- '-: :' _-': '-: c:'-:- :- _---- ~V>-=' :
~:-- s' --~-~ :- ~:--
DOWNLOAD
PDF
FPGA design of a CDMA system for multiuser
detection based on iterative processing
_=':= FPGA --~-~ :' Travian.ir : c-=~- s':- multiuser c:'-:- c'~' :-
s:':-
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PDF
FPGA implementation of low density parity check
codes decoder
FPGA ::-~: s'-- _~::- ~-=:: --':- -- :' s:'~ --'--
DOWNLOAD
PDF
From synchronous to GALS, the architecture of FPGA --- s:'~ '-:- :' ! s:'-- FPGA
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PDF
Implementation of Genetic Algorithms in FPGA-based
Reconfigurable Computing systems
:- _---- s' --~-~ :- ~---: ---::-' s:'~ --'-- FPGA -'-': Reconfigurable
DOWNLOAD
PDF
Linearization of RF power amplifiers using digital
predistortion technique implemented on a DSP/FPGA
Platform
c:: :' --'--~' '- ~:-- _-:--': s' ----- ~-:-- :' _== predistortion s'
-::- ~-~ ':~-'- :- J'--=-- / FPGA ':=' s:':-' -:- s' :-~-
DOWNLOAD
PDF
Nanoelectronic dynamically reconfigurable FPGA
design and design automation
'-:- ~::~ - ~--::--':-'- reconfigurable _=':= FPGA _=':= :-~'-:-' :
DOWNLOAD
PDF
Packet-based transaction interconnect fabric for
FPGA systems on chip
~':- :- s' --~-~ s':- =:'- -:- J~: -+- --'- :- _---- -~- FPGA
DOWNLOAD
PDF
Post-mapping topology rewriting for FPGA area
minimization
-=-- --'~: J-'-= - s':- _~-:-:'- s::-:-:- s:'-:- ~-- :' c- FPGA
DOWNLOAD
PDF
Resynthesis techniques for FPGA optimization s:'~ --+- s' ~--- Resynthesis s':- FPGA
DOWNLOAD
PDF
Simulation of quantization noise effects on the
performance of a wireless preamble detector and
demonstration of a functional FPGA prototype
:' ~':'=- : --~ _- s' ---- :'~:'~' -:--- :- -:-- J>-=' :-' s:'~ --~
-:-- FPGA s-:-:'-
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PDF
A fault tolerant FPGA architecture s:'-- J-=-- J~- FPGA
DOWNLOAD
PDF
A high-speed iterative closest point tracker on an
FPGA platform
s:':- V'- ~-:~ '- -:- ~-- :- :---: =-- -:- ~--:- FPGA
DOWNLOAD
PDF
An FPGA architecture design of a high performance
adaptive notch filter
FPGA _---=- :---- V'- _-':'- '- _---:- ~- :' s:'-- _=':=
DOWNLOAD
PDF
A novel non-linear load monitoring and identification
scheme with FPGA implementation
_-'~'-~ r:= s':=' '- : :'- J:--- _== :-- '-: FPGA
DOWNLOAD
PDF
A profiler for a heterogeneous multi-core multi-FPGA
system
--= s' --~-~ s' -~ --= s' -'- s':- :----~-- FPGA
DOWNLOAD
PDF
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) :.>. c.l... I (
A recursive computation of the two-dimensional DCT:
Algorithm, architrecutres and FPGA implementation
:' _-~-:'- ~'-~'=- DCT s-- :- : ---::-' architrecutres s':=' : FPGA
DOWNLOAD
PDF
ARM and FPGA implementations of baseband
processing unit for DRP assisted emergency radio
system
: ~~- FPGA s':- --'- c:'-:- -=': :' s:'~ --'-- DRP s' --~-~ c-':::'
~-- _-:--':
DOWNLOAD
PDF
Design and FPGA implementation of Min-Sum
algorithm and its variants
: _=':= FPGA ' -':-' : J-'-= -:-=- ---::-' s:'~ --'--
DOWNLOAD
PDF
Development of an FPGA based autopilot hardware
platform for research and development of
autonomous sytems
~:- FPGA : --=- s':- ~--'-:-' '--= :':-' ~=~ :- _---- s:':-' -:- s' :-~-
:' ~:- sytems J--~-
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PDF
FPGA acceleration of a cortical and a matched filter-
based algorithm
~'-~ FPGA ---::-' :- _---- :---- '~- : :- :~- :'
DOWNLOAD
PDF
FPGA acceleration of molecular dynamics simulations ~'-~ FPGA _-:-:- ~--'--- s:'~ --~ :'
DOWNLOAD
PDF
FPGA based hardware acceleration for brain-state-in-
a-box models in neuromorphic computing
FPGA ~'-~'=- :- J-- -= :- ~-:- :- :- _---- s:':-' ~=~ ~'-~
neuromorphic
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PDF
FPGA control system for Atomic Force Microscope FPGA _--' s::-- ~:~::-- s':- J:--- --~-~
DOWNLOAD
PDF
FPGA design and performance analysis of SHA-512,
Whirlpool and PHASH hashing functions
_=':= FPGA '~ :' -:--- J--=- : -:=- : - '' : s::= PHASH c -':-
-:-
DOWNLOAD
PDF
Hardware-assisted path profiling in microprocessor
systems implemented on top of an FPGA
sV'- :- ---:'-:- :-: s' --~-~ :- :-~- J-'-::- ~-- - :':-' ~=~ FPGA ':='
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PDF
Implementation d'un processeur video sur FPGA pour
la detection et la correction de reflexions speculaires
dans des images endoscopiques
s:'~ --'-- d ' J-- '-:'~ -=-- processeur _-:-= :---: FPGA V V ':'- : ::-
- *-=~- c-=~- reflexions speculaires dans :-:'~- c-:'-
endoscopiques
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PDF
Implementation of JPEG compression and motion
estimation on FPGA hardware
s:'~ --'-- JPEG :':-' ~=~ s:: :- ~-:= -::':- : s:'~ --:~- FPGA
DOWNLOAD
PDF
Improving FPGA designs with incremental logic
resynthesis and shortcut-based routing architecture
_=':= -:-+- FPGA '- resynthesis :- _---- _-'-:-~- :--'-- : _~-':-' =--
s:'--
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PDF
Low power two-channel PR QMF bank using CSD
coefficients and FPGA implementation
~-'- _-:-- =-':: J'-'- :- ~:-- -- QMF ~-':~ :' --'--~' '- CSD s':=' : FPGA
DOWNLOAD
PDF
Microarchitecture and FPGA implementation of the
multi-level computing architecture
: :-: FPGA *=~ --= ~'-~'=- s:'-- s:'~ --'--
DOWNLOAD
PDF
Modeling routing demand for early-stage FPGA
architecture development
s:'-- ~:- --:' J=':- :- _-'-:-~- s':- s'~'-- s:'~ J-- FPGA
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PDF
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) :.>. c.l... I (
Performance and area optimization for reliable FPGA-
based shifter design
:- _---- -'---' J-'- :'-- _=':= s':- -=-- s:'~ --+- : ':=' FPGA
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PDF
Portable and scalable FPGA-based acceleration of a
direct linear system solver
~'-~ :--- c'--- : J-= J-'- FPGA _== --~-~ ----~- ----- J= :- _----
DOWNLOAD
PDF
Prototype of a power measurement system using an
FPGA-based embedded MicroBlaze soft-processor
:- _---- s' s:-- -:'--' :' --'--~' '- ~:-- --~-~ ~- :' --:' -:-- FPGA ---
--~ MicroBlaze ---:'-:- -:-
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PDF
Prototypage rapide de la commande vectorielle sur
FPGA a l'aide des outils simulink-system generator
Prototypage rapide V - commande vectorielle _-:-= FPGA l ' ::'~-
---:'-:- outils simulink ::-':-: --~-~
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Real-time FPGA architectures for space-time
frequency-planar MDSP
s':- _-': '-: FPGA c-'-:- *=~- '-: '~- s:'-- MDSP
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SAR raw data compression using FPGA technology s::-:-- :' --'--~' '- -'= s' --'- s:'~ --:~- -:~- FPGA
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The LINPACK Benchmark on a multi-core multi-FPGA
system
:'-- LINPACK - --= s' -~ --= s' --~-~ : FPGA
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Algorithms acceleration by a reconfigurable
computing platform of FPGA
~'-~'=- -:- ~-- s' ---::-' ~'-~ reconfigurable :' FPGA
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PDF
A multi-layer FPGA framework supporting
Autonomous Runtime Partial Reconfiguration
~:=:'= -V --= FPGA -:'-:- s--- :-- :' _--~- ':=' '-: :'-=--:= ~-'-=
DOWNLOAD
PDF
An FPGA based digital radio for meteor radar
applications
FPGA _-'-~' ~-~ ~'+~ :-- :'-': s'-:-:'- s':- J'--=-- :--': :- _----
DOWNLOAD
PDF
An FPGA implementation of the advanced encryption
standard with support for counter and feedback
modes
FPGA ~-'= :' _-'---~- '- --:~-- s:'--:-: -:'--'-~' :' s:'~ --'-- : -~ s'
-::=:'-
DOWNLOAD
PDF
An FPGA implementation of the image space
reconstruction algorithm for hyperspectral imaging
analysis
FPGA s':- s:'~:'- :-:~- s'~- ---::-' :' s:'~ --'-- :-:~- J--=- : -:=-
s:'-:- hyperspectral
DOWNLOAD
PDF
A novel algorithm for lossless data compression and
its implementation on a FPGA
--:~- s':- '-: ---::-' :- ' s:'~ --'-- : ' --'- ~-- _- s:'~ FPGA
DOWNLOAD
PDF
BORPH: An operating system for FPGA-based
reconfigurable computers
BORPH : :- _---- s' -'-': s':- J-'- --~-~ FPGA reconfigurable
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PDF
Decomposition tool targeting FPGA architectures -'- :':- ~- -:=- :':-' FPGA s:'--
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PDF
Design and FPGA implementation of complex
multipliers using the logarithmic number system
:' s:'~ --'-- : _=':= FPGA _---:'- --- --~-~ :' --'--~' '- ---=-- :-':- --=
DOWNLOAD
PDF
Design and implementation of a high resolution,
multi-hit time-to-digital converter (TDC) on FPGA
J--- J'--=-- - - -:~ --= V'- r:~: '- s:'~ --'-- : _=':= ) TDC ( :- FPGA
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) :.>. c.l... I (
Design of low-floor quasi-cyclic IRA codes and their
FPGA decoders
''~-:-: ': -:= : ':-' s'-- _-:'-- -~ --= -- _=':= FPGA
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Embedded e-maintenance for an FPGA-based
reconfigurable system
:- _---- --~-~ ~- s':- s:'-+- : :--- _--::--' s:'~'= FPGA
reconfigurable
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PDF
FPGA-based lossless data compression using GNU Zip FPGA _-~- :-- :' --'--~' '- ' --'- ~-- _- s:'~ --:~- :- _----
DOWNLOAD
PDF
FPGA implementation of MIMO system for symbol-
wavelength-spaced antennas
FPGA --' --~-~ s:'~ --'-- MIMO :'- -~'- :- J:= -'-- s':-
DOWNLOAD
PDF
FPGA implementation of a wireless sensor node FPGA --~ _- :~= s' -:- :' s:'~ --'--
DOWNLOAD
PDF
FPGA implementation of an unmanned aerospace
vehicle path planning genetic algorithm
FPGA _---: ---::-' _=':= '~-': -~-:~ :-- ---- --~: -': :' s:'~ --'--
DOWNLOAD
PDF
FPGA implementations of elliptic curve cryptography
and Tate pairing over binary field
FPGA -~: :' c-- -~ ~-= ~-- : s:~-- _-=-- s:'-:-: :' --~ s:'~ --'--
_-:-:-
DOWNLOAD
PDF
FPGA implementation of a video watermarking
algorithm
FPGA s:'- '+- :---: ---::-' :' s:'~ --'--
DOWNLOAD
PDF
FPGA prototyping of a watermarking algorithm for
MPEG-4
s:'~ -:-- FPGA s:'- '+- s':- ---::-' ~- :' MPEG - 4
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PDF
GAPLA: A globally asynchronous locally synchronous
FPGA architecture
GAPLA : s:'-- '-:- _-=- ~::~ - '+= *=~ :- '-:-'- FPGA
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Hardware accelerated local search for FPGA
placement
-'- :':- s':- _-=- s:=-~= ~'-~ :':-' ~=~ FPGA
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PDF
Implementing real-time video deblocking in FPGA
hardware
:---: _-': '-: s:'~ --'-- deblocking :- FPGA :':-' ~=~
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Improved haptic fidelity via reduced sampling period
with an FPGA-based real-time hardware platform
-:-+- s:'-'-: haptic '- s:'-:- -:-- -::- c'- -:= :' FPGA -:- ~-- :- _----
_-': '-: :- s:':-' ~=~ s'
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Integrated sorting, noise estimation, object detection
and contour analysis on one FPGA for video object
segmentation
s:: :- :-~- J--=- : -:=- : _~ c-=~- '-~ : :~ -::':- --=- s:'~ ~-:-
~- FPGA _~ :---: =- =- s':-
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Multiplierless CSD techniques for high performance
FPGA implementation of digital filters
Multiplierless c:: CSD s':=' s':- V'- _-':'- '- FPGA J'--=-- s' :---- :'
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Novel SRAM-based FPGA architectures and
supporting CAD tools
'-: SRAM s:'-- :- _---- FPGA '-'-'- :V- :':-' :' ~-'-= :
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On the FPGA implementation and performance
analysis of a digital carrier synchronizer
:- FPGA J'--=-- J-'= -'- -:--- J--=- : -:=- : s:'~ --'--
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) :.>. c.l... I (
Power-aware design methodologies for FPGA-based
implementation of video processing systems
s':=' s':- _=':= s' c:: :' -'-' ~:-- FPGA :---: c:'-:- s' --~-~ :- _----
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Power consumption in FPGA based bit-serial and bit-
parallel digital filter systems
:- :- ~:~- FPGA J'--=-- s' --~-~ _--- s:':- : J'-:~ s' _--- c'~' :-
:----
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Realization of a cryptographic algorithm in FPGA
based on an authentication protocol for RFID smart
tags
s:: :- ~-: :':=' J-::- :- s:'-:-: ---::-' ~- -=- FPGA s' ~- s':-
s- s' ~' :' :- _---- ---~:
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Reconfigurable heterogeneous DSP/FPGA based
embedded architectures for numerically intensive
computing workloads
Reconfigurable -'- -::- ~-~ ':~-'- / FPGA s:'-- c'~' :- --~ ---
s':- workloads -:-: s--- ~'-~'=-
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Software profiling for an FPGA-based CPU core :- _---- ---:'-:- -~ s':- s:':-' -:- J-'-::- FPGA
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Symmetric multiprocessor design for hybrid
CPU/FPGA SoCs
--:-- s' ---:'-:- s':- _=':= :'--- :'-:- --= / FPGA SoCs
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The automated compilation of comprehensive
hardware design search spaces of algorithmic-based
implementations for FPGA design exploration
_---- ---::-' s:'~ --'-- _=':= s''~- :- :=-~= :':-' ~=~ -'= :'--:= _-----
_=':= s':- ~'~--' :- FPGA
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A C compiler for implementing FPGA based bit-serial
DSP systems
s':- :--'--'- ~' FPGA -::- ~-~ ':~-'- --~-~ J'-:~ _--- c'~' :- s:'~ --'--
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Active tamper-detector: Hardware mechanism and
FPGA implementation
-:~: J'- - :'~:'~' : s:'~ --'-- : :':-' ~=~ -:--'- FPGA
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A FPGA-based real-time hardware RF channel
simulator
FPGA _-:--': J'-'- :'~ --~ :':-' ~=~ _-': '-: :- _----
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An abstract target architecture for FPGA compilation J-'--'- s':- _-':--' ~- s:'-- FPGA
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A novel algorithm for fixed-point and floating-point
matrix multiplication on a FPGA
~-'- s':- ---= ---::-' :- c-:-'- ~:~ ::'-~ :--- : =-- FPGA
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A parallel programming model for a multi-FPGA
multiprocessor machine
--= :'-:- --= -'-~- s':- s:':- _~-:- -'-:- J-- FPGA
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A table look-up pipelined multiplication-accumulation
co-processor for H.264, and, An intellectual property
authentication scheme for FPGA through
watermarking techniques
-:- -'- J:-= pipelined - s':- ---:'-:- ~-:~ -=- ~:~ H.264 ~--'- :
s':- ::= r:= s:-- FPGA s:'- '+- s' ~--- -:= :'
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Blind adaptive equalization for QAM signals: New
algorithms and FPGA implementation
s' J'--~ s':- _---=- s:-':- ::- QAM : s':=' : ---= s' ---::-' FPGA
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Design and implementation of an FPGA-based
scalable pipelined associative SIMD processor array
with specialized variations for sequence comparison
and MSIMD operation
:' s:'~ --'-- : _=':= FPGA :--- c'--- :- _---- pipelined :~:'-:- -':'
SIMD ~':--- '- _--=-' : ~'---- _-':- ~-'-- s':- ': _~'= MSIMD
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Design of digital beamformers for high-frequency
ultrasound transducer arrays using field-
programmable gate array (FPGA)
_=':= beamformers -':' :' --'--~' '- V'- c-'-:- '- --:~':--:' J--- s':- J'--=--
-:'::- _-'--- s:-: -'-:- J-'- s' -':' ' ) FPGA (
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Development and implementation of interactive
three-dimensional video environment on Run-Time
Reconfigurable FPGA platform
':=' '-: :- s-- ~ :---: _--'- s' =-=- s:'~ --'-- : ~:- Reconfigurable
-:- ~-- FPGA
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Development of FPGA based low-power digital pulse
height fitting
:- _---- ~:- FPGA ~V'~-' J'--=-- c-'- -'--:' ~:-- --
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Emulation of ASIC based network processor on a
FPGA platform
:' ----- ASIC -:- ~-- c'~' :- -~ ---:'-:- FPGA
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Expanding stereo-disparity range in an FPGA-system
while keeping resource utilisation low
--:-=- :- ~>-=' :-:-~' c:-~- FPGA -- -'-- :' --'--~' - _-'= :- --~-~
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FPGA-based switch-level fault emulation using
modular-based dynamic partial reconfiguration
FPGA :- _---- '-:- :V:-- s' :'~ --~ :' --'--~' '- J~- *=~ :- --:~ :- _----
_-:= ~'--~- '- -:'-:- s--- :--
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FPGA based implementation of a DLX pipeline design s':=' FPGA -:- == _=':= :- _---- DLX
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FPGA-based hardware accelerator design for
performance improvement of a system-on-a-chip
applications
FPGA s' -'-:- -:--- -:-+- s':- ---- ~'-~ _=':= :':-' ~=~ :- _----
~':- ~- s:: --~-~ s-:-:'-
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FPGA emulation of quantum circuits :' ----- FPGA _-:--':- s':'--
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FPGA implementation of a MIMO system with RAKE
receiver
FPGA --~-~ s:'~ --'-- MIMO :- -= ~-= '- ---:-- '- -
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FPGA implementation of a neural network control
system for a helicopter
FPGA :--:-- s':- _-~- s' -~ J:--- --~-~ ~- s:'~ --'--
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FPGA particle graphics hardware FPGA _--':- :':-' ~=~ ~':-
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FPGA prototyping for fast and efficient verification of
ASIC H.264 decoder
s:'~ -:-- FPGA :' --':'- : -:~ ---'- s':- ASIC ::-~: H.264
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LAMP: Tools for creating application-specific FPGA
coprocessors
~-V : -'=-' s':- :':-' -:-':'- coprocessors c'= -'-:- FPGA
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Mapping sparse matrix scientific applications onto
FPGA-augmented reconfigurable supercomputers
:-' s:: :- s-:-:'- s' -'-:- _--- ----':- c-:-'- s:'-:- ~-- FPGA - J---
reconfigurable
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Physical synthesis techniques for FPGA optimization :--~ s:'~ --+- s':- _-:-- s' c:: FPGA
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Run-time scheduling support for hybrid CPU/FPGA
SoCs
--:-- s' ---:'-:- s':- s:-: -'-:- _-'---~- ':=' '-: / FPGA SoCs
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Speed and area consumption analysis of memory
based FFT processors in a FPGA
s' ---:'-:- =-'= ~:~- J--=- : -:=- *=~ : ~-:~ FFT :- :--~- FPGA
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Timing and congestion driven algorithms for FPGA
placement
s':- ---::-' ---': --':- : '-: FPGA -'-
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VLSI architecture and FPGA prototyping of a secure
digital camera for biometric application
s:'-- VLSI FPGA :':-' -:- s':- -' J'--=-- --::- ~- :' s:'~ -:-- :
~-:--:--
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A high-speed inter-process communication
architecture for FPGA-based hardware acceleration of
molecular dynamics
:- _---- :':-' ~=~ -:~- s':- ~'='--:' s:'-- ---':- -- V'- ~-:~ '- FPGA :'
_-:-:- ~--'---
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A high-speed, low power silicon germanium BiCMOS
FPGA with new features for applications
~:-- -- V'- ~-:~ -:--'-:: :---~ BiCMOS FPGA s':- ---= s' _-:-: '-
s-:-:'- s' -'-:-
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An FPGA-based singular value decomposition
processor
FPGA -:=- :~:'-:- --'-' :- c::' :- _----
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An FPGA-based hardware development system with
multi-gigabyte memory capacity and high bandwidth
FPGA ~=~ ~:- :- _---- --'- s'-+- : =-'= ~-'-'-- --= ~--:= '- --~-~ s:':-'
V'-
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An FPGA based multi-spectrum data fusion and image
processing method with application to embedded
ladar imaging
FPGA s':- :':-' -:- '- s:-:~- c:'-:- c:: : ' --'- _----- ~-= --= c'~' :-
s:'-:- :-:~- ladar --~ s:'~'=
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An FPGA implementation of the Ewald Direct Space
and Lennard-Jones compute engines
FPGA :' s:'~ --'-- Ewald : '~- ----~- Lennard - ::-:- -~'=- :-:=
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An FPGA implementation of the smooth particle mesh
Ewald Reciprocal Sum Compute Engine (RSCE)
FPGA c- ~'~ ~':- :' s:'~ --'-- Ewald ::-:- -~'=- -:-=- J-'--- ) RSCE (
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An FPGA implementation of face detection and lip
feature extraction
FPGA s:'~ --'-- ~- ':=-~' ~---'- : ~::~ c-=~- s::'-- :'
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Area optimizations in FPGA architecture and CAD -=-- :- s:'~ --+- FPGA '-'-'- s:'-- :
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Constructive/iterative based technique for FPGA
placement
'--='~ / c'~' :- -'- :':- s':- c:: ::- FPGA
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Design and FPGA implementation of trellis coded
modem based on DVB standard
s:'~ --'-- : _=':= FPGA :- --:- ~~-:'- -- :' DVB -:'--'-~' c'~' :-
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Design of an FPGA-based computing platform for real-
time three-dimensional medical imaging
:- _---- -:- ~-- _=':= FPGA s-- ~ s:'-:-:-:~- _-': '-: s':- ~'-~'=-
_~:-
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Embedded image feature extraction system on a
single FPGA chip
~':- s:: :- --~-~ s' _-:-: :' :-:~- ':=-~' --~ s:'~'= FPGA '+--
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Extending the thread programming model across CPU
and FPGA hybrid architectures
: ---:'-:- :~':~ :- s:-: -'-:- J-- -':' -:~:- =~- FPGA s:'-- s--:--
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FPGA based computing platform with temporal
partitioning mechanism
FPGA _-'-: s--- ~--:'- : :'~ '- ~'-~'=- :- _---- s:':-' -:- s' :-~-
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FPGA-based real-time embedded and reconfigurable
ladar scanning and dynamic correction during video
acquisition of non-standard frames with arbitrary
sizes
FPGA : --~ --- _-': '-: :- _---- ladar reconfigurable '-:- r>~' : ~'
- s' -:'--' '- -:'--'-~' :-- s' --:- :' :---: J-~=- J:= :- -':=-
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FPGA implementation of a digital communication
chain
FPGA _-'--=-- ='--:' -:-=-: ~- s:'~ --'--
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FPGA implementation of video noise estimation for
real-time processing
FPGA _-': '-: c:'-:- s':- '-~ : :~ :---: s'+~='~ :' _- s:'~ --'--
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FPGA implementation of congestion control routers in
high speed networks
FPGA V'- ~-:~ '- s' -~ :- -'=-:' J:--- s':-:: :' s:'~ --'--
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Globally asynchronous locally synchronous designs on
FPGA
:- '-:- _-=- s' r:= _-'+= *=~ :- '-:-'- FPGA
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Low power FPGA design techniques for embedded
systems
~--- ~:-- -- s' FPGA --~ s:'~'= s' --~-~ s':- _=':=
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Micronetwork based system-on-FPGA (SoFPGA)
architecture
Micronetwork s:: :- --~-~ c'~' :- FPGA (SoFPGA ( s:'--
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Place and route techniques for FPGA architecture
advancement
s:'-- -:-~-- s':- ': :-~- s' ~--- : ' J=- FPGA
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Real-time matrix multiplication in FPGA :- c-:-'- ~:~ _-': '-: FPGA
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The microarchitecture of FPGA-based soft processors :- _---- s' ---:'-:- :-: FPGA -:-
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Unified synthesis techniques for high performance
FPGA designs
'- =:'-- s' ~--- s' r:= :--~ s':- V'- _-':'- FPGA
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A memetic algorithm implementation on a FPGA for
VLSI circuit partitioning
---::-' s:'~ --'-- memetic s':- s--- ~--:'- :- FPGA :'-- VLSI
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Application-specific external memory interfacing for
FPGA-based reconfigurable architecture
:- _---- s:'-- s':- =~': _=:'= =-'= c'= s' -'-:- FPGA reconfigurable
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A reconfigurable computing architecture for
implementing artificial neural networks on FPGA
~'-~'=- s:'-- reconfigurable :- _-:-~- _-~- s' -~ s:'~ --'-- s':-
s:: FPGA
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Asynchronous design on FPGA s:: :- ::-~' _=':= FPGA DOWNLOAD
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A synthesis-oriented omniscient manual editor for
FPGA circuit design
:'-- _=':= s':- ->- s'--': =-'-- :~-':-: ':- :--~ FPGA
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Automated FPGA design, verification and layout :'--:= FPGA r:= : ---'- _=':=
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A versatile FPGA-based high speed bit error rate
testing scheme
-:'- - FPGA ~~- r:= r:- '== _-- V'- ~-:~ :- _----
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Design and evaluation of FPGA-based gigabit-
Ethernet/PCI network interface card
_-'-::' : _=':= FPGA -~ =~': ~:'- :- _---- gigabit-Ethernet/PCI
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Development of an FPGA-based architecture enabling
the hardware implementation of a three-dimensional
finite-difference time-domain algorithm for the
analysis of electromagnetic propagation
:- _---- s:'-- ~- ~:- FPGA -:-=- s-- ~ s:':-' ~=~ s:'~ --'-- '-' -
_~-='--::--' :'~--' :' J--=- : -:=- s':- ---::-' --'- '-: ~:'--
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Development of an FPGA-based hardware evaluation
system for use with GA-designed artificial neural
networks
~:- FPGA ---'- '- --'--~' s':- s:':-' ~=~ _-'-::' --~-~ :- _---- - _=':=
_-:-~- _-~- s' -~
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Fast heuristic techniques for FPGA placement based
on multilevel clustering
s:: :- -'- :':- s':- -:~ _-'~--' s' c:: FPGA --= s--- ~:= c'~' :-
_==~
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FPGA architectures for two-dimensional/three-
dimensional digital filters
FPGA :---- s':- s:'-- two-dimensional/three-dimensional J'--=--
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FPGA wavelet transform implementation FPGA ~=:- J---- s:'~ --'--
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Implementation of OFDM modem for the physical
layer of IEEE 802.11a standard based on Xilinx Virtex-
II FPGA
--:- s:'~ --'-- OFDM _-:-- -V s':- IEEE 802.11a c'~' :- -:'--'-~' Xilinx
Virtex - FPGA -:-
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Integration d'un tomographe d'impedance electrique
dans un reseau de portes programmables (FPGA)
'- s:'~+=:'-- d ' tomographe -=-- J-- '-:'~ d ' c-'---' dans electrique
-=-- J-- '-:'~ reseau - portes programmables (FPGA (
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IP protection for DSP algorithms' FPGA
implementation
-::- ~-~ ':~-'- s' ---::-' s:'~ --'-- s':- _- s' :' ~='-= ' FPGA
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Scalable floating point FPGA units for rapid systems
prototyping
-=': =-- ::'-~ :--- c'--- FPGA -:~ s:'~ -:-- s' --~-~ s':-
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Variable precision analysis for FPGA synthesis :--~ s':- :--- --- J--=- : -:=- FPGA
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A methodology for mapping networking applications
to multiprocessor-FPGA configurable computing
systems
:'-:- --= - ': s:'-:- ~-- s' -~ s' -'-:- s':- c:: - FPGA -~ s' --~
--=-- ~---'- '- s:-:---'-
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An FPGA-based digital logic core for ATE support and
embedded test applications
FPGA s':- -~ :- _---- -'-:- --~ s:'~'= : --::= J'--=-- =-- :' _-'---~-
:-:' :' s-:-:'- s'
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Automated generic FPGA digital telecommunication
protocol analyzer
_-:-- :'--:= FPGA -'=- J'--=-- J-::- J--=- ~':
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BIST-diagnosis of interconnect fault locations in
FPGA's
~~-- - :- ': J~- ='-- -:- J~: -+- :' c-=~- FPGA
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Co-design materiel/logiciel a l'aide de FPGA: Etude de
faisabilite d'un gestionnaire dynamique
-':- _=':= ~-:~ / logiciel l ' - ::'~- FPGA : -'-:- _--~:- -=- faisabilite -
d ' -=-- J-- '-:'~ dynamique gestionnaire
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Conception d'un decodeur turbo-codes pour
systemes cellulaires de troisieme generation sur
circuit FPGA
-=-- J-- '-:'~ -:+-- d ' decodeur ::- s'-- :-::- systemes cellulaires -
troisieme _-:-= :'-- J~- FPGA
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Design and implementation of advanced encryption
standard in FPGA and 0.18 micron CMOS-based ASIC
:- --:~-- s:'--:-: -:'--'-~' s:'~ --'-- : _=':= FPGA : .' c'--~ ::--
c'~' :- ASIC
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Design of a pixel-scale optical power meter suitable
for incorporation in a multi-technology FPGA
s::-:-- --= :- =>-=' s':- ~~'-- s::- -~ ':- J~-- c'--- :- _=':= FPGA
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Development of an FPGA based wavelet transformer
for the compression of raw SAR data
:- _---- ~:- FPGA -'= -:~- s' --'- s:'~ --:~- s':- ~=:- ::-'-::-~-':-
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The SFRA: A fixed frequency FPGA architecture SFRA : s:'-- c-'-:- ~-'- FPGA
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A compilation tool for automated mapping of
algorithms onto FPGA-based custom computing
machines
s:: :- s' ---::-' :' s:'-:- ~-- s':- :'--:= -:-- :':-' FPGA -~'- :- _----
_~:'-~ _-'-~'=- s'
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A distributed arithmetic-based CORDIC algorithm and
its use in the FPGA implementation of the 2-D IDCT
---::-' :- _---- -::- ~'~= CORDIC :- ' :' --'--~' : FPGA :' s:'~ --'-- ' -
- IDCT
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An FPGA implementation of RM-BTC codec using Log-
MAP algorithm
FPGA --- :' --'--~' '- ::- -': :' J:--- :' s:'~ --'-- - BTC ---::-' ~-- -:::
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An FPGA move generator for the game of chess FPGA -:=~ s:'- s':- ~-:= ::-':-:
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Conception d'une plateforme de prototypage rapide
basee sur un FPGA pour le developpement
d'algorithmes de controle de moteurs
-:+-- d' une plateforme - prototypage rapide basee _-:-= FPGA '-:'~
:- ::- -=-- J-- developpement d ' algorithmes controle - - moteurs
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Efficient FPGA realizations based on AND/XOR
expressions
--':'- realizations :- FPGA : / ~':'-- XOR c'~' :-
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FPGA architecture and performance measurement for
fast area efficient Parallel-Prefix modulo 2('n)-1
adders
s:'-- FPGA -'--- --:~-- s:':- --':'- -:~ -=-- s':- -:--- c=-~ : '
) ' :-- ( - ' adders
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FPGA design and implementation of systolic array-
based Viterbi decoders
_=':= FPGA ''~-:-: :- _---- ~--:-~-~ -':' s:'~ --'-- : Viterbi
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Implement Reed Solomon code using FPGA device -'-~- :' --'--~' '- '---~ -- --: s:'~ --'-- FPGA
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Logic foundry: A design environment for the rapid
prototyping of FPGA-based DSP systems
=-- s:- -=-: : :' -:~ s:'~ -:-- s':- _=':= =-=- FPGA --~-~ :- _----
-::- ~-~ ':~-'-
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PITIA: An FPGA for throughput-intensive applications PITIA : FPGA ':- --:~- _-'---- s'-:-:'- s
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A Boolean-based layout approach and its application
to FPGA routing
:- ' -:-:'- : r:= c:: :- _---- _-:- FPGA _-'-:-~-
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A high-speed chip-to-chip interconnection circuit for
FPGA emulation systems
s' --~-~ s':- J'~-' :'-- ~':- - ~':- V'- ~-:~ '- FPGA -----
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Automatic parallelization and optimizations for
synthesizing MATLAB programs on multi-FPGA
systems
parallelization s' --~-~ :- ~--- s' -'-:- :--~ s':- s:'~ --+- : :'--:=
--= FPGA
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EVE: A CAD tool providing placement and pipelining
assistance for high-speed FPGA circuit designs
':= : : -'- -':' '-'-'- :':-' pipelining _=':= V'- ~-:~ s':- ~-- FPGA :'--
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FPGA design methodologies for high-performance
applications
s' c:: FPGA s-:-:'- s' -'-:- V'- _-':'- s':- _=':=
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High-speed Viterbi decoder design and
implementation with FPGA
::-~: - V'- ~-:~ '- Viterbi '- s:'~ --'-- : _=':= FPGA
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Internet-enabled techniques for the diagnosis and
repair of FPGA-based devices
:- _---- s' -'-~- :--- : c-=~- s':- ---- J'- ': ~-:---' s' ~--- FPGA
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Logical hardware debuggers for FPGA-based systems debuggers :- _---- s' --~-~ s':- _-=-- :':-' ~=~ FPGA
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Mixing buffers and pass transistors in FPGA routing
architecture
:- '::-~-:-':- ~-:~- '- : :-'- =:-=- FPGA s:'-- _-'-:-~-
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Partitioning of large HDL ASIC designs into multiple
FPGA devices for prototyping and verification
::- s' r:= :' s--- ~--:'- HDL ASIC s' -'-~- - FPGA -:-- s':- ----
---'- : s:'~
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Star EMC trigger level design for an ORCA FPGA -:'-~ EMC s':- *=~ _=':= ~'- FPGA J-'- ~-+-
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The effect of logic block granularity on deep-
submicron FPGA performance and density
--- -:--- :- =-- -:-- -:- -'- -'- :-' - submicron FPGA --':- :
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Algorithms for design space exploration and high-
level synthesis for multi-FPGA reconfigurable
computers
--= :-:---'- :--~ s':- V'- *=~ : _-'~- ~'-'~--' s':- ' ---::-' _=':= FPGA
reconfigurable
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FPGA physical design partitioning and its applications FPGA ' s'-:-:'- : _-:-- _=':= s--- ~--:'-
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On Kronecker products signal processing algorithms
and FPGA computational structures
:-::- J'--~ c:'-:- s' ---::-' ~V:~=- :- FPGA _-'-~'=- s' -:'~ :
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FPGA implementation of wavelet transform for image
compression
FPGA :-:~- s:'~ --:~- s':- ~=:- J---- :' s:'~ --'--
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Handling large data storage in synthesis of multiple
FPGA systems
--= s' --~-~ ~='~ :- ::- s' --'- s:'~ -:-=- - -: ~~- FPGA
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Partitioning for FPGA-based reconfigurable
computers
:- _---- s' -'-': s':- s--- ~--:'- FPGA reconfigurable
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Performance-driven FPGA synthesis for sequential
circuits
:- _---- -:--- FPGA _---:- s':'-- s':- :--~
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Routing architecture and layout synthesis for multi-
FPGA systems
--= s' --~-~ s':- :--~ r:= : s:'-- _-'-:-~- FPGA
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Fuzzy logic-based FPGA routing :- _---- s:'- =-- FPGA _-'-:-~-
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Partitioning and routing for multi-FPGA systems --= s' --~-~ s':- _-'-:-~- : s--- ~--:'- FPGA
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Complexity issues and algorithms for LUT-based FPGA
technology mapping
~~'- s::' - :- _---- ~:- s':- ' ---::-' : J-'~- _---=-- FPGA
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FPGA placement and global routing tool improvement
based on simulated annealing and routing algorithms
- -'- :': FPGA s' ---::-' s:'~ --~ c'~' :- _-'-:-~- :':-' -:-+- _-'+= :
-~' -~ -:~ : _-'-:-~-
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Utilizing an FPGA in conjunction with a DSP processor
to facilitate the implementation of induction motor
control
:' --'--~' '- FPGA s':=' J-+~- ::=-- - -::- ~-~ ':~-'- ---:'-:- '- =-': :-
_-'--' ::-:- J:---
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Architectural synthesis for FPGA-based signal
processing systems
s':- s:'-- :--~ FPGA J'--~ c:'-:- s' --~-~ :- _----
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A two's complement division algorithm with auto-
quotient rounding: An implementation using field
programmable gate arrays (FPGA)
:'--:= -:- -:- ~-~- :'= '- --~-- ---::-' ---- :- : :' --'--~' '- s:'~ --'--
-:'::- s:-: -'-:- J-'- s' -':' ---: ) FPGA (
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Dynamically reconfigurable FPGA-based
multiprocessing and fault tolerance
'-:- reconfigurable FPGA '== J-=- : s:'-:- --= :- _----
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Rapid prototyping using field programmable gate
array (FPGA) and field programmable interconnect
devices (FPID)
s:-: -'-:- J-'- s' -':' -:'::- '--- :' --'--~' '- -:~ s:'~ -:-- ) FPGA ( :
s:-: -'-:- -~: -'-~- -:- J~: -+- ) FPID (
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SELF-Map: Stochastic evolution LUT-FPGA technology
mapper
~-- -:= : ~:- J-'- _--'~- - FPGA s::-:-- :--'
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ASIC microcontroller design of a radiation monitoring
system using VHDL modeling and FPGA
implementation
ASIC s':=' : ~:'=- c-'- :' --'--~' '- s:'~ J-- --~-~ ~- _=':= :-:---::--
FPGA VHDL
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A time-multiplexed FPGA architecture for logic
emulation
s:'-- --+~- '-: FPGA =-- ----- s':-
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FPGA driven synthesis employing a self-testing VLSI
controller implementation as a case study
:--~ FPGA ~~- -:= -'-=-~' ---': VLSI -'=- ':-- - ----- J:--- s:'~ --'--
-::-
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FPGA implementation of adaptive interference
canceler for periodic signal
FPGA :' s:'~ --'-- canceler _-:'-- J'--~ s':- _---=- ~-'=-
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FPGA implementation of RNS structures s' -:'~ s':=' FPGA RNS
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Layout driven logic synthesis and optimization
techniques for FPGA
---': =-- :--~ s--- r:= s':- s:'~ --+- s' ~--- : FPGA
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Multi-FPGA systems --= FPGA --~-~
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OneChip: An FPGA processor with reconfigurable logic OneChip : ---:'-:- FPGA =-- '- reconfigurable
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Algorithmic results on physical design problems in
VLSI and FPGA
s:: :- -'-- :- _-:-- _=':= _---::-' ~>~- VLSI : FPGA
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An FPGA-based reconfigurable coprocessor for the
IBM PC
coprocessor reconfigurable FPGA -' _- s' :-:---'- s':- :- _----
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An area efficient FPGA: Design using non volatile RAM --':'- -=-- FPGA : :':- :-- =-'= :' --'--~' '- _=':=
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An FPGA-based reconfigurable computing array FPGA ~'-~'=- -':' :- _---- reconfigurable
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Empirical study of the effect of cell granularity on
FPGA density and performance
--':- :- J:-~ -'- -'- :-' _-:=- -'=- FPGA -:--- :
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