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MOCK EXAMINATIONS 2011 Series: F3 Option: Electrotechnology Duration: 4H Coefficient: 4

ELECTRICAL, DIGITAL AND INDUSTRIAL CIRCUITS

No document is allowed except the one given to the candidates by the examiners Parts of the paper: 03 Number of pages: 04 I TECHNOLOGY

1.1 Describe the functioning principle of a thyristor. 1.2 Give the difference between a diode and a thyristor. 1.3 On the same axis, sketch the forward and the reverse characteristic of a Zener diode. 1.4 Give an example of a passive and active element (component). 1.5 How many flip-flops are necessary to realise an asynchronous counter needed to count 60 seconds of a clock. 1.6 Give the difference between synchronous counter and asynchronous counter. 1.7 Give the meaning of the following abbreviations used in electronic field and precise the normalised supplying voltage for each of them: TTL, CMOS. 1.8 Show with the aid of a diagram how a D flip-flop can be obtained from RS and JK flip-flops.

II
IT

ANALOGIC CIRCUITS Study of a voltage regulation

R

Exercise 1:

R = 200 ; RL = 150 .
IZ Ic
DZ T

IL
RL

For the transistor: = 50 ; VBE = 0.6V.

Vo

Vi 26V

For the Zener diode, Vz = 10V. 1.1 Explain the operation of the circuit. 1.2 Calculate: a) The output voltage Vo. b) The currents IL, IT and IZ.

Figure 1

c) The maximum power dissipated in the transistor.

GTHS KUMBO-MOCK Examinations-Electrical, Digital and Industrial Circuits- 2011 Session..

Exercise 2:

Bipolar junction transistor

Vcc

This circuit has the following characteristics: R1 = 1k ; RE = 100 ; UZ = 6.6V;

=100;

I1
R1

RC

VBE = 0.6V; Vcc = 24 V and VCESat = 0.3V. 2.1 Find the current I1 in R1 and the power dissipated in R1. 2.2 Calculate the current IE in RE. 2.3 Calculate the current IC in RC. 2.4 Calculate the power that the transistor and the Zener diode should be able to dissipate.

C B E
DZ

VCE IE
RE

M Figure 2

Exercise 3:

AC circuit
A

The circuit of figure 3 has the following characteristics: C = 50 F , L = 12.8mH,

K
Z

e(t ) = 120 2 cos(100t ) .

3.1 Calculate the Thevenins parameters at the points A and B.

e B Figure 3

3.2 Deduce the Norton module. 3.3 Calculate the current across Z when K is closed knowing that Z = 5 + 4j Using Millman and voltage divider theorem (Figure 4): 4.1 Determine the voltage at the points
5R

Exercise 4:
V1

Operational amplifier.
C
R R

A, B, E and F. 4.2 Determine: a) The voltage V1 as function of VC

VS

A
R

B
5R

and V2. b) The voltage V2 as function of VD and V1

F
R

D V2

c) The voltage VS as function of VD and VC d) Deduce the voltage VS as a function of V1 and V2.

Figure 4
GTHS KUMBO-MOCK Examinations-Electrical, Digital and Industrial Circuits- 2011 Session..

III

DIGITAL CIRCUITS Study of a seven segments display.

Exercise 1:

The circuit below is used to display the first 8 symbols of the digital system of numeration. The system is composed of: A modulo 8 JK flip flop asynchronous binary counter; A 3/7 (3 inputs and 7 outputs) decoder; A seven segments display used to display used to display the first 8 symbols as shown below.

01234567
a a b c d e f g

Q3 COUNTER Q2 Q1

f g

e d

3/7 Decoder

Display

a, b, c, d, e, f, g are the seven segments of the display. Q3, Q2 and Q1 are the outputs of the asynchronous counter (Q3 is the most significant bit while Q1 is the least significant bit). 1. Draw the truth table of the JK flip flop. 2. Draw the complete electric diagram of the asynchronous counter using the JK flip flops. 3. Draw the truth table of the decoder following the model given below. Q3 0 0 Inputs Q2 0 0 Q1 0 1 a 1 b 1 c 1 Outputs d 1 Display e 1 f 1 g 0 0 1

4. Using the Karnaughs map, give the simplified logic expression of each output of the decoder. 5. Draw the logigram of the display 0 using NAND gates of two inputs, taking Q1, Q2 and Q3 as inputs variables.

GTHS KUMBO-MOCK Examinations-Electrical, Digital and Industrial Circuits- 2011 Session..

Exercise 2:

Study of a JK flip-flop

According to the JK flip-flop truth table established in the previous exercise, complete the following chronogram. Initially, Q = 0.
Clk

t J 1 0 K 1 0 Q t t

Exercise 3: Counter The circuit of the figure 5 below represents a counter. The flip-flops are positive edge triggered.

D H

Q3

D H

Q2

D H

Q1

D H

Q0

/Q3 Clock

/Q2

/Q1

/Q0

Figure 1. Figure 5 1. Precise the nature of this counter (synchronous or asynchronous). 2. State the difference between series transfer and parallel transfer. 3. Draw the wave forms of Q3, Q2, Q1, Q0 knowing the initial state Q3 = 1, Q2 = Q1= Q0 = 0.

Subject Masters: Mr. ETCHU; Mr. NGOUNE, Electrical Department, GTHS Kumbo.

GTHS KUMBO-MOCK Examinations-Electrical, Digital and Industrial Circuits- 2011 Session..