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MMBFJ309LT1G, MMBFJ310LT1G JFET - VHF/UHF Amplifier Transistor

NChannel
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2 SOURCE

These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
Rating DrainSource Voltage GateSource Voltage Gate Current Symbol VDS VGS IG Value 25 25 10 Unit Vdc Vdc mAdc 1 Symbol PD Max 225 1.8 556 55 to +150 Unit mW mW/C C/W C 2 3 3 GATE

1 DRAIN

THERMAL CHARACTERISTICS
Characteristic Total Device Dissipation FR5 Board, (Note 1) TA = 25C Derate above 25C Thermal Resistance, JunctiontoAmbient Junction and Storage Temperature

SOT23 (TO236) CASE 318 STYLE 10

MARKING DIAGRAM

RqJA TJ, Tstg

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. FR5 = 1.0 x 0.75 x 0.062 in.

6x M G G 1 = Device Code x = U for MMBFJ309LT1 x = T for MMBFJ310LT1 M = Date Code* G = PbFree Package (Note: Microdot may be in either location) *Date Code orientation and/or overbar may vary depending upon manufacturing location. 6x

ORDERING INFORMATION
Device MMBFJ309LT1G MMBFJ310LT1G Package Shipping SOT23 3,000 / Tape & Reel (PbFree) SOT23 3,000 / Tape & Reel (PbFree)

For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

Semiconductor Components Industries, LLC, 2009

August, 2009 Rev. 4

Publication Order Number: MMBFJ309LT1/D

MMBFJ309LT1G, MMBFJ310LT1G
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS GateSource Breakdown Voltage (IG = 1.0 mAdc, VDS = 0) Gate Reverse Current (VGS = 15 Vdc) Gate Reverse Current (VGS = 15 Vdc, TA = 125C) Gate Source Cutoff Voltage (VDS = 10 Vdc, ID = 1.0 nAdc) ON CHARACTERISTICS ZeroGateVoltage Drain Current (VDS = 10 Vdc, VGS = 0) GateSource Forward Voltage (IG = 1.0 mAdc, VDS = 0) SMALLSIGNAL CHARACTERISTICS Forward Transfer Admittance (VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz) Output Admittance (VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz) Input Capacitance (VGS = 10 Vdc, VDS = 0 Vdc, f = 1.0 MHz) Reverse Transfer Capacitance (VGS = 10 Vdc, VDS = 0 Vdc, f = 1.0 MHz) Equivalent ShortCircuit Input Noise Voltage (VDS = 10 Vdc, ID = 10 mAdc, f = 100 Hz) |Yfs| |yos| Ciss Crss en 8.0 10 18 250 5.0 2.5 nV mmhos mmhos pF pF Hz MMBFJ309 MMBFJ310 IDSS VGS(f) 12 24 30 60 1.0 mAdc Vdc MMBFJ309 MMBFJ310 V(BR)GSS IGSS VGS(off) 25 1.0 2.0 1.0 1.0 4.0 6.5 Vdc nAdc mAdc Vdc Symbol Min Typ Max Unit

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MMBFJ309LT1G, MMBFJ310LT1G
70 60 I D , DRAIN CURRENT (mA) VDS = 10 V 50 40 30 20 10 -5.0 IDSS + 25C + 25C 40 +150C + 25C - 55C +150C -1.0 -4.0 -3.0 -2.0 ID - VGS, GATE-SOURCE VOLTAGE (VOLTS) IDSS - VGS, GATE-SOURCE CUTOFF VOLTAGE (VOLTS) 0 30 20 10 0 TA = - 55C 50 70 60 IDSS, SATURATION DRAIN CURRENT (mA)

Figure 1. Drain Current and Transfer Characteristics versus GateSource Voltage

Yfs , FORWARD TRANSCONDUCTANCE (mhos)

100 k Yfs

1.0 k Yos, OUTPUT ADMITTANCE ( mhos) CAPACITANCE (pF)

10 RDS 7.0

120 R DS , ON RESISTANCE (OHMS)

Yfs 10 k

96

100

72 Cgs 4.0 48

1.0 k Yos

VGS(off) = - 2.3 V = VGS(off) = - 5.7 V =

10

Cgd 1.0 0 10

24

100 0.01

1.0 0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 100 ID, DRAIN CURRENT (mA)

9.0

8.0

7.0

6.0

5.0

4.0

3.0

2.0

1.0

0 0

VGS, GATE SOURCE VOLTAGE (VOLTS)

Figure 2. CommonSource Output Admittance and Forward Transconductance versus Drain Current

Figure 3. On Resistance and Junction Capacitance versus GateSource Voltage

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MMBFJ309LT1G, MMBFJ310LT1G
|S21|, |S11| 30 VDS = 10 V ID = 10 mA TA = 25C 3.0 0.85 0.45 S22 2.4 Y12 (mmhos) Y11 0.79 0.39 S21 1.8 0.73 0.33 VDS = 10 V ID = 10 mA TA = 25C S11 0.6 Y12 0 100 200 300 500 f, FREQUENCY (MHz) 700 1000 0.55 0.15 100 0.61 0.21 S12 200 300 500 f, FREQUENCY (MHz) 700 1000 0.90 0.012 0.92 0.036 0.96 0.048 0.98 |S12|, |S22| 0.060 1.00

|Y11|, |Y21 |, |Y22 | (mmhos)

24

18

12

Y21 Y22

1.2

0.67 0.27

0.024 0.94

6.0

Figure 4. CommonGate Y Parameter Magnitude versus Frequency


q21, q11 180 50 q22 170 40 q21 q12, q22 - 20 87 - 20 - 40 - 60 - 80 - 100 150 20 q12 q11 140 10 VDS = 10 V ID = 10 mA TA = 25C 700 - 120 84 - 140 - 160 83 - 180 - 200 82 1000 - 120 - 100 - 80 85 - 60 86

Figure 5. CommonGate S Parameter Magnitude versus Frequency


q11, q12 - 20 120 q21 q21, q22 q11 q22 0

- 40 100

- 20

160

30

80

- 40

60 q12 40 VDS = 10 V ID = 10 mA TA = 25C 200 300 500 f, FREQUENCY (MHz)

q21 q11

- 60

- 80

130

0 100

200 300 500 f, FREQUENCY (MHz)

20 100

700

- 100 1000

Figure 6. CommonGate Y Parameter PhaseAngle versus Frequency

Figure 7. S Parameter PhaseAngle versus Frequency

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MMBFJ309LT1G, MMBFJ310LT1G
PACKAGE DIMENSIONS
SOT23 (TO236) CASE 31808 ISSUE AN
D
SEE VIEW C 3 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. 31801 THRU 07 AND 09 OBSOLETE, NEW STANDARD 31808. MILLIMETERS NOM MAX 1.00 1.11 0.06 0.10 0.44 0.50 0.13 0.18 2.90 3.04 1.30 1.40 1.90 2.04 0.20 0.30 0.54 0.69 2.40 2.64 INCHES NOM 0.040 0.002 0.018 0.005 0.114 0.051 0.075 0.008 0.021 0.094

E
1 2

HE c e b q 0.25

A A1 L L1 VIEW C

DIM A A1 b c D E e L L1 HE

MIN 0.89 0.01 0.37 0.09 2.80 1.20 1.78 0.10 0.35 2.10

MIN 0.035 0.001 0.015 0.003 0.110 0.047 0.070 0.004 0.014 0.083

MAX 0.044 0.004 0.020 0.007 0.120 0.055 0.081 0.012 0.029 0.104

STYLE 10: PIN 1. DRAIN 2. SOURCE 3. GATE

SOLDERING FOOTPRINT*
0.95 0.037 0.95 0.037

2.0 0.079 0.9 0.035


SCALE 10:1

0.8 0.031

mm inches

*For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION


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MMBFJ309LT1/D

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