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Solution of Homework problems in Chapter 11.

Chapter 11, Solution 3. Known quantities: The threshold voltage, VT = 2 V, of an enhancement-type NMOS that has its source grounded and a 3 V DC source connected to the gate. Find: The operating state if: a) v D = 0.5 V . b) v D = 1 V . c) v D = 5 V Analysis:
v DS = v D = 0.5 V v DS < vGS VT

a) vGS VT = 3 2 = 1 V The transistor is in the triode region.


v DS = v D = 1 V

b) vGS VT = 3 2 = 1 V
v DS = vGS VT

The transistor is either in the triode or in the saturation region.


v DS = v D = 5 V

c) vGS VT = 3 2 = 1 V
v DS > vGS VT

The transistor is in the saturation region.

Chapter 11, Solution 9. Known quantities: The threshold voltage, VT = 1.5 V, of the NMOS A transistor shown in Figure P11.9. k =0.4 m /V 2 . Find: The voltage levels of the pulse signal at the drain output, if vG is a pulse with 0 V to 5 V. Analysis: 1) Since VT = 1.5 V, with vG = 0 V, vGS < VT, the transistor is cut off. Therefore, vD = 5 V.

2) When vG = 5 V, the transistor turns on since VG > VT. Assume that the transistor is in the saturation region: iD = k (vGS - VT)2 = 0.4 (5 - 1.5)2 = 4.9 mA. Therefore, vD = 5 - 4.9 1 = 0.1 V. Since VD = 0.1 V < VGS VT = 5 1.5 = 3.5, it is contradictory to the assumption. Thus, the transistor is working in the triode region. iD[mA] = k[2(VGS VT)VDS VDS2]=0.4[2(5-1.5) VDS VDS2]=2.8 VDS 0.4VDS2 : Eq (1) 5 VDS = iD (mA ) iD = 5-VDS : Eq.(2) 1 2 From Eq. (1) & (2), 0.4 VDS 3.8VDS + 5 = 0 , so VDS = 7.92 V or 1.58V . Since VDS < VGS VT = 3.5 V for triode region, VDS is 1.58 V when VG = 5V. Chapter 11, Solution 10. Known quantities: Circuit shown in Figure 11.10. Find: Find the current iD . Analysis: In the circuit of Figure P11.10, v =1v = V . GV1 , D 0< S S T 4 therefore the transistor is in the ohmic region. We can compute the drain current to be:
i = 2 G Tv D v )S 2 D K (S V D v S =0 - 25- ) 0 -0 ) . 1 3 ( 1 . (. 2 5 0 1 1 1

=. 5 A 3 ] 19 m

Chapter 11, Solution 11. Known quantities: In the circuit shown in Figure P11.11, the MOSFET operates in the active region. Find: a) RD b) The largest allowable value of RD for the MOSFET to remain in the saturation region. Analysis:
VGS + VGD

iD
VSD

(a) Since VD = 3V & ID = 5mA, RD = VD/ID= 3V/5mV= 600 (b) Since the transistor is in the saturation region and iD = 0.5 mA , we have
iD = K ( vGS VT ) 2 0.5 = 0.5( vGS + 1) 2 , so VGS = 0 V or -2V.

For p-channel MOSFET in the saturation region, VGS VT and VGD = VGS VDS VT. Thus, vGS = 2 V only : vGS < VT = 1 . Since the source is at 10 V, the gate voltage must be 8 V (VGS = VG VS, 2V=VG VS). Saturation region operation would be maintained when VD exceeds VG by |VT| (or VGD = VGS VDS VT),
VD max = 8 + 1 = 9 V

Vm x 1 Therefore, R m = D a = 8k . Da x
Alternatively, VG = VGD +iDRD, VGD = VG iDRD where VGD VT. VG iDRD VT RD (VG VT)/ iD RD can be found to be V VT 8 (1) RD G = 18k iD 0.5mA

0 .5

simply from (a), RD,max = 18 k Chapter 11, Solution 13. Known quantities: The i-v characteristic of Figure P11.13(a), and the circuit in Figure P11.13(b): V = , D 1 , D5 G 7V=V = G V D 0 R Find: The current iDQ the voltage vDSQ, and the region of operation of the MOSFET. Analysis:
The operating point can be determined using the load line method.

Q point

VD v S iD= D D =2 .2 D 0 v S R D R D
By superimposing the load line on Figure P11.13(a), and by noticing that VGS = VGG = 7 V , we obtain
i DQ = 0.8 A, v DSQ = 6 V

The MOSFET is in the saturation region.

Chapter 11, Solution 14. Known quantities: The circuit in Figure P11.13(b):
V = , D 2 , T 3 R 5 K m2 0V G 7 V = V= , D 5/ G V D 0 V V = , = A

Find: The current iDQ the voltage vDSQ, and the region of operation of the MOSFET. Analysis: Assuming that the MOSFET is in the saturation region, the quiescent drain current is
2 i =(S ) =073 =8 v 0 ( ) 0A . 5 . D KQ V Q G T 2

The drain-to-source voltage is Since

v = i = 0= V D V R S Q D D D D 2 5. 1 Q 0 86

v =SS=V T hypothesis was correct V D v v 9> G D G

Chapter 11, Solution 15. Known quantities: The circuit in Figure 11.9 in the text:
V= V= , D kRR 2 0A2 0 , 1 2 M= m == , K. / 1 V D 3 ,T 4 R 1 D 6 V V=

Find: The current iDQ, the voltage vDSQ, the resistance RS, and the operating region of the MOSFET. Analysis: Using Thevenin equivalent,
VGG = R2 VDD = 18 V R1 + R2
eq (1),

We can write the equations


VGG = vGSQ + RS iDQ =18 : VDD = ( RD + RS )iDQ + vDSQ = RDiDQ +18 vGSQ + vDSQ = 36 RDiDQ + vDSQ =18 + vGSQ : Eq ( 2)

Assuming saturation conditions, the current iD can be written as

iDQ = K (vGSQ VT ) 2 vGSQ + RS K (vGSQ VT ) 2 =18 and RD K (vGSQ VT ) 2 + vDSQ =18 + vGSQ

Notice that the problem has more unknown than equations. Suppose that the transistor is in the saturation region. Then, VGSQ VT & VGDQ = VGSQ-VDSQ VT From eq.(1), 18 RSiDQ 4 RSiDQ 14, From eq.(2), RDiDQ 18 4 10 103 iDQ 22, so iDQ 2.2 10-3 A Thus, RS ~ 6.36 k , iDQ 2.2 10-3 A. Then, since VDD = (RS+RD)iDQ+VDSQ, VDSQ = VDD (RS+RD)iDQ 36 (6.36+10) 2.2 = ~ 32.4 V. So, VDSQ > 0 for the saturation region. RS ~ 6.36 k , iDQ 2.2 10-3 A, and VDSQ > 0, meaning that there are many solution of RS, iDQ, & VDSQ with which the transistor is in the saturation region. One solution: we can impose the vDSQ to ensure saturation conditions as
v DSQ = VDD / 2 =18 V
2 5(vGSQ VT ) 2 = vGSQ 5vGSQ 41vGSQ + 80 = 0 vGSQ = 5 V or 3.2V

Since VGSQ > 4 V, VGSQ = 5 V. Remark: The other solution of the algebraic equation is not acceptable because < VT. The resistance RS is given by 18 vGSQ 18 5 RS = = = 130 k 2 2 K ( vGSQ VT ) 0.1 10 3 ( 5 4 ) and the drain current iDQ = K (vGSQ VT ) 2 = 0.1 mA Suppose that it is in the triode region. Then, VGSQ VT & VGDQ = VGSQ VDSQ VT From eq.(1), 18 RSiDQ 4 RSiDQ 14, From eq.(2), RDiDQ 18 4 10 103 iDQ 22, so iDQ 2.2 10-3 A Thus, RS ~ 6.36 k & VDSQ 0 but VDSQ VGSQ VT One solution is as follows: RS = 5 k , iDQ = 2.3 mA, VGSQ = 18 5 2.3= 6.5V. Thus, VDSQ VGSQ VT = 6.5 4 = 2.5V. KVL in SD circuit : 36V = 10 2.2+VDSQ + 5 2.2 VDSQ = 1.5 V.

Chapter 11, Solution 16. Known quantities: The circuit in Figure 11.9:
VDD =12 V,VT =1 V, RS = R D =10 k R1 = R2 = 2 M K =1 m /V 2 , , A

Find: The current iDQ, the voltage vDSQ, and the voltage vGSQ. Analysis: Using Thevenin,
VGG = R2 VDD = 6 V R1 + R2

We can write the equations


VGG = vGSQ + RS i DQ = 6, V DD = ( R D + RS )i DQ + v DSQ = 2 R D i DQ + v DSQ = 12

Assuming saturation conditions, the current iD can be written as


2 i DQ = K (vGSQ VT ) 2 vGSQ + RS K (vGSQ VT ) 2 = 6 10 vGSQ 19 vGSQ + 4 = 0 vGSQ = 1.66 V

The other solution is not acceptable because less then VT. It follows
i DQ = 6 vGSQ RS = 0.434 mA ,

v DSQ =12 2 RD i DQ = 3.32 V

Chapter 11, Solution 17. Known quantities: The power MOSFET circuit shown in Figure P11.17. Find: a) If VG = 5 V , find the range of RL for which the VCCS will operate. b) If RL =1 , determine the range of VG for which the VCCS will operate. Analysis: The MOSFET should be working in the saturation region, so v < >G 3 G 3 V V D D

a) VG = 5 V , I D = K ( vGS VT ) 2 = 1.5( 5 3) 2 = 6 A so 1 0 V = RI > G 3 2 R < 2 LD V = D 1 L 6 VD = 12 RL I D > VG 3 b)

I D = K ( vGS VT ) = K (VG VT ) = K (VG 3)


2 2
2 L

Solve the above two equations, we can have


1 ID K 2 I D 24.667 I D + 144 > 0 . Thus, I D > 15 .18 A or I D < 9.485 A Since VD = 12 RL I D > VG 3 > 0 , the second one is reasonable, so 3 < VG < 15 I D = 5.515 V

(12 R

I D ) > (VG 3 ) > 0 (12 RL I D ) > (VG 3 ) =


2

Chapter 11, Solution 19. Known quantities: The Class A amplifier shown in Figure P11.19 Find: c) Determine the output current for the given biased audio tone input, VG = 10 + 0.1 cos ( 500 t ) V . Let K =2 m /V 2 and VT = 3 V . A d) Determine the output voltage. e) Determine the voltage gain of the cos (500 t ) signal. f) Determine the DC power consumption of the resistor and the MOSFET. Analysis: a) The MOSFET should be working at the saturation region So

= 0.002 ( 49 + 1.4 cos ( 500 t ) + 0.005 cos (1000 t ) + 0.005 ) A b) Vout = VDD iD R = 15 60 0.002 ( 49 + 1.4 cos ( 500 t ) + 0.005 cos (1000 t ) + 0.005 ) V
out c) gain = V G

iD = K ( vGS VT ) 2 = 0.002 (10 + 0.1 cos ( 500 t ) 3) 2 = 0.002 49 + 1.4 cos ( 500 t ) + 0.01 cos 2 ( 500 t )

=
=500

60 0.002 1.4 = 1.68 0.1

d) We can ignore the cosine part signal when calculating the DC power consumption.
iD _ DC = 0.002 ( 49 + 0.005 ) = 0.098 A

PR = iD _ DC 2 R = 0.576 W

PMOSFET = iD _ DC vDS = iD _ DC VDD iD _ DC R = 0.098 (15 0.098 60) = 0.894 W

Chapter 11, Solution 20. Known quantities: The source-follower amplifier shown in Figure P11.20. VG = 9 + 0.1 cos ( 500 t ) V , K =30 m /V 2 and A
VT = 4 V

Find: a) Determine the load current I L . b) Determine the output voltage. c) Determine the voltage gain of the cos (500 t ) signal. d) Determine the DC power consumption of the resistor and the MOSFET. Analysis: The MOSFET should be working at the saturation region, So the
Vout = VS = vGS VT = 5 + 0.1cos ( 500 t ) V 5 + 0.1 cos ( 500 t ) = 1.25 + 0.025 cos ( 500 t ) a) I L = out = R 4
out c) gain = V G

=
=500

0. 1 =1 0. 1

d) We can ignore the cosine part signal when calculating the DC power consumption.
iD _ DC = 1.25 A

PR = iD _ DC 2 R = 6.25 W PMOSFET = iD _ DC v DS = iD _ DC VDD iD _ DC R = 1.25 (12 5) = 8.75 W

Chapter 11, Solution 24. Known quantities: A push-pull amplifier can be constructed from matched n-and-p-channel MOSFETs, shown in Figure P11.24. Find: Determine VL and I L .

Analysis: If VL <Vin , the output of the operational amplifier is positive infinity, so both MOSFETs will work in the triode region and the VL will increase, until it reaches VL =Vin ; If VL >Vin , the output of the operational amplifier is negative infinity, so both two MOSFET will work in cutoff region, and the VL will increase, until it reaches VL =Vin ; So VL =Vin is VL = 2VL the only equilibrium in the system, so VL =Vin . Correspondingly, I L = RL Chapter 11, Solution 26. Known quantities: The two-stage amplifier shown in the circuit of Figure P11.26. Find: a) Determine the VL and I L for VG = 4 V b) Determine the VL and I L for VG = 5 V VL c) Determine the and
VG = 4 + 0.1 cos ( 750 t ) V

I L for

Analysis: Assume the drain current in the MOSFET in the left hand side is iD1 and in the right hand side i D 2 . Obviously, both MOSFET are working in saturation region. a) iD1 = K ( vGS 1 VT ) 2 = K (VG1 VT ) 2 = 1 A
VG 2 = VD1 = VDD R iD1 = 12 2 1 = 10 V

iD 2 = K ( vGS 2 VT ) 2 = K (VG 2 R iD 2 VT ) 2 Solve it and we can have iD 2 = 2.68 or 4.57 A Obviously, the first solution is reasonable, so I L = iD 2 = 2.68 A and VL = R I L = 5.36 V

b) iD1 = K ( vGS 1 VT ) 2 = K (VG1 VT ) 2 = 4 A VG 2 = VD1 = VDD R iD1 = 12 2 4 = 4 V


iD 2 = K ( vGS 2 VT ) 2 = K (VG 2 R iD 2 VT ) 2 Solve it and we can have i D 2 = 0.25 or 1 A Obviously, the first solution is reasonable, so I L = iD 2 = 0.25 A and VL = R I L = 0.5 V

a) Basically, the signal in c) part is a comparably small cosine signal superposed by the signal the in a) part. If we ignore the harmonics larger than 1st order, we can approximately have the following solution
iD1 = 1 0.2 cos ( 750 t ) A I L = iD 2 = 2.68 1.31 cos ( 750 t ) A VG 2 = 10 + 0.4 cos ( 750 t ) V VL = 5.36 2.62 cos ( 750 t ) V

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