McGill University Faculty of Engineering

ECSE-221B Introduction to Computer Engineering

Department of Electrical and Computer Engineering Mid-Term Examination Winter 2011

Examiner: Date: Time:

Prof. Odile Liboiron-Ladouceur Friday, February 18, 2011 13:35 14:25 (50 minutes)

Student Name:

McGill ID:

Signature: _____________________________________________ Initials: _______________ INSTRUCTIONS: This is a CLOSED BOOK EXAM. FACULTY STANDARD CALCULATOR permitted ONLY. Read through ALL of the questions before beginning. Print your name legibly at the top of this page, fill in your student ID number and sign on the line below. Initial each page of the exam paper (nine pages in total) in case the sheets should get separated. The exam has two parts. Part 1 consists of 10 multiple choice questions and Part 2 consists of 4 problems. The multiple choice questions are equally weighted. You must encircle your answer. You can use the space provided to help yourself finding the answers. In Part 1, 2 marks are given for each correct answer, and 0.5 marks are deducted for each wrong answer. Blank entries are not penalized. In Part 2, the 4 problems are to be answered in the space provided on the examination sheet. The exam has a total of 40 marks.

ECSE-221B 2011 (A) Introduction to Computer Engineering (Mid-Term Examination)

Page 2 of 9 Initials: ____ Part 1 Multiple Choice Questions (2 pts for correct answer, -0.5 pts for wrong answer, blanks are not penalized) Question 1: In a twos complement system, what range of integers can be represented with a 28-bit register? (a) [0, 228] (b) [-227,227] (c) [-227-1, 227] (d) [-227, 227-1] (e) None of the above Answer: d) For a 28-bit register, you can represent positive integers from 0 to 227-1 and negative integers from -227 up to -1. So answer is d) [-227, 227-1]. Question 2: What problem does the Master-Slave flip-flop resolve? (a) (b) (c) (d) (e) The so-called 1s or 0s catching from noisy inputs The undefined outputs when both inputs are set to 1 The race condition occurring in certain types of flip-flops The initialization problem of JK flip-flops Answers (a) and (c)

Answer: c) The master-slave is designed to make timing less dependent on the clock. Question 3: Which of the following logical statements is NOT true? (a) (b) (c) (d) (e)

Answer: e)

ECSE-221B 2011 (A) Introduction to Computer Engineering (Mid-Term Examination)

Page 3 of 9 Initials: ____ Question 4: What is the corresponding logic function to the implemented circuit shown below?

(a) (b) (c) (d) (e) Answer: d) Question 5: Sequential circuits make use of flip-flops and combinational logic. Consider the circuit below:

The inputs of the rightmost flip-flop are labeled J0 and K0, and the inputs of the leftmost flip-flop are labeled J1 and K1. What is the equation for the next state of Q0 which is the output of the rightmost flip-flop? (a) (b) (c) (d) (e) Answer: a)

ECSE-221B 2011 (A) Introduction to Computer Engineering (Mid-Term Examination)

Page 4 of 9 Initials: ____ Question 6: What is the conversion of 15.210 in base 2 rounded to the correct number of significant digits? (a) (b) (c) (d) (e) 1111.0110 1111.00110 1111.0011 1111.010 1111.1

Answer: c) 15 = 1111 1*log(10)/log(2) ~ 3 rounded up to 4. .2 * 2 = 0.4 (0); .4 * 2 = 0.8 (0) .8 * 2 = 1.6 (1); .6 * 2 = 1.2 (1), We get 1111.0011 Question 7: You are designing a modulo-8 counter using the following 7 segment display and a 3-to-8 decoder:

7 Segment Display

3-to-8 Decoder

A 3-to-8 decoder is used to assert each octal code (0 to 7). The inputs of the decoder represent the octal code in binary. Each segment of the display (a to g) combines 1s (OR) or 0s (NOR), depending on which are fewer in the truth table. What is the logic equation for segment a? (a) a = OR (5,6) (b) a = OR (1,2,5,6) (c) a = NOR (2) (d) a = NOR(1,4) (e) a = XOR(2,3,5,6,7,8) Answer: (d) Question 8: In a twos complement system, what does 11101112 represent? (a) -810 (b) -910 (c) -11910 (d) -710 (e) None of the above Answer: (b)

ECSE-221B 2011 (A) Introduction to Computer Engineering (Mid-Term Examination)

Page 5 of 9 Initials: ____

Question 9: Find the minimum logic function of the following Karnaugh map:

(a) (b) (c) (d) (e) Answer: (c) Question 10: Giving the circuit below, what will the value of Q and Q be if the inputs are first set to A=1, B=0, C=1 for 100 ns and then switched to A=0, B=1, C=0 for 100 ns? (Assume Tg = 2ns)

A Q C Q B

(a) (b) (c) (d) (e)

Q = 0, Q = 0 Q = 0, Q = 1 Q = 1, Q = 0 Q = 1, Q = 1 None of the above

Answer: (C)

ECSE-221B 2011 (A) Introduction to Computer Engineering (Mid-Term Examination)

Page 6 of 9 Initials: ____

Part 2 Problems Problem 1 (5 pts): Encode the number -6.352 x 10-9 using the IEEE 754 format and express your result as a 8-digit hexadecimal number. Determine the mantissa to equivalent precision.

Negative bits: 1 Exponent: logbX=log10X/log10b -> log2(X)=log10(6.352 x 10-9)/log10(2) = -27.2301 2-28 =3.7253 x 10-9 -6.352 x 10-9/3.7253 x 10-9=-1.7051 -6.352 x 10-9=-1.7051 x 2-28 Exponent bits: -28+127 = 99 9910 = 0110 00112 Mantissa: # of significant bits = log(6352)/log(2)= 12.6 -> 13 calculate in hex: .7051 x 16 = 11.2816 (1011) .2816 x 16 = 4.5056 (0100) .5056 x 16 = 8.0896 (1000) .0896 x 16 = 1.4336 (0001) Mantissa pas: 1011 0100 1000 0001 Need only 12 bits since 1 is hidden sign = 1 exp = 01100011 mantissa = 10110100100000010000000 1|011 0001 1|101 1010 0100 0000 1000 0000 B 1 D A 4 0 8 0

ECSE-221B 2011 (A) Introduction to Computer Engineering (Mid-Term Examination)

Page 7 of 9 Initials: ____ Problem 2 (5 pts): There are three things asked in this question: 1) Draw a J-K Flip Flop, 2) write the transition state table with the 16 possible input combinations, and 3) indicate in your transition state table which combination corresponds to the toggling mode.

Toggling mode

ECSE-221B 2011 (A) Introduction to Computer Engineering (Mid-Term Examination)

Page 8 of 9 Initials: ____ Problem 3 (5 points) 1) Show the logical circuit of a 2-way routing switch (clearly label all inputs). 2) Show how the logical function of the Sum output of a full adder can be implemented using an 8-input multiplexer (clearly label all inputs and output).

ECSE-221B 2011 (A) Introduction to Computer Engineering (Mid-Term Examination)

Page 9 of 9 Initials: ____ Problem 4 (5 points) Derive the minimal Sum of Product for the following function:

F 1, 3, 4 ,5 , 6 , 7 , 9 ,11
A ,B ,C ,D

Show the corresponding NAND-NAND implementations and draw the circuit diagram using simple logic gates.

ECSE-221B 2011 (A) Introduction to Computer Engineering (Mid-Term Examination)