602 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO.

2, MARCH 2007

Design and Comparison of High Performance

Stationary-Frame Controllers for
DVR Implementation
Yun Wei Li, Member, IEEE, Frede Blaabjerg, Fellow, IEEE, D. Mahinda Vilathgamuwa, Senior Member, IEEE, and
Poh Chiang Loh, Member, IEEE

Abstract—The performance of a dynamic voltage restorer

(DVR) is determined solely by its controller. The design of high
performance control algorithms for DVR control with improved
robustness and desirable steady-state and transient characteris-
tics is therefore an important area of study. In this paper, two
voltage controllers are proposed in the stationary frame for DVR
+
voltage regulation. A P resonant controller is first designed to
achieve good positive- and negative-sequence fundamental voltage
control with the virtue of having high gains around 50 Hz.
Stationary-to-synchronous frame transformations carried out in
traditional synchronous propotional–integral regulators are no
longer required with this method. However, with the purpose
of achieving explicit robustness in face of parameter variations,
an controller is also designed. Detailed design procedure Fig. 1. Typical DVR circuit topology (single-phase representation).
is presented to show how an controller with high gains
around 50 Hz can be synthesized through careful selection of its
weighting functions. A thorough discussion and performance com-
parison of these two controllers in both transient and steady-state power system upstream to DVR is represented by an equiva-
conditions are also carried out. Finally, both controllers are ex- lent voltage source and a source impedance. The basic operation
tensively tested on a laboratory 10-kV medium voltage level DVR principle of the DVR is to inject an appropriate voltage quantity
system with various voltage sags and loading conditions. in series with the supply through an injection transformer when
Index Terms—Dynamic voltage restorer (DVR), control, a PCC voltage sag is detected. Loads connected downstream are
nonlinear load, resonant controller, stationary-frame controller, thus protected from the PCC voltage sag.
unbalanced voltage sag. The performance of a DVR is determined solely by its
controller. The design of high performance control algorithms
for DVR control with improved robustness and steady-state and
I. INTRODUCTION transient performances is therefore an important area of study.
The majority of faults on a power system are unbalanced in

T HE dynamic voltage restorer (DVR) is a series custom

power device intended to protect sensitive loads from the
effects of voltage sags at the point of common coupling (PCC).
A typical DVR connected system circuit is shown in Fig. 1,
where the DVR consists of essentially a series connected injec-
tion transformer, a voltage source inverter (VSI), inverter output
filter and an energy storage device connected to the dc-link. The
Manuscript received October 17, 2006; revised March 13, 2006. This paper
was presented at the 21st Annual IEEE Applied Power Electronics Conference
and Exposition (APEC’06)Dallas, TX, March 19–23, 2006. Recommended for
publication by Associate Editor H. du T. Mouton.
Y. W. Li was with the Center for Advanced Power Electronics, School of
Electrical and Electronic Engineering, Nanyang Technological University,
Singapore 639798 and is now with the Electrical and Computer Engineering
Department, Ryerson University, Toronto, ON M5B 2K3, Canada (e-mail:
ywli@pmail.ntu.edu.sg)
F. Blaabjerg is with the Institute of Energy Technology, Aalborg University,
Aalborg DK-9220, Denmark (e-mail: fbl@iet.aau.dk).
D. M. Vilathgamuwa and P. C. Loh are with the Center for Advanced
Power Electronics, School of Electrical and Electronic Engineering, Nanyang
Technological University, Singapore 639798 (e-mail: emahinda@ntu.edu.sg;
epcloh@ntu.edu.sg).
Digital Object Identifier 10.1109/TPEL.2006.890002
0885-8993/$25.00 © 2007 IEEE
nature which results in unbalanced voltage sag at PCC (usually
without zero-sequence components due to the widely used
delta-star distribution transformers and three-wire medium
voltage level in most countries [1]). Appropriate generation of
unsymmetrical compensation voltage components by a DVR to
compensate both the positive- and negative-sequence compo-
nents of unbalanced voltage sags is therefore also an important
area of research.
In this paper, two voltage controllers are designed in the
stationary frame with embedded inner current loops for DVR
voltage control. A P resonant controller is first designed to
achieve good positive- and negative-sequence fundamental
voltage regulation with the virtue of having high gains around
positive- and negative-sequence fundamental frequencies.
Complex stationary-to-synchronous frame transformations
carried out in the traditional synchronous proportional–inte-
gral (PI) regulators are not required by this method [2]–[4].
Then, with the purpose of achieving explicit robustness in face
of parameter variations, an controller is also designed.
Detailed design procedure is presented to show how an
controller with high gains around 50 Hz can be synthesized
LI et al.: DESIGN AND COMPARISON OF HIGH PERFORMANCE STATIONARY-FRAME CONTROLLERS
Fig. 2. Proposed DVR control scheme in the stationary frame.
through careful selection of its weighting functions. A thor-
ough discussion and performance comparison of these two
controllers in both transient and steady-state conditions is also
presented. Finally, both controllers are extensively tested on
a laboratory 10-kV medium voltage level DVR system with
varying voltage sag (balanced and unbalanced) and loading
(linear and nonlinear) conditions.
II. PROPOSED DVR CONTROL SCHEME
The proposed control scheme for the DVR is illustrated
in Fig. 2. As shown, the voltage at the PCC, , is mea-
sured and used for voltage sag detection and for DVR injection
voltage reference generation (at DVR side of the injection trans-
former). For the DVR injection voltage control, a multiloop
control scheme similar to [13] is implemented as illustrated
in Fig. 2, where an inner filter inductor current feedback
loop is shown embedded within an outer filter capacitor voltage
(or voltage at DVR side of injection transformer)
feedback loop. Both the voltage and current controllers are
implemented in the stationary frame to avoid reference frame
transformations. An algorithm is also implemented to take
necessary actions for reference voltage change rate limit, trans-
former saturation limit, and overmodulation protection (shown
in Fig. 2 as “inverter voltage reference limit” [1]).
After a voltage sag is detected, the difference between the
reference PCC voltage and measured is divided by
the injection transformer turns ratio to determine the reference
DVR injection voltage in the stationary – frame. The
DVR injected voltage feedback is compared with its reference
and the error is fed to a voltage controller. In this work two types
of voltage controllers are investigated, namely a P resonant
controller and an controller. Both controllers are imple-
mented in the stationary – frame and with significant gains
in the vicinity of positive and negative fundamental frequen-
cies ( 50 Hz) to ensure almost zero steady-state error. A de-
tailed discussion and comparison of these two controllers are
presented in Sections III–V.
The output of the voltage controller is then transformed to the
a–b–c frame to generate the reference current which is com-
pared with the filter inductor current feedback . The current
error is fed to a proportional controller whose output gives the
desired voltage to be generated by the inverter, and is
subsequently passed to the pulsewidth modulation (PWM) gen-
erator. Note that the inner current loop mainly functions to im-
prove the dynamic stability of the voltage control scheme, and
as such the proportional controller used will not affect the ac-
curacy of voltage tracking of the outer voltage loop irrespective
of whether the P resonant or controller is being used. In
603
+
Fig. 3. Bode diagram of an ideal P resonant controller.
the next few sections (Sections III–V), the proposed two voltage
control schemes will be investigated.
III. REVIEW OF P RESONANT CONTROLLER
The ideal P resonant controller, expressed in (1), can be
mathematically derived by transforming a synchronous-frame
PI controller to the stationary frame without consideration of
the redundant cross coupling terms [2], and has an infinite gain
at the controller’s resonant frequency , which in this case is
chosen to be the line fundamental frequency (2 50 rad/s)
(1)
In [3]–[5], it is shown that by transforming PI controllers in
both positive- and negative-sequence synchronous frames of a
three-phase system to the stationary frame (using either a fre-
quency domain or time domain technique), the final stationary
controller of (1) can be obtained, and the cross coupling terms
generated from positive- and negative-sequence synchronous
frames cancel each other if the same PI parameters are employed
in both synchronous frames. Therefore, the P resonant con-
troller has infinite gains at both the positive and negative fun-
damental frequencies and in principle will achieve zero steady-
state error for both positive- and negative-sequence regulation.
A typical Bode plot for the ideal P resonant controller is shown
in Fig. 3. As illustrated, the ideal P resonant controller has in-
finite gains at 50 Hz. Note that the controller gains at other
frequencies are quite small and are determined by the value of
(gains at frequencies around 50 Hz are also related to ).
Although theoretically the ideal P resonant controller
achieves zero steady-state error by having infinite gains at
50 Hz, there can be practical problems during its implemen-
tation, particularly as it is sensitive to frequency variations.
More realistic forms are therefore proposed in [2], [6], and the
604
practical P resonant controller in [2] is adopted as expressed
in
(2)
where is the controller cutoff frequency. The frequency re-
sponse of (2) is drawn in Fig. 7(a) (together with the proposed
controller bode plot), which shows that the controller has
a wider bandwidth around the resonant frequency, which mini-
mizes the sensitivity to slight frequency variation, at the expense
of a reduced resonant peak. However, the resulting 44-dB reso-
nant peak is still sufficient for fundamental tracking error elim-
ination. This practical P resonant controller has three parame-
ters, proportional gain for overall gain regulation, resonant
gain for the resonant peak adjustment and cutoff frequency
for resonant bandwidth control. An extensive discussion
about these parameters and their effects on the overall system
performance is presented in Section V.
IV. DESIGN DESCRIPTION OF THE CONTROLLER FOR DVR
Developed in the later last century, robust control has being
widely used in industry plants. With explicitly specified degree
of robustness in face of plant uncertainties and disturbances,
the control method has been implemented in dc–dc con-
verter [7], high frequency resonant inverter [8] and single-phase
UPS inverter [9]. In the mixed-sensitivity loop shaping
problem, the design specifications such as tracking performance
and robustness performance are expressed as constraints on the
singular values (or gain responses) of transfer functions of dif-
ferent loops (from input to error or closed-loop transfer func-
tion). Therefore those loops can be shaped by choosing proper
weighting functions for those constraints, and the con-
troller can be synthesized by using a software package (Robust
Control Toolbox in Matlab [10]) which finds the suboptimal or
optimal solution (by iteration) of the mixed-sensitivity problem
in state space by solving two algebraic Riccati equations.
The standard configuration for control is shown in
Fig. 4, where is the nominal plant; is the desired
controller; , , and are the controlled output, the measured
output, the exogenous input and the control input respectively.
, and are the weighting functions for the tracking
error performance, robust performance and the weight on the
controller transfer function respectively. The controller
synthesis is conducted by singular value loop-shaping using
a mixed sensitivity approach, such that the norm of the
transfer function from to is less than unity. This can be
expressed as
or equivalently (3)
Where 1 the
is the complementary sensitivity transfer function, and
1 1 is the sensitivity transfer
function. It can be seen from (3) that the mixed sensitivity
approach is simply the shaping of (transfer function from
reference to output, or closed loop transfer function) and
(transfer function from reference to error), achieved by properly
selecting their respective weighting functions and . Note
that a small value of 0.1 is assigned to to ensure the
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 2, MARCH 2007
H 1 configuration used for DVR voltage control.
Fig. 4. Standard
matrix of the augmented plant is of full rank as required by the
Matlab augtf and hinf functions [10].
A. Weighting Function Selection for Robust Performance
The nominal plant, with the inner closed-loop current con-
troller, is expressed as
(4)
where is the proportional gain for the current loop. Due to
the difficulties in making parameter variations to the laboratory
DVR prototype, the controller is designed based on 2/3 of
the known system parameter values and then implemented on
the original system to test its performance. System parameter
uncertainty is chosen to vary from 80% to 150% of the nominal
DVR model values (which is quite representative for the param-
eter variations due to aging, saturation and thermal effects, etc.),
so that the synthesized controller is expected to perform
well with the original system (note that load is not considered
as a part of DVR model and the load current can be treated as
an additional disturbance source). This parameter uncertainty is
transformed to multiplicative output uncertainty [11], and the
resultant relative plant uncertainty with respect to the nominal
plant is expressed as
(5)
where is the plant uncertainty, is the disturbed plant
and stands for the singular value of .
The relative plant uncertainty with a combination of dif-
ferent parameter values (varying from 80% to 150% of the nom-
inal values) is plotted in Fig. 5 (with the dashed line indicating
the worst-case uncertainty boundary). For the robustness mea-
sure with 1, is selected as above the worst-case
boundary as shown in Fig. 5, where 0.000266 s 0.8.
B. Weighting Function Selection for Tracking Error
Performance
The tracking error performance can be expressed in terms of
constraint as 1. For properly shaping the
sensitivity function , and therefore achieving satisfactory
tracking error performance, the weighting function should
be carefully determined. Since the reference for the DVR is a si-
nusoidal command only at the line frequency, it would be prefer-
able to use a controller that exhibits high gains at vicinity of
the line frequency while having reduced gains at the other fre-
quencies similar to the P resonant controller. Tracking errors
at the line frequency can be made small by properly shaping
LI et al.: DESIGN AND COMPARISON OF HIGH PERFORMANCE STATIONARY-FRAME CONTROLLERS 605

Fig. 5. Singular values of 1(s) and W .

Fig. 7. Bode plot of (a) controllers and (b) open-loop system using different
controllers.

()
Fig. 6. Singular values of weighting functions of 1=W and S s .

0, the resultant controller would behave like an ideal

P resonant controller, which has theoretically infinite gain and
the sensitivity transfer function to have very small gain at zero steady-state error at 50 Hz. The tracking error at other
the line frequency. This can be achieved by using a standard frequencies can be regulated by tuning in (6).
second order weighting function for as suggested in [9]. Having defined the necessary weighting functions, a mixed
This weighting function is shown in sensitivity optimization control design can be conducted to syn-
thesize an controller such that the norm of the
(6) transfer function from to is less than unity, as expressed in
(3). By using Matlab hinf function, it can be shown that the re-
sultant controller would have the same order as the plant
where the natural frequency is selected to be the line fre-
model augmented with the weights. The controller is sub-
quency, in the numerator gives a freedom for adjustment
sequently reduced to a third-order controller as shown in (7)
of the tracking error over the whole frequency range and the
for implementation convenience. A bode plot of (7) is shown
damping ratio provides another degree of freedom for regu-
in Fig. 7(a)
lating the tracking error around . Since the resultant sensi-
tivity function is shaped in frequency according to the pro-
file specified by 1 , as shown in Fig. 6, a smaller will give
a larger peak response of at the natural frequency and thus
guarantee a smaller steady-state error at the line frequency. As (7)
606 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 2, MARCH 2007

Fig. 8. Robustness analysis for the H1 controller: (a) (b) injected and load
voltages with 2/3 system parameters and (c) (d) injected and load voltages with
nominal system parameters. Fig. 10. Experimental 10-kV DVR system setup.

+
Fig. 11. PCC voltage: (a) with P resonant controller and (b) with H1
+
Fig. 9. Robustness analysis for the P resonant controller: (a) (b) injected and controller.
load voltages with 2/3 system parameters and (c) (d) injected and load voltages
with nominal system parameters.

be seen from Fig. 7(a), the gains at frequencies other than the
neighborhood of the controller resonant frequency remain con-
V. PERFORMANCE AND ROBUSTNESS COMPARISON
stantly low and are related to . With a larger , the system
As discussed in the previous sections, both of the P resonant will have a wider bandwidth and thus faster transient response to
controller and the synthesized controller exhibit signifi- a change in reference signal. A larger also means high am-
cant gains at the vicinity of 50 Hz with very good voltage plification of the DVR filter resonance [for the new plant
tracking. However, characteristics deviate at other frequencies with inner current loop closed, this resonant frequency is
[see Fig. 7(a)] resulting in differences in system dynamics and shifted to a higher frequency as shown in Fig. 7(b)], which will
robustness. cause transient resonant oscillations or even affect the system
stability. To ensure a system with reasonably fast dynamics, the
A. Performance Discussion value of should not be too small. The system steady-state
The practical P resonant controller in (2) has three parame- error is mainly governed by the controller resonant peak. As
ters for tuning according to specific control objectives. The tran- the resonant gain determines the peak value, a large gain
sient performance of the DVR system with P resonant con- value can be assigned to without substantially affecting the
troller mainly depends on the proportional gain . As it can transient and system stability. The cutoff frequency of the
LI et al.: DESIGN AND COMPARISON OF HIGH PERFORMANCE STATIONARY-FRAME CONTROLLERS 607

+
H1 H1
Fig. 14. Zoom-in view of injected voltages: (a) with P resonant controller and
+
Fig. 12. Injected voltages: (a) with P resonant controller and (b) with (b) with controller.
controller.

+
H1
Fig. 15. Frequency spectra of injected voltage: (a) with P resonant controller
and (b) with controller.
+
Fig. 13. Load voltage: (a) with P resonant controller and (b) with H1
controller.
controller and make it immune to the filter resonance. The
error tracking performance is determined by the weight func-
P resonant controller determines the resonant bandwidth of the tion in (6). As mentioned, error tracking at 50 Hz can be
controller. For a DVR system, where a voltage sag is usually ac- accurately maintained by having a small . Similar to the pro-
companied with a phase angle jump, a wider resonant bandwidth portional gain of P resonant controller, the overall gain of
would be preferable, since the angle jump will affect the PLL the controller on the frequency spectrum can be regulated
performance and produce effects similar to a frequency change. by tuning the parameter in (6). To ensure the existence of
A large would also improve the transient dynamics, but the controller, the weighting functions cannot be chosen ar-
system would be driven into filter resonance if the controller bitrarily. A basic criterion is the 0 dB crossover frequency of
bandwidth is extended beyond the filter cutoff frequency. must be sufficiently below the 0 dB crossover frequency of
The third order controller, on the contrary, would exhibit .
very good resonance attenuation while maintaining a rea- For the sake of consistency, control parameters of both con-
sonable transient response by the virtue of having an additional trollers are chosen to give the same resonant width and peak
pole with fast roll-off at high frequency [see Fig. 7(a)]. As men- (and thus same steady-state performance) as shown in Fig. 7(a)
tioned in Section IV, the controller is tuned by selecting (with , , ). Moreover, the same
two weighting functions for the robustness and error tracking inner current gain is used in each approach (a large
performance. The robust performance design is intended to pro- would flatten the filter resonant peak, but is always
duce fast high frequency roll-off characteristics for the limited due to practical considerations such as amplifications of
608
+
H1
Fig. 16. Frequency spectra of load voltage: (a) with P resonant controller and
(b) with controller.
+
Fig. 17. PCC voltage: (a) with P resonant controller and (b) with
controller.
capacitor current noise, measurement noise and dc offset). The
resultant controller and system open loop bode plots are illus-
trated in Fig. 7(a) and (b). It can be seen that both the systems
have similar bandwidths. However, compared to the P resonant
controller, which is sensitive to the filter resonance, the
controller would make the system more immune to the filter
resonance by having a steeper high frequency attenuation.
It can be shown in Fig. 7(a) and (b) that the P resonant
controller has higher low frequency attenuations below 50 Hz,
which is due to the small (0.4) limited by the consideration
at filter cutoff frequency as discussed earlier. This low fre-
quency attenuation would filter out dc offsets present in most in-
tegrated circuit (IC) chips (as used in analog interfacing boards)
and other sub-harmonics or sub-resonance disturbances. It was
observed in experiments that the relatively higher low frequency
gains of the controller can cause stability problems. Such
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 2, MARCH 2007
+
Fig. 18. Injected voltage: (a) with P resonant controller and (b) with H1
controller.
+
Fig. 19. Load voltage: (a) with P resonant controller and (b) with H1
H1 controller.
a situation may arise due to imperfect calibrations of measure-
ment, ADC conversion effects or distorted DVR references gen-
erated from the PCC, where the presence of low frequency com-
ponents can be attributed to phenomena such as ferro-resonance
of the distribution transformer. To reduce low frequency gains,
in (6) should be kept small enough ( 1.1 in this work).
B. Robustness Comparison
As illustrated in Fig. 7(b), the system with the con-
troller has much better attenuation of high frequency distortions.
The immunity to high frequency disturbance especially around
the filter resonance frequency is responsible for the system
robustness.
A robustness comparison of the P resonant and the
controllers was carried out based on simulations. As discussed
in Section IV, the controller was designed based on 2/3 of
the nominal system parameter values with an estimated range of
LI et al.: DESIGN AND COMPARISON OF HIGH PERFORMANCE STATIONARY-FRAME CONTROLLERS
+ (b) with
H1
Fig. 20. Zoom-in view of injected voltages: (a) with P resonant controller and
(b) with controller.
+
H1
Fig. 21. Frequency spectra of injected voltage: (a) with P resonant controller
and (b) with controller.
parameter variations from 80% to 150%. Therefore, when im-
plemented on the original system there should be no degradation
of performance due to its specified robustness. This is confirmed
in Fig. 8, where waveforms (a) and (b) are the DVR injection
voltage and load voltage with 2/3 of filter inductance and filter
capacitance values, and waveforms (c) and (d) are the injec-
tion voltage and load voltage with original system parameters.
Therefore, it can be seen that the DVR compensation perfor-
mance with controller remains very robust despite system
parameter variations.
For the purpose of comparison, a P resonant controller was
specifically tuned with 2/3 of the filter inductance and capac-
itance values. Its performance in terms of DVR compensation
voltage and load voltage are shown in Fig. 9(a) and (b), respec-
tively. As has been discussed, the P resonant controller may
not have adequate robustness for parameter variations. This lack
609
+
H1
Fig. 22. Frequency spectra of load voltage: (a) with P resonant controller and
controller.
+
Fig. 23. PCC voltage: (a) with P resonant controller and (b) with H1
controller.
of robustness is verified in Fig. 9(c) and (d), where the DVR in-
jecting voltage shows serious transient resonance under param-
eter variations. This transient resonant response, if not damped
effectively, may hamper the functioning of the load or even
cause the system to become unstable.
VI. EXPERIMENTAL INVESTIGATIONS
The proposed and P resonant controllers have been im-
plemented on a laboratory 10-kV DVR system and extensively
tested in experiments. The 10-kV DVR hardware prototype con-
figuration is illustrated in Fig. 10. The ac supply is a 15-kVA
California Instrument Supply programmed at 380 V. A 50-kVA
star-delta transformer steps up the voltage to 10 kV. The load
voltage is stepped down using another 50-kVA delta-star trans-
former. The DVR is connected at the 10-kV level through three
67-kVA single-phase series injection transformers. The dc-bus
voltage of the DVR can be charged up to 600 V using two dc sup-
plies, which provide a maximum of 4680-J energy in the 26 mF
610
+
Fig. 24. Injected voltage: (a) with P resonant controller and (b) with
controller.
+
Fig. 25. Load voltage: (a) with P resonant controller and (b) with
controller.
of dc capacitors, for transient use in the DVR sag ride-through
capabilities.
Control of the DVR is implemented on a dual digital signal
processor (DSP)-Microcontroller system, with an Analog De-
vices AD21026 floating-point Sharc DSP for implementation of
control algorithm and a Siemens SAB 80C167 Microcontroller
for PWM signal generation for the six IGBT phase-legs. A Dual
Port RAM unit (DPRAM) is used as a communication link be-
tween the DSP and Microcontroller, where the results from the
DSP are transferred to DPRAM and are read by the Microcon-
troller. Analog signals are converted to digital signals using two
eight channel AD 7891 A/D converters and read by the DSP
once in each switching cycle.
Once the measured PCC voltage magnitude drops below 90%
of its nominal value, a voltage sag is detected. DVR compen-
sates for the voltage sag with a reference generated by the error
between PCC voltage reference (calculated using a pre-set ref-
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 2, MARCH 2007
H1 H1
Fig. 26. Negative-sequence components of the PCC and load voltages: (a) with
+
P resonant controller and (b) with controller.
erence voltage magnitude and a PLL [1], [12]), and the mea-
sured PCC voltage, expressed as (see Fig. 2). The
P resonant controller is tuned based on the system parameters
given in Table I in the Appendix. However the designed
controller based on 2/3 of the system parameter values is im-
plemented in the experiment for robustness verification. Both
voltage controllers are transformed to discrete form using bi-
linear transformation before implemented on the DSP controller
board.
A. Balanced Voltage Sag and Linear Load
The first experiment is carried out for a balanced voltage sag
and a linear load (67 ). The PCC voltage drops to 70% of its
nominal value from 40 ms to 140 ms (five fundamental cycles).
The PCC voltage, DVR injected voltage (at high voltage side of
the injection transformer) and load voltage with both controllers
are shown in Figs. 11–13. It can be seen that both controllers per-
form load voltage restoration effectively during a PCC voltage
H1 sag. However there is still a slight difference between the DVR
injected voltages during the startup transient, which can be seen
in the zoomed-in view of the injected voltage in Fig. 14. The
P resonant controller gives slight startup oscillations, this is
due to the relatively high gains of the controller at high frequen-
cies and therefore high amplification of the filter resonance,
which makes the system oscillate at the resonant frequency
once it is excited. The controller, on the contrary, has very
smooth transient during startup as it has fast high frequency
roll-off characteristics. This can also be verified by comparing
results shown in the frequency spectra in Figs. 15 and 16. The
DVR injected voltage with controller has less THD (1.9%)
compared to the P resonant controller (THD 2.1%), due to
the increased high frequency attenuation of the controller
Fig. 15(b). This difference is seen in load voltage too. As shown
in Fig. 16, the load voltage with controller has a little better
THD (0.77%) with lower high frequency harmonics compared
to that with P resonant controller (with THD of 0.8%). In gen-
eral, both the P resonant and controllers have good per-
formance with the linear load. There is only slight difference
during start up.
LI et al.: DESIGN AND COMPARISON OF HIGH PERFORMANCE STATIONARY-FRAME CONTROLLERS
TABLE I
SYSTEM PARAMETERS
B. Balanced Voltage Sag and Nonlinear Load
The DVR performance with a nonlinear load and a balanced
PCC voltage sag is also investigated. The nonlinear load is a
diode rectifier bridge with a capacitor bank (200 F) and resis-
tive load (80 ) connected in parallel. The PCC voltage drops
to 70% of its nominal value from 40 ms and lasts for five cy-
cles. The PCC voltage, DVR injected voltage and resultant load
voltage are shown in Figs. 17–19.
It can be observed that with the nonlinear load connected at
downstream, the PCC voltage, DVR injected voltage and load
voltage are distorted. The distortion of PCC voltage is due to the
voltage drop across the source impedance (mainly the step-up
transformer in this experiment). The distorted PCC voltage
gives rise to a distorted DVR reference voltage ( , Fig. 26(a) and (b) are a fluke and are introduced by the low
where is a sinusoid but has harmonic components)
and subsequently a distorted injected voltage. However, further
distortion in the injected voltage is observed in Fig. 18(a) with
P resonant controller compared to that with controller [in
Fig. 18(b)]. The same effect is shown clearly at the zoomed-in
waveforms in Fig. 20(a) and (b). The increased distortion with
P resonant controller is due to the fact that the nonlinear load
will continue to introduce high frequency harmonic excitations.
The controller in this case is a better option due to its high
frequency disturbance rejection capability. As can be seen from
Fig. 21(a) and (b), the injected voltage with controller
has much less 7th, 11th, and 13th harmonics and less THD
(3.7%) compared to the voltage with P resonant controller
(with THD of 5.8%). These different injection voltages cause
the load voltage with the controller to have smaller high
frequency harmonics and smaller THD of 2.5% (compared to
2.9% THD with P resonant controller). It can be concluded
that with nonlinear load, the advantages of controller
611
TABLE II
H1
SUMMARIZED PERFORMANCE FEATURES OF
+
P RESONANT AND CONTROLLERS
become more obvious with its effective attenuation of high
frequency harmonic distortions (see Fig. 22).
C. Unbalanced Voltage Sag
The last experiment is carried out with an unbalanced voltage
sag. The PCC voltages shown in Fig. 23 are programmed with a
positive-sequence voltage drop of 20% and an injection of 10%
negative-sequence voltage for five cycles starting from 40 ms.
The corresponding DVR injection voltages and load voltages are
shown in Figs. 24 and 25. It can be seen that both the P resonant
and controller would effectively inject appropriate unbal-
anced voltages and symmetrically restore the load voltage to its
nominal value with the sufficiently large gains at 50 Hz.
A sequence analysis of the PCC voltages and load voltages
is shown in Fig. 26(a) and (b). With both controllers, the
negative-sequence component of the load voltage is reduced
to 1.6%. Note that the waveform oscillatory transients in
pass filtering effect (averaging data over one fundamental cycle
to filter out the negative/positive-sequence components in posi-
tive/negative synchronous frame) of the sequence components
analysis tool used in offline analysis.
VII. CONCLUSION
In this paper, two voltage controllers, namely a P resonant
controller and an controller, are proposed in the stationary
frame for DVR voltage regulation. Both controllers have good
steady-state sinusoidal error tracking of the positive- and nega-
tive-sequence components with the virtue of having high gains
around positive- and negative-sequence fundamental frequen-
cies. A detailed analysis of parameter tuning for the P resonant
controller and weighting function selection for the con-
troller design is presented. A thorough discussion and perfor-
mance comparison of these two controllers in both transient and
steady-state conditions are also carried out. Finally, both con-
trollers are extensively tested on a laboratory 10-kV medium
612
voltage level DVR system, with varying voltage sag and loading
conditions. It is shown that both controllers are equally effec-
tive in unbalanced voltage regulation. With linear loads, both
controllers perform well with slight difference during startup
transient. However, the advantages of the robust controller
become more obvious with nonlinear loads due to its better at-
tenuation of the high frequency harmonic distortions. Perfor-
mance comparisons of the proposed controllers are summarized
in Table II in the Appendix.
APPENDIX
See Tables I and II.
REFERENCES
[1] J. G. Nielsen, “Design and Control of a Dynamic Voltage Restorer,”
Ph.D. dissertation, Inst. Energy Technol., Aalborg Univ., Aalborg,
Denmark, 2002.
[2] D. N. Zmood, D. G. Holmes, and G. H. Bode, “Frequency-domain anal-
ysis of three-phase linear current regulators,” IEEE Trans. Ind. Appl.,
vol. 37, no. 2, pp. 601–610, Mar./Apr. 2001.
[3] P. Mattavelli, “Synchronous-frame harmonic control for high-perfor-
mance ac power supplies,” IEEE Trans. Ind. Appl., vol. 37, no. 3, pp.
864–872, May/Jun. 2001.
[4] Y. W. Li, D. M. Vilathgamuwa, and P. C. Loh, “A grid-interfacing
power quality compensator for three-phase three-wire micro-grid
applications,” IEEE Trans. Power Electron., vol. 21, no. 4, pp.
1021–1031, Jul. 2006.
[5] C. B. Jacobina, M. B. Correa, T. M. Oliveiro, A. M. N. Lima, and E. R.
C. da Silva, “Current control of unbalanced electrical systems,” IEEE
Trans. Ind. Electron., vol. 48, no. 3, pp. 517–525, Jun. 2001.
[6] M. J. Newman, D. G. Holmes, J. G. Nielsen, and F. Blaabjerg, “A dy-
namic voltage restorer (DVR) with selective harmonic compensation
at medium voltage level,” IEEE Trans. Ind Appl., vol. 41, no. 6, pp.
H1
1744–1753, Nov./Dec. 2005.
[7] R. Naim, G. Weiss, and S. Ben-Yaakov, “ control applied to boost
power converters,” IEEE Trans. Power Electron., vol. 12, no. 4, pp.
H1
677–683, Jul. 1997.
[8] Z. M. Ye, P. K. Jain, and P. C. Sen, “ controller design for high fre-
quency resonant inverter system with voltage mode control,” in Proc.
H1
IEEE IECON’04, 2004, pp. 41–46.
[9] T.-S. Lee, S.-J. Chiang, and J.-M. Chang, “ loop-shaping con-
troller designs for the single-phase UPS inverters,” IEEE Trans. Power
Electron., vol. 16, no. 4, pp. 473–481, Jul. 2001.
[10] “Robust Control Toolbox User’s Guide,” The Math Work, Inc., Jun.
2001.
[11] M. Aten and H. Werner, “Robust multivariable control design for
HVDC back to back schemes,” Proc. Inst. Elect. Eng., vol. 150, no.
6, pp. 761–767, Nov. 2003.
[12] J. G. Nielsen, M. Newman, H. Nielsen, and F. Blaabjerg, “Control and
testing of a dynamic voltage restorer (DVR) at medium voltage level,”
IEEE Trans. Power Electron., vol. 19, no. 3, pp. 806–813, May 2004.
[13] D. M. Vilathgamuwa, A. A. D. R. Perera, and S. S. Choi, “Performance
improvement of the dynamic voltage restorer with closed-loop load
voltage and current-mode control,” IEEE Trans. Power Electron., vol.
17, no. 5, pp. 824–834, Sep. 2002.
Yun Wei Li (S’04–M’06) received the B.Eng degree
in electrical engineering from Tianjin University,
Tianjin, China, in 2002, and the Ph.D. degree from
the School of Electrical and Electronic Engineering,
Nanyang Technological University, Singapore, in
2006.
From February to August 2005, he was attached
to the Institute of Energy Technology, Aalborg
University, Aalborg, Denmark, as a Visiting Scholar.
Currently, he is a Postdoctoral Fellow in the Elec-
trical and Computer Engineering Department,
Ryerson University, Toronto, ON, Canada.
Dr. Li is a member of the IEEE Industrial Application Society.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 2, MARCH 2007
Frede Blaabjerg (S’86–M’88–SM’97–F’03) was
born in Erslev, Denmark, on May 6, 1963. He
received the M.Sc.EE. and Ph.D. degrees from
Aalborg University, Aalborg, Denmark, in 1987 and
1995, respectively.
He was with ABB-Scandia, Randers, Denmark,
from 1987 to 1988. He became an Assistant Pro-
fessor in 1992 at Aalborg University, in 1996 an
Associate Professor, and in 1998 a Full Professor in
power electronics and drives. Today he is also Dean
of the Faculty of Engineering Science and Medicine.
In 2000, he was a Visiting Professor with the University of Padova, Padova,
Italy, as well as a part-time Programme Research Leader in wind turbines at
the Research Center Risoe. In 2002, he was a Visiting Professor at Curtin
University of Technology, Perth, Australia. He is involved in more than ten
research projects within the industry. Among them is the Danfoss Professor
Programme in Power Electronics and Drives. He is the author or coauthor of
more than 500 publications in his research fields including Control in Power
Electronics (New York: Academic, 2002). He is an Associate Editor for the
Journal of Power Electronics and Elteknik. He has been very involved in
Danish Research policy in the last ten years. His research interests are in power
electronics, static power converters, ac drives, switched reluctance drives,
modeling, characterization of power semiconductor devices and simulation,
wind turbines, and green power inverters.
Dr. Blaabjerg received the 1995 Angelos Award for his contribution in
modulation technique and control of electric drives, the Annual Teacher Prize
from Aalborg University, in 1995, the Outstanding Young Power Electronics
Engineer Award from the IEEE Power Electronics Society in 1998, five IEEE
Prize paper awards during the last five years, the C. Y. O’Connor fellow-
ship from Perth, Australia in 2002, the Statoil-Prize for his contributions in
power electronics in 2003, and the Grundfos-prize for his contributions in
power electronics and drives in 2004. He is an Associate Editor of the IEEE
TRANSACTIONS ON INDUSTRY APPLICATIONS and the IEEE TRANSACTIONS ON
POWER ELECTRONICS. He is a member of the Danish Academy of Technical
Science, the European Power Electronics and Drives Association, and the
IEEE Industry Applications Society Industrial Drives Committee. He is also a
member of the Industry Power Converter Committee and the Power Electronics
Devices and Components Committee, IEEE Industry Application Society.
D. Mahinda Vilathgamuwa (S’90–M’93–SM’99)
received the B.Sc.degree in electrical engineering
from the University of Moratuwa, Sri Lank, in 1985
and the Ph.D. degree in electrical engineering from
Cambridge University, Cambridge, UK, in 1993.
He joined the School of Electrical and Electronic
Engineering, Nanyang Technological University,
Singapore, in 1993 as a Lecturer and he is now an
Associate Professor. He has published more than
80 research papers in refereed journals and confer-
ences. His research interests are power electronic
converters, electrical drives, and power quality.
Dr Vilathgamuwa was the co-chairman of Power Electronics and Drives Sys-
tems Conference in 2005 (PEDS’05).
Poh Chiang Loh (S’01–M’04) received the B.Eng
(with honors) and M.Eng degrees from the Na-
tional University of Singapore in 1998 and 2000,
respectively, and the Ph.D. degree from Monash
University, Victoria, Australia, in 2002, all in elec-
trical engineering.
During the Summer of 2001, he was a Visiting
Scholar with the Wisconsin Electric Machine
and Power Electronics Consortium, University
of Wisconsin, Madison, where he worked on the
synchronized implementation of cascaded multilevel
inverters, and reduced common mode carrier-based and hysteresis control
strategies for multilevel inverters. From 2002 to 2003, he was a Project Engineer
with the Defence Science and Technology Agency, Singapore, managing major
defence infrastructure projects and exploring new technology for intelligent
defence applications. Since 2003, he has been an Assistant Professor with
Nanyang Technological University, Singapore.