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SECOND SEQUENCE EXAM Class: F36 Option: Electrotechnology Duration: 04H Coefficient: 4 Written paper
SECTION TWO: ANALOG CIRCUITS Exercise 1: Alternating current (1). The circuit of figure 1 bellow is supplied by an ac voltage u.
i u(t)
R2 C R1
u (t )
Figure1
GTHS KUMBO_Electrical Department_Second sequence examNov.2011
2. Show that the expression of the current i flowing in the circuit is given by
i I 2 sin 100
. u(t) is given by
3. Show
u ' (t )
that
Exercise 2: Alternating current (2) The circuit of figure 2 bellow is connected to a voltage v(t )
220 2 sin 100 t volts.
i1 i i2
R1
R2
Figure2
Given thatR1 = 100; R2 = 150; L = 0.24 H and C = 16F. 1. Determine the following complex impedances: a. Z1 for the branch (R1 + L) b. Z2 for the branch (C + R2) 2. Calculate the complex values of i1, i2 and i. 3. Draw the phasor diagram of the currenti1, i2 and i. Exercise 3: DC circuit Consider the following circuit in figure 3.
E1 = 12V, E2 = 6V, Ro= 20, R1 = 10, R2 = 4 and R = 5. 1. Determine the characteristics of the Norton
R1 RO R2 E1 E2 R
equivalent generator seen from terminals A and B when K is opened. 2. Deduce the corresponding Thevenin,s
B
Figure3
Exercise 4: Bipolar transistor The two transistors of figure 4 bellow are in silicon such that V BE1 = VBE2 = 0.7V, 1=100, 2=200. The operating point is such that UEM = 5V for UAM = 20V.R1=1k, R2=1k, R3=10k
A
1. Calculate
the
current
i1
flowing
UAM
2. Determine the voltage across the resistance R3 and the current I3 flowing through this resistance. 3. Neglecting IB2 with respect to I1,
T1
B1
B2
T2
calculate the base current IB1of the transistor T1. 4. Calculate IC2, hence, deduce IB2
E UEM
R1
1k
R2
1k
and verify that IB2 is negligible with respect to I1 5. Calculate the voltage across R and
M
the
current
crossing
it.
Hence,
Figure4
The figure 5 below shows the block diagram of an electronic circuit which accepts two binary numbers of two bits X1X0 and Y1Y0, and gives at the output the binary number Z3Z2Z1Z0 which is equal to the arithmetic product of the two input numbers. For the inputs, X0 and Y0 are the least significant bits (LSB) while for the outputs, Z3 is the most significant bit (MSB).
X1 X0 Y1 Y0 Multiplicator circuit
Z3 Z2 Z1 Z0 Figure5 3
1. What do you understand by the statements Least significant bit and Most significant bit? 2. Establish the truth table of the system. 3. Write the expression of each output Z3, Z2, Z1 and Z0 as function of X1, X0 Y1 andY0. 4. With the aid of Karnaugh map, simplify the output equations obtained above. 5. Draw the logic diagram of the electronic multiplicator circuit using the simplified output equations. Exercise 2: Parity detector We desire to realize a 3-bit parity detector of bits B1, B2 and B3. The operation is as follows: If 0 or 2 bits are at high logic level, the output is at the high level. If 1 or 3 bits are at high logic, the output is at the low level.
1. Draw the corresponding truth table. 2. Give the expression of the output S in terms of B1, B2 and B3. 3. Write the expression of S using the operator exclusive OR only. 4. Draw the logic diagram of S.
Exercise 3: Numeration system Let us consider the following numbers: A = 1101011012 B=6248 C=1A716
1. Convert A into octal and hexadecimal. 2. Convert B and C into binary. 3. Calculate: X(2)=A(2)+ B(2); Y(16)=A(16)+ C(16) W(8)=A(8 ) B(8)