VINAYAKA MISSIONS UNIVERSITY V.M.K.

V ENGINEERING COLLEGE & AARUPADAI VEEDU INSTITUTE OF TECHNOLOGY DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING COURSE : B.E (CSE) SEM : III DIGITAL ELECTRONICS (COMMON FOR CSE, IT, MECHATRONICS, ECE, ETCE&CSSE)

UNIT I- BASIC CONCEPTS AND BOOLEAN ALGEBRA PART A 1. Define Min terms & Max terms. 2. Find the decimal equivalent for 11011012. 3. Convert the binary to gray code 1110112. 4. What are excess 3 codes? 5. Obtain the octal number for F3BC16. 6. (0.5456)10 = (?)2. 7. What is BCD code? 8. State De-Morgans law. 9. Define octet and quad in K-Map. 10. Find the 2s complement for 110101012. 11. Prove the identity law. 12. Simplify the Boolean expression F=yz + yz + xy. 13. Find the min terms for A+BC. 14. Express y= (A+B) (B+C) (A+C) in POS form. 15. Convert the gray to binary code 1100102. 16. Convert the octal number (576)8 to decimal equivalent. 17. What is meant by duality in Boolean algebra? 18. Find the 1s complement for 10101012. 19. What are the basic laws of Boolean algebra? 20. Convert (7431)10 into its excess -3 code. 21. Define prime implicants. 22. State and explain the basic Boolean logic operation. 23. Represent the hexadecimal number (3FD)16 in powers of 16 & find its decimal equivalent. 24. Convert (615)8 to its hexadecimal equivalent. 25. list out the types of weighted & non-weighted codes. PART B 1. Reduce the following function using K map technique

Z = A B+A B C+AC+A B C 2. 3. Reduce the following function using K map technique. F (w,x,y,z) = m( 0,7,8,9,10,12) + d(2,5,13) Reduce the following function using K map technique F(A,B,C,D)= m (0,2,3,8,9,12,13,15) 4. Reduce the following function using K map technique F(A,B,C,D)= M (0,3,4,7,8,10,12,14) + d(2,6) 5. . Perform the following a) Convert (725.25)8 to its decimal, binary and hexadecimal equivalent. b). Convert following decimal in to octal equivalent 1. (32.29)10 2. (672)10 6. Perform the following a) Convert (FCB3A)16 to octal equivalent b) Add 32 and 65 using Excess 3. c) Convert the Decimal into binary (183.65)10 7. Reduce the following function using K map technique F(A,B,C,D)= M (0,1,3,4,5,7,9,12,13) 8. Reduce the following function using K map technique F(A,B,C,D)= m (5,6,7,12,13) + d(4,9,14,15) 9. 10. Express the following function as the minimal sum of products, using a K-map. F (a,b,c,d) =m(0,2,4,5,6,8,10,15) + d (7,13,14) Use Quine McClusky method to obtain the minimal sum for the following function. F(X1X2X3X4) = (0, 1, 3, 6, 7, 14, 15)

UNIT II- LOGIC GATES PART A 2

1. What are the advantages of digital integrated circuits? 2. List the advantages and disadvantages of RTL family? 3. What are the merits and demerits of DTL family? 4. Give the comparison of TTL series characteristics? 5. Compare the totem-pole and open-collector outputs? 6. List the important characteristics of NMOS Logic? 7. Give the comparison between TTL and CMOS families? 8. Give the characteristics of ECL family. 9. Define fan out for a logic circuit. 10. What is meant by wired operation? 11. Define fan in for a logic circuit. 12. Define propagation delay. 13. Define power dissipation. 14. What is the universal gate? Justify the reason for it. 15. Define transition time. 16. Why ECL logic is faster than TTL? 17. Define tristate gate. 18. Name the 3 sections of a TTL NAND gate circuit. 19. What factors determine CMOS fan out? 20. Draw the symbol of schottky transistor. 21. Define the open collector output TTL and where it is used. 22. ECL belongs to _________________ logic system. 23. Mention the name of the logic family which comes under the non saturated logic system. 24. What is the difference between current sinking and current sourcing logic circuits? 25. State the advantage and disadvantage of totem pole output. PART B 1. Write short notes on a. Current and voltage. b. Fan-out c. Noise margin d. Propagation delay. e. Power dissipation. f. Speed power product. 2. Explain the 2-input NOR gate of RTL. 3. Explain the 2-input NAND gate of DTL family. 4. Draw the circuit diagram and explain the operation of 2 input TTL NAND gate with Totem-pole output. 5. Describe the characteristics of TTL family. 6. Draw and explain the HTL NAND gate. 7. Draw and explain the basic NMOS gate. 8. Draw and explain the basic NMOS NAND and NOR gates. 9. Draw and explain the circuit of two point CMOS NAND gates. 10. Draw and explain the circuit of two point CMOS NOR gates.

UNIT III- COMBINATIONAL CIRCUITS PART A 1. Give the logical expression for sum and carry for a half adder. 2. Realize the AND function using 2.1 MUX. 3. Realize the OR functions using 2.1 MUX. 4. Give the truth table for half adder and write the expression for sum and carry. 5. What are some of the major applications of multiplexer? 6. What is code converter? 7. Mention the difference between a DEMUX and a MUX. 8. How an encoder does differ from a decoder? 9. Define half subtractor & full subtractor. 10. Obtain the expression for difference & borrow of a full subtractor. 11. What is PAL & PLA? 12. What is EPROM? 13. What is combinational circuit? Give an example? 14. What is the difference between a full adder & a full subtractor? 15. What is meant by an encoder? 16. What is the difference between the serial adder & parallel adder? 17. What is meant by a magnitude comparator? 18. List the basic types of programmable logic devices? 19. What is mask programmable and filed programmable logic array? 20. Design full adder using only NOR gates. 21. Draw the circuit diagram of Half Adder using only NAND gates. 22. Design the Four bit parallel Adder using Full adder. 23. What is the use of decoder? PART B 1. Explain the design procedure for combinational circuits. 2. Draw and explain the block diagram for n-bit parallel adder. 3. Implement the following functions using multiplexer. a. F(A,B,C)=m(2,4,5,8,9,10,12) b. F(A,B,C,D)= m(1,5,8,11,12,15) c. F(A,B,C,D)=m(0,3,4,7,8,11)+d (2,10,12) 4. Implement the following functions using 3.8 decoder a. F1(A,B,C)=m(0,1,4,5,7) b. F2(A,B,C)=m(2,4,6,7) 5. Explain the full subtractor circuit using logic gates & verify its truth table. 6. Implement a 4:1 multiplexer & explain its operation. 7. Obtain the expression for SUM and CARRY outputs of a full adder and implement the same. 8. Explain how multiplexer can be used to implement logic function directly from the truth table without the need for simplification. 9. Draw the circuit of half-adder & half subtractor & explain its operation

UNIT IV- SEQUENTIAL CIRCUITS PART A 1. State various applications of shift register. 2. Define ripple counter. 3. What do you mean by sequential circuits? 4. Give the comparison between combinational and sequential circuits. 5. Give the comparison between synchronous and asynchronous sequential circuits. 6. Draw the basic bi stable element. 7. State the difference between latches and flip-flop. 8. Write the truth table for SR latch. 9. Explain various triggering methods. 10. What do you mean by universal register? 11. What is flip-flop? 12. Define latch. 13. Give the use of memory elements. 14. Define toggle condition in JK-Flip-flop. 15. Write the truth table for JK-Flip-flop. 16. What is a D Flip-flop & give its advantage. 17. Give the types of edge triggering. 18. Define excitation table. 19. Give the various types of shift register. 20. Define modulus counter. 21. Define counter 22. What is the advantage of master slave over JK Flip-flop. 23. What is synchronous counter? 24. Define state reduction. 25. What is state assignment? PART B 1. Draw and explain the operation of controlled buffer register. 2. Explain the operation of 4-bit serial-in-serial-out shift register with the help of neat Diagram. 3. Draw and explain 4-bit serial-in-parallel-out shift register 4. Draw and explain the operation of parallel-in-parallel out shift register. 5. Explain the operation of 4-bit bidirectional shift register with the help of neat diagram. 6. Explain various triggering methods. 7. Write short notes on a. JK flip flop b. D flip-flop. c. T flip flop. d. RS flip flop. 8. Write short notes on a. Buffer registers b. Controlled buffer register

c. Shift register 9. Write short notes on a. State table b. State diagram c. Transition equations d. ASM chart 10. Write short notes on a. Latches b. Flip-flop c. Counters d. Registers

UNIT V- FUNDAMENTAL MODE SEQUENTIAL CIRCUITS PART A 1. What are the fundamental modes of sequential circuits? 2. What is the significance of state assignment? 3. List the different techniques used for state assignment. 4. What are races & cycles? 5. Define critical races. 6. Define non critical races 7. What are the different types of hazards in asynchronous sequential circuits? 8. Differentiate static 0 & static 1 hazard. 9. What do you meant by hazard free asynchronous sequential circuits? 10. How can essential hazards be eliminated? 11. Explain the pulse mode asynchronous sequential circuit. 12. What are the steps for the analysis of asynchronous sequential circuits? 13. When the 2 states said to be an equivalent states. 14. Explain the problem in asynchronous circuits. 15. Distinguish between completely and incompletely state machines. 16. Define stable state. 17. What is meant by one hot state assignment? 18. Differentiate synchronous and asynchronous sequential circuits.

PART B

1. Write short notes on a) Shared row state assignment

b) one hot state assignment

2. Obtain a static hazard free asynchronous circuit for the following switching function F =m (0, 2, 4, 5, 6, 8, 10, 14) 3. Explain the procedure to give the hazard free realization of a Boolean function. 4. Explain static, dynamic essential hazards in digital circuit. Give hazard free realization for following Boolean function F (a, b, c, d) =m (2, 3, 5, 7, 10, 14) 5. For a given Boolean function obtain the hazard free circuit F (a, b, c, d) =m (1, 3, 6, 7, 13, 15) 6. For a given Boolean function obtain the hazard free circuit F (a, b, c, d) =m (0, 2, 6, 7, 8, 10, 12) 7. Explain the fundamental mode asynchronous sequential circuit. 8. Explain the pulse mode asynchronous sequential circuit. 9. (a) Define Hazards. Explain its types (b) Design a hazard free circuit F= (1, 3, 7, 11, 15) 10. An asynchronous sequential circuit is described by the following excitation and output function Y = x1x2 + (x1 + x2) Y Z=Y (i) Draw the logic diagram of the circuit (ii) Derive the transition table and output map (iii) Describe the behavior of the circuit