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16th NATIONAL POWER SYSTEMS CONFERENCE, 15th-17th DECEMBER, 2010

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Modeling of Electric Arc Furnace & Control Algorithms for voltage flicker mitigation using DSTATCOM
K.Anuradha
EEE Department VNR VJIET Hyderabad, India anuyalavarti@yahoo.co.in

B.P.Muni
PES Department BHEL Corporate R&D Hyderabad, India bpmuni@bhelrnd.co.in

A.D.Raj Kumar
EEE Department CVR College of Engineering Hyderabad, India adrajkumar@yahoo.com

AbstractVoltage flicker, a phenomenon of annoying light intensity fluctuation is caused by Electric Arc Furnace (EAF). Voltage flicker is a major power quality concern for both power companies and customers. This paper presents a model of EAF and control algorithms for Distribution STATic synchronous COMpensator (DSTATCOM) for voltage flicker mitigation. The EAF was modeled as a current source controlled by a non linear resistance. Two control algorithms were developed. One of the methods is based on instantaneous reactive power p-q theory and the other method is based on synchronous reference frame d-q theory. Both the control schemes are simulated using MATLAB/SIMULINK along with the SimPowerSystem Block set. In both the controllers compensating reactive currents are generated which help in the mitigation of voltage flicker. Keywords- Electrical Arc Furnace (EAF); flicker mitigation; power quality; reactive powe; DSTATCOM; p-q theory; d-q theory.

There are different methods for modeling EAF. In general these models may be broadly classified as (a) Time domain analysis methods [1-9] (b) Frequency domain analysis methods [1, 2, 10, 11] (c) Chaotic variation methods [12,13]and (d) Model based on EAFs periodic draw of active and reactive power[14]. The most commonly used methods for compensation of voltage flicker is by regulating the EAF passive components [15-17], static VAR compensator (SVC) and DSTATCOM. Distribution Static Compensator (DSTATCOM), which consists of an IGBT-based voltage source converter, uses advanced power switches to provide fast response and flexible voltage control at the PCC for power quality improvement in distribution systems. The flicker mitigation techniques for EAF loads described so far in literature [18-22] have used a simple and an approximate model of an EAF. In the present work a DSTATCOM is used for flicker mitigation. The EAF model chosen for the study is an accurate representation based on the non-linear V-I characteristic of arc furnace [9]. In this paper the DSTATCOM controller is based on Instantaneous Reactive Power (IRP) theory and Synchronous Reference Frame (SRF) theory for compensation of reactive power. This controller aids in the mitigation of voltage flicker due to Electric Arc Furnace. The control methods are compared with simulation studies using SimPowerSystem model of DSTATCOM in MATLAB/SIMULINK environment. The simulation studies have demonstrated the effectiveness of these control philosophies of DSTATCOM for voltage flicker mitigation. This paper is organized as follows. In section II, Electric Arc Furnace (EAF) is modeled as a time varying current controlled non linear resistance. The mathematical representation and flicker is simulated using MATLAB/SIMULINK software. In section III, DSTATCOM is used for flicker mitigation by two different control strategies based on p-q theory and d-q model. The compensation objectives discussed in section III are applied to a simulation platform implemented in MATLAB/SIMULINK and the results are analyzed in section IV.

I.

INTRODUCTION

Flicker is the sensation that is experienced by human eye when subjected to changes in the illumination intensity. The maximum sensitivity to change in illumination is in the frequency range of about 5 to 15 Hz. The fluctuating illumination of lamp is caused by amplitude variation of the input voltage to the lamp. Large industrial loads such as large motor drives for driving mechanical loads and electric arc furnaces (EAF) used for melting scrap with electric energy cause voltage distortions through the introduction of harmonics and cause voltage fluctuations in the distribution systems. The voltage current characteristic of the arc is nonlinear, and is the cause of harmonic currents. These harmonic currents, when circulated in the electric network can generate harmonic voltages which in turn can affect other users. The arc furnace is a non-linear load and a large source for the flicker. To limit the effects of these disturbing loads compensation devices have to be connected at the Point of Common Coupling (PCC). Flicker mitigation devices can be connected in shunt, series or in the combined mode.

Department of Electrical Engineering, Univ. College of Engg., Osmania University, Hyderabad, A.P, INDIA.

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II.

MODELLING OF ELECTRIC ARC FURNACE

A. Arc Furnace Model The EAF has been modeled using the SimPowerSystems package of MATLAB & Simulink for the electrical system shown in Fig. 1. Existing simulation models of Electric Arc Furnace were developed using Electro Magnetic Transient Program (EMTP). This software has drawbacks of limited simulation time and difficulties in setting up control unit. The above problems are overcome by using MATLAB which permits the simulation of the arc furnace over a wider range and gives the ability to set up a control unit and accelerates the simulation process. The Arc furnace is modeled as a non-linear time varying current controlled resistance using MATLAB Embedded program function. The arc current and derivative of the arc current are taken as the input parameters to this function. The output is a nonlinear time varying resistance. This time varying nonlinear resistance function block is interlinked to the power system by a controlled current source. The controlled current is calculated or estimated from nonlinear time varying resistance and the voltage across it.
Figure 2. Electric Arc Furnace model for system study

Simulation Results In the sinusoidal dynamic arc model, sinusoidal function block and arc time varying resistance are taken as input parameters to a mathematical function. The output of this function is R1 (t). It is interlinked to the power system by using the current controlled current source block.

B.

Figure 1. Electrical System Configuration

For real time analysis of the effect of the arc furnace on the power system we require the dynamic arc furnace model. The dynamic arc characteristic is simulated by a variation of its resistance. In general the variation is of random nature. However, for the purpose of testing the algorithms that were developed, a sinusoidal variation is assumed as in (1).

Figure 3. Voltage waveform at PCC

R1 (t ) = R1 (1 + m sin ( f t ) )

(1)

Where R1 is the arc resistance m is the modulation coefficient f is the flicker frequency Here the arc resistance R1 can be expressed in the form of a current controlled non linear resistance [9] .
Figure 4. Reactive Power drawn by EAF

Department of Electrical Engineering, Univ. College of Engg., Osmania University, Hyderabad, A.P, INDIA.

16th NATIONAL POWER SYSTEMS CONFERENCE, 15th-17th DECEMBER, 2010

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Figure 5. Active Power drawn by EAF

The voltage wave at the Point of Common Coupling (PCC) is shown in Fig.4. Dynamic variation of the arc resistance causes variation in reactive power drawn from PCC as shown in Fig.5 causing distortion of the voltage wave at PCC. The active power drawn by EAF is shown in Fig.6. The PCC voltage is varying at a frequency of 5Hz and causing voltage flicker of about 9% which is not in the threshold limit of flicker as per IEEE standard [23]. Hence to improve power quality of the system, mitigation devices have to be applied. III. DSTATCOM CONTROL FOR FLICKER MITIGATION CAUSED BY EAF

Figure 6. Main Circuit of DSTATCOM with EAF load

B. Compensation strategies Control strategies are derived from instantaneous reactive power theory and synchronous reference frame theory to compensate the reactive power drawn by arc furnace load which helps in mitigation of voltage flicker. (i) Instantaneous reactive power theory (p-q theory) p-q theory transforms the three phase system of voltages and currents from phase co-ordinates to 0-- coordinates by means of Clark-Concordia transformation, which is represented by the following matrices(2) and (3).
Vo = V V
2 3

A. Description of the proposed system: The main circuit of the DSTATCOM system with time varying Arc Furnace load connected to 3-phase, 3-wire distribution system together with the measurements needed by the control system is shown in Fig.7. The inverter of DSTATCOM is s standard three phase two level inverter. The Arc Furnace is modeled as a time varying current controlled nonlinear resistance .When this circuit is in operation, the time varying load results in fluctuating load currents. Depending on the impedance of the line reactor, the PCC will see a voltage fluctuation or voltage flicker. The voltage amplitude modulating frequency is in the range of 5 to 25HZ. To compensate the fluctuating load currents and to mitigate the voltage flicker in EAF, an attempt has been made to develop the control algorithms using static orthogonal reference frame theory (p-q theory) and synchronously rotating reference frame theory (d-q theory) and a comparative evaluation is carried out when they were applied to the highly non linear arc furnace load.

1 2 1 0

1 2 1 2 3 2

1 2 1 2 3 2

V a V b V c

(2)

io i i

1 2 2 3 1 0

1 2 1 2 3 2

1 2 1 2 3 2

ia i b ic

(3)

In the case of three-phase three-wire systems Vo=0 and io=0. In the new co-ordinate system using stationary orthogonal reference frame theory, the instantaneous real and imaginary powers are expressed by the following matrix,

p V q = - V

V V

i i

(4)

Department of Electrical Engineering, Univ. College of Engg., Osmania University, Hyderabad, A.P, INDIA.

16th NATIONAL POWER SYSTEMS CONFERENCE, 15th-17th DECEMBER, 2010

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which finally allows expression of currents as a function of the power quantities

i i

V 1 = 2 2 V + V - V

V p V q

(5)

The basic block diagram of the p-q theory for flicker mitigation of EAF is shown in Fig.8.The control algorithm based on pq theory which compensates the reactive power and helps in mitigation of flicker is outlined hereunder. The three phase source voltages [Vsa, Vsb, Vsc] are transformed to stationary orthogonal reference frame variables [Vs,Vs]. Reference currents (i*,i* )are evaluated based on equation(7) by using Vs, Vs and pref and qref. The instantaneous active power (Pref) for maintaining dc link voltage constant is obtained by comparing actual dc link voltage with a preset value and by processing the error voltage through a PI controller. The instantaneous reactive power reference (qref) is set to zero. With the evaluated reference currents in orthogonal frame, the actual source currents in the same frame are compared and processed through PI controllers and reference voltages are obtained in stationary frame which are transformed to abc frame using Clarks reverse transformation for generating gate pulses for the IGBT based voltage source inverter.

If is the transformation angle, then the current transformation from abc to d-q-0 frame is defined as 2 2 cos( ) cos( + ) i id cos a 3 3 i = 2 (6) 2 2 ib q 3 sin sin( ) sin( + ) 3 3 i io c
1 2 1 2 1 2

Where

(t) = we (t )dt + o
0

(7)

The block diagram of the DSTATCOM controller for flicker mitigation based on d-q theory is shown in Fig.9. The three- phase source voltages (Vsa, Vsb and Vsc) are applied to three-phase Phase Locked Loop (PLL) to synchronize the three-phase voltages at the converter output with the zero crossings of the fundamental component of the supply phase voltages. The PLL provides the synchronous reference angle required by the abc-dq0 (and dq0-abc) transformation.

Figure 8. DSTATCOM controller with d-q theory Figure 7. DSTATCOM controller with p-q theory

ii) Synchronous reference frame theory (d-q theory) The synchronous reference theory is based on the transformation of the stationary reference frame three phase variables (a,b,c) to synchronous reference frame variables (d,q,o ) whose direct (d)and quadrature (q) axes rotate in space at the synchronous speed e. e is the angular electrical speed of the rotating magnetic field of the three phase supply, given by e=2fs, where fs is the frequency of the supply.

The three phase source currents (isa, isb, isc) and bridge inverter currents (iia, iib, iic)are converted into equivalent direct axis and quadrature axis component currents (id, iq) by using (6). In order to maintain the reactive power drawn from the source as zero, the output currents of the three phase bridge inverter are controlled in such a way that the inverter supplies the required reactive power. Thus for flicker mitigation, the source reactive power has to be zero. Therefore iq reference (iqref) is set at zero for inverter control. The reactive current supplied by the source (iq) is subtracted from the reference value (iqref=0) to obtain the error in reactive current for full compensation. This error signal is processed through a PI controller block to obtain

Department of Electrical Engineering, Univ. College of Engg., Osmania University, Hyderabad, A.P, INDIA.

16th NATIONAL POWER SYSTEMS CONFERENCE, 15th-17th DECEMBER, 2010

225

the reference voltage signal (Vqref), which is fed to the dq0abc transformation block. The reference for id (idref) comes from the DC link voltage PI controller, which maintains the DC link voltage (Vdc) at reference value (Vdcref=1000v). The active current supplied by the inverter (id) is subtracted from the reference value (idref) and this error signal is processed through a PI controller block to obtain the reference voltage signal (Vdref), which goes as another input for dq0-abc transformation. PI compensators for current and voltage loops are tuned to give the optimum performance. The output voltage signals of transformation block (dq0-abc) act as reference voltages (Viaref, Vibref and Vicref) for PWM signal generators of bridge inverter. These signals are compared with a triangular carrier wave to obtain PWM signals for bridge inverter phases. IV. SIMULATION RESULTS ASSESSMENT

(a)

The performance of the DSTATCOM, to mitigate the voltage flicker caused by Electric Arc Furnaces is studied by applying both the control algorithms. The following assessment is made based on these results.

(b)
Figure 10. p.u.RMS value of voltage at PCC with DSTATCOM (a) p-q Controller (b) d-q Controller

A. Control of DSTATCOM by p-q and d-q theories for flicker mitigation: The entire system for flicker mitigation caused by EAF using DSTATCOM is simulated using MATLAB/Simulink. Figs.10and 11 shows the PCC RMS voltage waveforms without and with DSTATCOM with (a) p-q Controller and (b) d-q Controller. Without DSTATCOM voltage flicker is about 9% (V/V). Flicker is mitigated and is 0.3% which is with in IEEE threshold limits, when DSTATCOM is connected at the PCC. The simulation parameters are given in Appendix.
(a)

Figure 9.

RMS value of voltage at PCC without DSTATCOM

(b)
Figure 11. Active and reactive components of source current in p.u. (a) p-q (b) d-q controller

Fig.12. shows the p.u. active and reactive components of source current in p.u. with both the controllers. Reference voltages are generated by the controller for Sinusoidal

Department of Electrical Engineering, Univ. College of Engg., Osmania University, Hyderabad, A.P, INDIA.

16th NATIONAL POWER SYSTEMS CONFERENCE, 15th-17th DECEMBER, 2010

226

Pulse Width Modulation (SPWM) generator. Thus by operating the current regulated SPWM Inverter as a shunt compensator reactive power drawn from the PCC can be brought to zero and thereby flicker is mitigated. V. CONCLUSION

Recommended Practices and Requirements for Harmonic Control in Electrical Power Systems,IEEE 519-1992

[10] J. G. Mayordomo, R. Asensi etl. A Frequency Domain Arc Furnace Model For Harmonic Power Flows Under Balanced Conditions Proceedings of the IEEE 7th International Conference on Harmonics and Quality of Power (ICHQP), at Las Vegas, Oct.16-18, 1996, pp. 419-27.
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In this paper, DSTATCOM controller is derived by using stationary orthogonal reference frame theory and synchronous reference theory. The model is simulated in MATLAB/SIMULINK platform and DSTATCOM controllers performance is evaluated using both p-q and dq theories for voltage flicker mitigation caused by V-I characteristic based EAF model. Both the controllers are proven to be effective for flicker mitigation with improved dynamic response of the system. Moreover the simulation time and memory requirements are improved with p-q based controller and fast response is possible with both the controllers. VI. APPENDIX

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[15] M.W. Marshall,PE, Using series capacitors to mitigate voltage flicker problems, 41st Annual Rural Electric Power Conference, pp B3-15,1997. [16] G.C.Montanari, M. Loggini, L. Pitti, E. Tironi and D. Zaninelli, The effects of series inductors for flicker reduction in electric power systems supplying arc furnaces, IEEE Industry Applications Society and Annual Meeting,pp.1496-1503,1993. [17] A. Esfandiari and M. Parniani, Electric arc furnace power quality improvement using shunt active filter and series inductor, IEEE Region 10 Conference, vol.4, pp.105-108, November 2004. [18] Han, C.; Yang, Z.; Huang, A.Q.; Ingram, M.; Modeling and control of a cascade-multilevel converter-based STATCOM for electric arc furnace flicker mitigation, Industrial Electronics Society, 2005. IECON 2005. 31st Annual Conference of IEEE 6-10 Nov. 2005 Page(s):6pp [19] C.S.Chen, H.J.Chuang, C.T.Hsu and M. Tseng, Mitigation of voltage fluctuation for an industrial customer with arc furnace,IEEE Power Engineering Society Summer Meeting, vol.3, pp.1610-1615, July 2001. [20] A. Wolf and M. Thamodharan, Reactive power reduction in threephase electric arc furnace, IEEE Trans. on Industrial Electronics, vol.47, no.4, pp.729-733, August 2000. [21] J.R. Clouston and J.H. Gurney, Field demonstration of a distribution static compensator used to mitigate voltage flicker,Power Engineering Society Winter Meeting, PP.2568-2576, 2000. [22] Colin Schauder, STATCOM for compensation of large electric arc furnace installations, IEEE Power Engineering Society Summer Meeting, vol.2, pp.1109-1112, July 1999. [23] IEEE Recommended Practices and Requirements for Harmonic Control in Electrical Power Systems,IEEE 519-1992

The various parameters of the simulation study of the system are Vsource =566 V, f = 50 Hz, Rg =0.05, ZT = 0.0003366 + Zf=0.0000528 + j 0.000468 and j0.00322 . The load model is carried out with the data Vig=350.75 V, Imax=100 kA, 1=0.01 Sec and 2=0.01 Sec. DC link voltage=1000 V, C=50000F, tie reactance=1.6H. . REFERENCES
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Department of Electrical Engineering, Univ. College of Engg., Osmania University, Hyderabad, A.P, INDIA.

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