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Intro
Welcome to your Digital Edition of
Defense Tech Briefs, R F & Microwave Technology,
and Embedded Technology
Included in This December 2011 Edition:
Defense Tech Briefs Embedded Technology R F & Microwave Technology
Volume 5 Number 6 December 2011
www.defensetechbriefs.com
INSIDE:
Inside the Navys
Quiet Water Tunnel
Test Facility
Modern Military
Energy Storage
Technology
Choosing a
Capacitor for Use
as a Switch-Mode
Power Supply Filter
Supplement to NASA Tech Briefs Supplement to NASA Tech Briefs
New Products
December 2011
25
Cover: Designers of high-altitude or
space-based digital electronics
systems targeted for hostile radiation
environments can now eliminate the
risk and costs associated with ASICs
and one-time-programmable products
by utilizing rad-hard and rad-tolerant
reprogrammable FPGAs. To learn
more, see the products section
on page 25.
Photo courtesy of Xilinx (San Jose, CA)
Event-Driven Processor Programming
Extensible Processing Platforms
Click Here
U.S. Navy electronics technicians perform
maintenance on the 43 radar aboard the
aircraft carrier USS John C. Stennis.
Modern radar often requires the use of
wideband waveforms to perform high-
resolution target imaging. Find out how
waveform generation software is being
used to support radar development
efforts in the article on page 41.
(U.S. Navy photo by Mass Communication
Specialist 3rd Class Will Tyndall)
December 2011
Click Here
Click Here

Intro
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Intro
Volume 5 Number 6 December 2011
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INSIDE:
Inside the Navys
Quiet Water Tunnel
Test Facility
Modern Military
Energy Storage
Technology
Choosing a
Capacitor for Use
as a Switch-Mode
Power Supply Filter
Supplement to NASA Tech Briefs Supplement to NASA Tech Briefs
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Intro
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Intro
2 Defense Tech Briefs, December 2011 Free Info at http://info.hotims.com/34461-778
Contents Volume 6 Number 6 December 2011
FEATURES
4 Modern Military Energy Storage Technology
10 Choosing a Capacitor for Use as a Switch-Mode
Power Supply Filter
15 Inside the Navys Quiet Water Tunnel Facility
26 Application Briefs
36 Tech Transfer Report: Lasers & Optics
17 Special Supplement: Embedded Technology
18 Event-Driven Processor Programming
22 Extensible Processing Platforms
25 New Products
TECH BRIEFS
30 Technology Focus: Materials & Coatings
30 Nonlinear Acoustic Metamaterials for Sound Attenuation
Applications
31 Tunable Infrared Material System
32 Transparent Ceramics for High-Energy Laser Systems
33 Manufacturing & Prototyping
33 Fabrication of Novel Transparent PMMA Composites for
Optical Tagging
35 Software
35 Software System for Microbial Genome Sequence Annotation
37 Special Section: RF & Microwave Technology
38 An Advanced Circuit Protection Approach for
RF Interfaces
41 Spectrally Compliant Waveforms for Wideband
Radar
43 New Products
DEPARTMENTS
44 New Products
48 Advertisers Index
ON THE COVER
The Quiet Water Tunnel Facility at the Naval
Undersea Warfare Center in Newport, RI, is a
unique test facility capable of investigating non-
acoustic pressure fluctuations and evaluating new
and existing technologies aimed at reducing flow
noise and drag due to skin friction on a vessel. To
learn more, read the feature article on page 15.
Photo courtesy of the U.S. Navy
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U.S. Navy electronics technicians perform maintenance on the 43 radar aboard the aircraft carrier USS John C. Stennis. Modern radar often requires the use of wideband waveforms to perform high- resolution target imaging. Find out how waveform generation software is being used to support radar development efforts in the article on page 41.
(U.S. Navy photo by Mass Communication Specialist 3rd Class Will Tyndall)
December 2011
New Products
December 2011
25
Cover: Designers of high-altitude or space-based digital electronics systems targeted for hostile radiation environments can now eliminate the risk and costs associated with ASICs and one-time-programmable products by utilizing rad-hard and rad-tolerant reprogrammable FPGAs. To learn more, see the products section on page 25.
Photo courtesy of Xilinx (San Jose, CA)
Event-Driven Processor Programming
Extensible Processing Platforms
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Intro
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Intro
T
he risk of human casualties associat-
ed with fuel convoys, combined with
the long-term cost issues of unreliable
technologies, has the military exploring
greener, more sustainable options with
the goal of increasing energy efficien-
cies, lowering fuel consumption, and
lessening the risk of lost lives. Advanced
battery technology continues to be vali-
dated as a viable solution to lowering fuel
demands. For example, todays advanced
energy storage systems can store energy
from portable solar arrays to power
essential electronic systems at forward
operating bases (FOBs) instead of
using a vehicles idling engine power or
diesel generators significantly reduc-
ing fuel consumption, costs, and risk.
There is a growing trend toward
rechargeable batteries in the military,
especially as they become more rugged,
safer, and have a longer operating life.
Primary battery systems will always have a
home, but rechargeables are being used
in more and more applications in tactical
operations and command posts.
Lithium-ion batteries are well suited for
these applications with superior cycle life
and with the wide operating temperature
capability required in rugged operations,
especially when there is less availability to
charging stations. Moreover, lithium-ion
batteries are more likely to be reused
after missions due to their enhanced reli-
ability. Specific goals for DOD include
Silent Watch, microgrid applications,
renewable energy applications and,
potentially, underwater vehicles. The
ultimate scenario is to provide the build-
ing-block battery module that can be
used independently or in multiples to
serve these different applications.
Optimum Performance
Until now, the military used generators
or lead-acid batteries to power their com-
munication systems. While lead-acid bat-
teries are ubiquitous due to their lower
cost, their popularity is being diminished
by lithium-ion battery chemistries for
demanding, energy-dense storage applica-
tions. Lithium-ion batteries offer many
advantages as they are much better at
moving large amounts of energy into the
battery without overheating, and they
offer much higher round-trip efficiency.
Top-off charging of the fully depleted bat-
teries by stationary chargers can be
accomplished in just two or three hours
with lithium, versus six to eight hours to
charge lead-acid batteries.
Lithium-based large-format cells on
the market today are proving themselves
in interesting pilot programs as they
offer up to 70 times the capacity of prior
generation cylindrical lithium cells and
have much lower system integration costs
when aggregated into large battery
packs. Having an order of magnitude
reduction in the number of cells also
enables a reduced number of battery
interconnections, further improving reli-
ability of the battery pack and providing
for a much higher value proposition.
Individual cell monitoring with the use
of Battery Management Systems (BMS) is
a key to success with these systems.
Energy Storage for
Military Applications
The Marine Corps and the Army have
expressed interest in using lithium iron
phosphate batteries in microgrid appli-
cations and for FOB camps. Typically in
the past, the military has used genera-
tors and/or lead-acid batteries to power
these camps, but now decision-makers
are looking to lithium as a more efficient
and lighter-weight solution. Combining
renewable energy together with lithium
batteries, and even with a generator, can
optimize the use of all three getting
the energy needed for the soldiers in the
field. The reduction of fuel consump-
tion is substantial, which is a primary
driver in cultivating these technologies.
Fewer fuel convoys means less risk and
greater savings.
Forward operating missions can gen-
erate all their power independently
off the grid with reduced use of gen-
erators. In order for the military to cut
down on the use of generators, it needs
to hybridize or supplement the genera-
tor with an energy-dense battery and a
workable solar array. Even when the gen-
erator needs to be used, at full efficien-
cy, power can be put back into the bat-
tery. Plus, the battery can be continuous-
ly charged from the solar cells. The gen-
erator wont be completely eliminated,
4 www.defensetechbriefs.com Defense Tech Briefs, December 2011
Modern Military Energy
Storage Technology
Modern Military Energy
Storage Technology
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Intro
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Intro
but it can be hybridized by using invert-
ers to charge the battery to continuously
run, creating a generator with much
greater efficiency using fuel for shorter
periods of time. Thats a huge advance-
ment, and lithium-ion batteries are a big
part of that reduction.
Weight is a key consideration in select-
ing battery technologies as well as ener-
gy density being able to provide the
most amount of energy for the least
amount of weight. Lithium-ion battery
technology fits both requirements and
can do so safely. Within the militarys
comprehensive testing requirement,
theres a significant amount of safety
testing for batteries that involves having
live ammunition fire through the bat-
tery, water submersion, and fire.
Lithium iron phosphate chemistries
have performed admirably.
Real-World Example
In recognizing the growing trend of
combining renewable sources with energy
storage for microgrids in the field, con-
tractor HDT Global (HDT) is working
with the U.S. Marine Corps to supply
energy storage systems for the Ground
Renewable Expeditionary ENergy System
(GREENS). The network is a portable
hybrid photovoltaic/battery power system
that provides renewable energy for for-
ward-deployed units that have a limited
power supply. According to the Office of
Naval Research, GREENS will reduce the
logistics burden for providing power to
remote locations. It will provide AC and
DC power needs to charge typical com-
munication, targeting, and computing
devices. GREENS will reduce the fuel use
otherwise needed for typical generators,
and will lessen the need for fuel resupply,
reducing the associated threats to vehicle
convoys in Afghanistan and Iraq.
6 Defense Tech Briefs, December 2011 Free Info at http://info.hotims.com/34461-781
Large format Li-ion prismatic battery compared to a cylindrical lithium cell.
Energy Storage
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Intro
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Intro
GREENS consists of networkable and
vastly scalable 1600 watt solar arrays and
rechargeable large-format lithium-ion
batteries that provide continuous electric-
ity for Marines in remote locations and
forward operating bases. The lithium-ion
component of GREENS enables high effi-
ciency storage of solar energy in a pack-
age substantially lighter than a lead-acid
battery solution. The lithium-ion battery
exhibits dramatically improved durability
when operating at high ambient temper-
atures which severely shorten the life-
time of typical lead-acid batteries and
allows for near 100 percent utilization of
the nameplate battery capacity.
Expanded Duties
Beyond renewable energy capture,
lithium-ion battery energy storage has
found other uses in military applica-
tions, including Silent Watch. The bat-
tery chemistry enables longer runtimes
when Humvees, Stryker tanks, and other
military vehicles conduct reconnais-
sance activities, allowing soldiers to con-
centrate on the task at hand, silently. By
running electronic surveillance and
communications equipment from lithi-
um batteries as opposed to the vehicles
battery, military forces can eliminate
heat signature and audible signature for
extended amounts of time, possibly up
to eight to ten hours. Silent Watch
requires battery systems to be rugged -
ized and able to withstand wide temper-
ature variances.
Moreover, lithium-ion batteries were
showcased this year at The Experimental
Forward Operating Base (ExFOB) event
at the Marine Corps Air Ground Combat
Center, as part of a system that provides
up to 75 percent fuel consumption
reduction for Humvees. To improve fuel
and energy efficiencies, save costs, and
simplify logistics, the vehicle power unit
which can be installed in less than 30
minutes operates automatically (no
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Looking Forward
As the military continues to pursue
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8 Defense Tech Briefs, December 2011 Free Info at http://info.hotims.com/34461-783
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Energy Storage
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Intro
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Intro
10 www.defensetechbriefs.com Defense Tech Briefs, December 2011
T
wo key functions of switch-mode
power supply (SMPS) filter caps are
input filtering and output filtering.
Input filter caps need to be able to
supply a quick burst of energy and to
suppress noise generated in the switch
circuit. Important considerations for
the input filter cap are ESR, ESL, and
ripple current. High CV density is pre-
ferred in the input filter caps to reduce
board space, although it is more critical
for the output filter caps.
Output filter caps must allow charg-
ing and discharging in concert with
the rise and fall of the ripple current
at the output. Both ESR and ESL are
important considerations for the out-
put filter capacitor. High CV density is
preferred in the output filter caps in
order to reduce board space as capaci-
tance demands of output filters are
typically high.
Electrolytic Capacitors
Historically, electrolytic capacitors
have been the most popular choice for
SMPS filters, especially input filters.
They offer very high CV density per
package size typically at comparably low
cost. The problem is that the high CV
density comes at a rather high price in
terms of technical disadvantages. There
are two popular types of electrolytic
capacitors: so-called aluminum elec-
trolytics and tantalums.
Aluminum electrolytics (AE) employ
an ultra-thin dielectric composed of alu-
minum oxide deposited on a thin,
etched aluminum foil. The etched sur-
face increases the dielectrics surface
area, increasing CV density significantly.
AE caps are often the popular choice
for use as SMPS filters due to their very
high capacitance density and relative
low cost. Offsetting these advantages are
several significant disadvantages that the
circuit designer must consider:
Due to their construction, AE caps
exhibit inherently high ESR (Equivalent
Series Resistance). As frequencies
increase, this ESR disadvantage
becomes more of a problem for circuit
designers. To make up for this high
ESR, designers will often have to parallel
many AE caps to reduce the ESR to
meet the application requirements.
This paralleling may require from 10 to
100X the theoretical cap value in order
to achieve the required ESR.
AE caps are polar devices, and failure
to maintain polarity can have cata-
strophic consequences.
High temperature usage and even
high temperature storage can cause
instability including increasing leakage
current (reduced Insulation Resis -
tance), loss of capacitance, and
reduced usable life.
AE caps have limited life due to possi-
ble evaporation of the electrolyte fluid
over time. Most manufacturers quote
lifetimes of 5000 or 10,000 hours due
to this evaporation issue.
AE caps can explode in an over-voltage
condition and may release a toxic fluid.
AE caps contain potentially toxic
ingredients that may be harmful to the
environment.
Tantalum capacitors (TA) employ an
extremely porous anode material which
offers a large dielectric surface area.
This allows for a very high CV density.
TA caps generally have more favor-
able characteristics for SMPS filtering
than AE caps, however, raw material
availability has driven up their prices
and lead-times. In addition to that,
Tantalum capacitors also have several
disadvantages that circuit designers
must consider:
TA caps are polar devices, and failure
to maintain polarity can have cata-
strophic consequences.
TA caps exhibit very high ESR, typical-
ly higher than their AE cap cousins.
The ESR significantly increases at fre-
quencies higher than 100 Hz.
TA caps typically exhibit significant
capacitance loss at higher frequencies.
TA caps degrade when exposed to mul-
tiple charge/discharge cycles.
TA caps are not typically available in
higher voltage ratings. Normally, the
maximum voltage rating that can be
achieved is 50 VDC, and many TA
manufacturers recommend that the
TA devices not be used at greater than
50% of the rated voltage, making the
effective maximum voltage 25 VDC,
even at room temperature.
TA caps are not usable at temperatures
above 125C, and their voltage ratings
typically apply at 85C. Between 85C
and 125C they must be derated.
Higher leakage currents of TA caps
make them less suitable in many
applications.
Choosing a Capacitor for Use as a
Switch-Mode Power Supply Filter
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Intro
Radar and wireless communications are
increasingly complex, demanding higher
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**Data for competitive peak power analyzer from competitor publication PN B/4500B/0311/EN updated 2011
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Intro
12 Defense Tech Briefs, December 2011 Free Info at http://info.hotims.com/34461-786
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Due to their construction, TA caps
often fail by means of a runaway
exothermic reaction which sometimes
results in fire or the release of
toxic/acidic contents onto other com-
ponents on the PC board.
Tantalum capacitors cannot handle
over-voltage spikes as well as ceramic
capacitors, so more consideration
needs to be given to inductive loads.
Tantalum capacitors contain potential-
ly toxic ingredients that may be harm-
ful to the environment.
Film Capacitors
Film capacitors (MLP) offer advan-
tages that make them a good choice for
high current applications and applica-
tions where transients are likely, such as
snubber circuits. In the case of poly -
propylene dielectric film caps, the low
dissipation factor makes them ideal for
AC applications, especially at higher fre-
quencies such as 400Hz.
MLP caps are constructed by metaliz-
ing polymer films and either winding or
stacking the film into layers. They are
available in a wide variety of dielectrics
and are uniquely able to self-heal under
certain failure conditions. Film caps also
possess inherent characteristics that may
challenge circuit designers and must be
given due consideration:
Although MLP caps offer better
ESR/ESL performance than AE or TA
caps, they typically do not match the
ESR/ESL of NP0 MLCC ceramic
designs.
Film caps are typically limited to 105C
temperature rating. 125C operation
is typically not possible. Although
some polyester dielectric film caps can
be rated at 125C, their inherent lossi-
ness limits their use in high frequency
AC applications.
MLP caps can be rated at high voltages,
but at temperatures >85C, the voltages
must be derated by as much as 50%.
When used in AC applications, corona
can cause the film to carbonize and fail
short circuit if the voltage rating is
exceeded.
Temperature rise is limited to +15C
and cannot be allowed to exceed the
maximum rated temperature of the
MLP device.
Recent trends in the availability of
films have resulted in extraordinarily
long lead-times for some MLP caps.
Some film caps contain potentially
toxic ingredients that may be harmful
to the environment.
Ceramic Capacitors
Ceramic capacitors offer properties
that work well in SMPS applications
and in some cases offer a good com-
promise between cost/availability
issues and the technical properties
required for SMPS filtering.
Single Layer Ceramic Capacitors
(SLCC), or ceramic disk capacitors, are
constructed of a ceramic slug or disk
that is metalized on the two sides. SLCC
caps are typically through hole (radial
lead) capacitors that are popular in
many legacy circuit designs. SLCC
devices offer high voltage ratings,
>10KV, and stable performance over the
entire temperature range.
Recent trends toward higher CV densi-
ty multilayer ceramic capacitor (MLCC)
Multilayer Ceramic Capacitors
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Intro
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Intro
14 www.defensetechbriefs.com Defense Tech Briefs, December 2011
designs have impacted the availability of
SLCC products, as manufacturers have
decreased capacity and announced end-
of-life for numerous part numbers. In
addition to the availability issue, SLCC
designs have the following disadvantages
that circuit designers should consider:
SLCC caps are typically only available
in radial leaded format, narrowing
board design choices.
Lead spacing and size are comparative-
ly large, especially as voltage ratings
increase.
SLCC CV density is very limited due to
the single layer design.
Multilayer Ceramic Capacitors (MLCC)
are constructed of multiple layers of thin
ceramic materials that are metalized and
alternately stacked. The device is sintered
into a monolithic block and then the
exposed electrodes are metalized, form-
ing end caps. MLCC design allows multi-
ple layers of very thin ceramic dielectric to
be connected in parallel to achieve rela-
tively high CV density. In recent years, the
high cost of precious metals utilized in the
electrode layers of previous MLCC
designs has been successfully replaced
with lower cost base metals such as copper
and nickel. This evolution has not
reached all types of MLCC design, and
some of the larger MLCC devices still uti-
lize precious metals.
MLCC devices can be manufactured
from a wide variety of dielectric ceramics
including both Class I (Ultra-stable) and
Class II (Stable) materials. The most
common ceramic dielectric for SMPS
applications is X7R, an EIA standard for
Class II dielectrics. This is because Class
II dielectrics including X7R offer a rela-
tively high dielectric constant (K) where-
as Class I dielectrics have a very low K.
With the higher K of the Class II
dielectrics, a much higher CV density
can be achieved.
MLCC devices do not have any signifi-
cant wear-out mechanism other than
their inherent predicted failure rate
(FITs). Broadly speaking, MLCC reliabil-
ity is at least 10X better than TA or AE.
MLCC designs offer extremely low
ESR. Especially at higher frequencies,
this low ESR allows the circuit design-
er to use lower capacitance values in
MLCC as compared to AE, TA, and
MLP devices. The low ESR reduces the
power loss (heating) of the capacitor
when handling high inrush current
(di/dt) to support increased power
requirements. In addition, when used
as an output filter, the lower ESR of
the MLCC device decreases output rip-
ple voltage.
MLCC designs typically are also
lower in ESL than AE, TA, and MLP,
but product format needs to be consid-
ered for ESL. Radial lead capacitors,
for instance, have higher ESL than sur-
face mount capacitors due to the
inductance added by the leads. MLCC
offers better ripple current capability
than other technologies. MLCCs are
non-polar, and their voltage rating is
good over the entire range of temper-
ature ratings. MLCCs are available in
environmentally friendly RoHS com-
pliant designs. Additionally, MLCCs
come in many physical formats, rang-
ing from surface mount chips to lead-
ed stacked capacitors.
Stacked capacitor designs of MLCC
are especially useful for SMPS filters
because these applications typically
require high capacitance or high CV
density. The stacked design allows the
capacitor manufacturer to build multi-
ple surface mount caps into stacks and
achieve up to 5X the CV product for a
given footprint. In addition, the lead
frames used in stacked capacitor designs
offer excellent protection against both
thermal and mechanical stresses that
might be introduced during soldering
or board handling after assembly. The
stacked MLCC design may reduce
microphonic noise, which typically
affects audio circuits that may exist in
surface mount circuit designs.
Some designers shy away from stacked
capacitors because of worries about
shock and vibration stresses introduced
in harsh environments. Although the
higher center of gravity and larger mass
of the stacked caps do make them more
susceptible to shock and vibration, they
have been and are being successfully uti-
lized in very harsh environments, includ-
ing aerospace, military hardware, and
down-hole drilling applications.
MLCC devices are also available in
high temperature ratings, up to 250C.
These are ideal for automotive applica-
tions, engine controllers, down-hole
drilling, and a host of other high tem-
perature applications. Most MLCC
devices are delivered as RoHS compli-
ant, but many are available with Pb sol-
ders on request.
In addition to the possible harsh envi-
ronment susceptibility concerns, MLCC
devices have some disadvantages that
circuit designers should take into con-
sideration:
The CV density of MLCCs cannot
match that of AE, TA, and some MLP
devices, but given the significantly
improved ESR and ESL of the
MLCCs, the circuit design may not
require the same amount of capaci-
tance as a similar circuit using AE, TA,
or MLP caps.
Ceramic materials utilized in the
MLCC design are weak in tension and
need to be handled carefully. In addi-
tion, the ceramic materials are poor in
thermal conductivity, so precautions
must be taken during soldering.
Larger sizes are more susceptible than
smaller surface mount devices.
Class II dielectrics used in MLCC
design are piezoelectric materials, and
MLCC devices do exhibit some piezo-
electric characteristics.
Class II devices exhibit aging and tem-
perature characteristics. Aging is a log-
arithmic decay in capacitance value
over time. Typical X7R aging runs
around 1%/decade hour for MLCCs.
Aging can be reversed by heating the
device to a temperature exceeding the
Curie point of the ceramic (typically
~120C). The temperature characteris-
tics of X7R dielectrics must be within
+15% of the room temperature cap
reading over the temperature range of
55C to 125C to comply with the EIA
standard. Different vendors X7R
materials TCCs vary, so the exact TCC
of the device being purchased should
be researched.
Class II dielectrics decrease in capaci-
tance when a DC bias voltage is
applied. The effect of DC bias on the
net capacitance is a direct function of
the chosen dielectric and the dielec-
tric thickness chosen for the design,
and worst case, can be as much as 80%
as the RV of the capacitor is app -
roached.
Class II(X7R) dielectrics exhibit a
Dissipation Factor (DF) of 1.5 to 2.5%
typically. This loss factor is fine for DC
applications but may cause heating to
occur in AC applications, especially
when frequencies exceed 60 Hz.
Summary
Each technology has its own strengths
and weaknesses for SMPS filtering.
Given the extremely low ESR and ESL of
MLCC devices, CV density may not be a
disadvantage, depending on the circuit.
With very good di/dt, lack of polarity,
high temperature performance, long
life, environmentally friendly construc-
tion, among other positive attributes,
MLCCs make good choices for SMPS fil-
tering needs.
This article was written by Daniel Jordan,
Consultant. For more information, visit
http://info.hotims.com/34461-501.
Switch-Mode Power Supply Filter
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Intro
Defense Tech Briefs, December 2011 www.defensetechbriefs.com 15
W
hen water flows over an
acoustic sensor, non-acoustic
pressure fluctuations caused
by turbulence can decrease the signal-
to-noise ratio and make it difficult to
sense incoming acoustic waves. The
Quiet Water Tunnel Facility at the Naval
Undersea Warfare Center in Newport,
RI is a unique test facility capable of
investigating these pressure fluctuations
and evaluating new and existing tech-
nologies aimed at reducing flow noise
and drag due to skin friction. These
technologies include modifications to
the surface itself, such as riblets or com-
pliant coatings, or modifications to the
flow, such as suction or injection of
water into the boundary layer.
Background
The Quiet Water Tunnel Facility was
built at the Naval Underwater Sound
Laboratory in New London, Connecticut
in 1965. When constructed, the facility
included only a circular test section for
studying fully developed turbulent pipe
flow. A rectangular test section was
added in 1974 to allow for flat plate wall
pressure measurements and the investi-
gation of compliant coatings beneath
turbulent boundary layers. The facility
was subsequently moved to the Naval
Undersea Warfare Center in Newport,
Rhode Island in 1995.
The Quiet Water Tunnel depicted in
the accompanying diagram is a recircu-
lating flow facility that contains approxi-
mately 2000 gallons (7600 liters) of fresh
water. Mass flow is controlled by a 745.7
watt induction motor that is coupled
with a centrifugal pump. Maximum mass
flow is approximately 3,300 gal/min
(210 L/s). Static pressure is kept
between 20-40 psi (140-210 kPa) during
testing to prevent pump cavitation, and
water temperature can be maintained
from 60-90 F (15.5-32 C) with a coun-
terflow heat exchanger.
As seen in the diagram, circular and
rectangular test sections are installed in
parallel and can be run independently
or concurrently with one another. The
circular test section consists of an acrylic
pipe with an inner diameter of 3.5 inch-
es (89mm) and a wall thickness of 0.5
inch (13mm). Flow enters the pipe from
a transition section which is connected
to the upper plenum chamber via a rub-
ber hose. Centerline velocities up to 80
ft/s (24.5 m/s) are possible in the circu-
lar test section, resulting in Reynolds
numbers based on pipe diameter up to
2.410
6
. The generated boundary layer
is half the pipe diameter, or approxi-
mately 1.75 inches (45mm) thick.
The rectangular test section is 83
inches (2.11 meters) long, with a con-
stant interior width of 12 inches
(305mm). In order to compensate for
the growth of the boundary layers on
the walls and to maintain a zero pres-
sure gradient flow, the interior height
increases from 4 inches (102mm) at the
inlet to 4.41 inches (112mm) at the exit.
If needed, the bottom plate of the test
section can be reconfigured to establish
an adverse or favorable pressure gradi-
ent. Free stream velocities up to 20 ft/s
(6.2 m/s) are possible in the rectangu-
lar test section. A rectangular contrac-
tion nozzle upstream of the test section
in the middle plenum chamber is used
to accelerate the flow into the test sec-
tion while minimizing free stream vor-
ticity, resulting in a turbulence intensity
of approximately 1% in the free stream.
Also, the test section has minimal span-
wise variation in the boundary layers on
the top and bottom walls. The side wall
boundary layers have minimal effect on
measurements that are taken from the
center of the channel on the top or bot-
tom walls.
Custom instrumentation can be easily
installed in each test section. Both test
sections have a modular design with eas-
ily removable and replaceable fixtures.
In the circular test section, sections of
the acrylic pipe can be removed and
replaced with instrumented sections. In
the rectangular section, six ports in the
top of the test section can be removed
and machined in order to accommodate
a variety of sensors and test fixtures,
including piezoelectric wall pressure
sensors, flush mounted hot film wall
Inside the Navys Quiet
Water Tunnel Facility
Water tunnel components and flow schematic.
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Intro
16 www.defensetechbriefs.com Defense Tech Briefs, December 2011
shear stress sensors, pitot tubes, and stat-
ic pressure taps. For example, one cur-
rent port has a pressure sensor array
consisting of 48 tightly-spaced piezoelec-
tric sensors flush mounted at the
fluid/solid interface, allowing direct
wavenumber-frequency measurements
of turbulent boundary layer wall pres-
sure fluctuations to be made.
Strengths of the
Quiet Water Tunnel
There are both advantages and com-
plications to working in water rather
than air. For undersea applications at
moderate to high Reynolds numbers,
working in water is often required. In
particular, for studies regarding turbu-
lence control and drag reduction, accu-
rate scaling of results from air to water
can be exceedingly difficult. The bound-
ary layer thickness and Reynolds num-
bers achieved in the Quiet Water Tunnel
are directly applicable to undersea appli-
cations. Use of the water tunnel can be
particularly beneficial as a lower cost
option for testing in early stages of
research, as an alternative to utilizing a
tow tank or conducting lake tests or sea
trials. Each of these options involves pro-
gressively higher cost and gives less con-
trol over the testing parameters.
However, full scale testing at sea is typi-
cally required to establish the perform-
ance of an entire system and eliminate
uncertainties related to scaling factors.
Among similar water tunnel and tow
tank facilities, the acoustic isolation of
the Quiet Water Tunnel makes it truly
unique. Acoustic noise in the test sec-
tions is minimized in several ways, the
foremost being the use of rubber hoses
to provide vibration isolation between
the major components. Also, the plenum
chambers, rectangular test section, and
circular test section are sufficiently struc-
turally rigid to minimize flow induced
vibration. Finally, the pump was specifi-
cally designed to minimize radiated
acoustic energy. The resulting acoustic
isolation allows the non-acoustic pres-
sure fluctuations at the fluid-solid inter-
face of a turbulent boundary layer to be
studied without background noise.
Applications
Studies conducted in the water tunnel
have relevance to a variety of undersea
applications. Knowledge from water tun-
nel investigations is particularly impor-
tant in optimizing the structural design
of submarines and surface ships through
drag reduction, as well as maximizing
the performance of sensors and SONAR
arrays through flow noise control.
Computational Fluid Dynamics (CFD)
projects can also benefit from imple-
menting the experimental data gath-
ered at the water tunnel.
Drag and flow noise reduction can be
accomplished through control of the
physics of the turbulent boundary layers.
Various techniques for turbulence con-
trol have been tested at the Quiet Water
Tunnel, including isotropic and non-
isotropic compliant walls, hot and cold
water injection into the boundary layer,
riblet coatings, large eddy break-up
devices, and thin urethane coatings.
These and other efforts have also led to
the development of unique instrumenta-
tion and experimental techniques.
Summary
The Quiet Water Tunnel Facility at
the Naval Undersea Warfare Center in
Newport, RI is specifically designed to
measure the mean and fluctuating wall
pressure and shear forces exerted by a
turbulent boundary layer. Both the cir-
cular and rectangular test sections can
be used to achieve a wide range of
moderate to high Reynolds number
flows. The test sections are well acousti-
cally isolated at frequencies above
those of the structural noise generated
by the centrifugal pump. The Quiet
Water Tunnel is a unique facility ideal-
ly suited for studying boundary layer
control for drag and flow noise reduc-
tion, and is a valuable asset for basic
and applied research.
This article was written by Jillian Kiser,
William Keith, and Alia Foley; Devices,
Sensors, and Materials R&D Branch, Naval
Undersea Warfare Center (Newport, RI). For
more information, visit http://info.hotims.
com/34461-502.
Side view of the rectangular test section. Water flow direction would be from right
to left.
Rectangular test section, as seen from above. Water
flow direction would be from top to bottom.
Quiet Water Tunnel Facility
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Intro
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Event-Driven Processor Programming
Extensible Processing Platforms
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Intro
18 www.embeddedtechmag.com Embedded Technology, December 2011
A
lmost since computers were
invented, interrupts have been a
common programming method
to deal with real-time tasks. An interrupt
causes a processor to stop the running
task, and to execute an interrupt han-
dler instead. The interrupt handler
determines the cause of the interrupt,
responds to the interrupt, whereupon
control is restored to the original task. A
simple example is an interrupt from a
UART (a serial port) stating that a char-
acter has been received, and the inter-
rupt handler will take the character
from the UART and store it in a queue
in memory for use by the main task.
Programming with interrupts can be
complex and challenging, so in this article
we outline a programming method called
event-driven programming that offers
most of the functionality of interrupts,
while being easier to reason about.
Interrupts
To show why interrupts are a chal-
lenge, consider an Ethernet time-server.
This is a device connected to a high pre-
cision clock that supplies a global refer-
ence clock using an Ethernet protocol.
At the core, this device has four tasks,
serviced by three interrupts (Figure 1):
The background task responds to a
time request that comes in over
Ethernet. It will, for example, provide
and implement a protocol that esti-
mates the latency between Ethernet
transmitter and receiver.
On a clock interrupt: when a new clock
reading is available, the clock value is
incremented by one. Assuming we
have a 64-bit clock value, this may
involve multiple operations to imple-
ment the long addition.
On an EthernetTX interrupt: check if
there is another packet to be sent, and
if so, provide it.
On an EthernetRX interrupt: queue
and timestamp the packet.
We can see here that interrupts serve
two fundamental purposes to the system
programmer: they offer a method to
react to external stimuli (Ethernet,
clock), and a method to implement
semi-concurrent execution of code
(between a background task and the
other three tasks).
Programming this system is complex.
Consider the clock interrupt, which
performs an operation along the fol-
lowing lines (assuming a 32-bit archi-
tecture where LSW is the least signifi-
cant word and MSW is the most signifi-
cant word):
clock.LSW = clock.LSW + 1;
if (clock.LSW == 0)
clock.MSW = clock.MSW + 1;
The background task may observe a
time-stamp at any time by reading the
value from clock.LSW and clock.MSW.
There are two considerations when
implementing this:
If the clock interrupt happens just
between the background task reading
the LSW and the MSW, the back-
ground task may get an inconsistent
view of the time (off by 4 billion ticks).
The chances of this happening are
slim (1 in 4 billion), which means that
this problem is very unlikely to show
up during testing. This problem can
be solved by protecting the read oper-
ation, for example, by disabling
around the read.
Since the interrupt may happen at any
time, the interrupt routine can make
little or no assumptions about the state
of the registers. It therefore must save
all registers that are used in the inter-
rupt routine, and restore all registers
afterwards. In addition, it must load
any values it needs.
These problems are exacerbated by
considering other interrupts. For exam-
ple, the EthernetRX interrupt will also
take a timestamp, and both Ethernet
interrupts interact with the background
task by means of lists of packets that have
to be kept consistent (Figure 2).
A final problem that must be consid-
ered is that interrupts may arrive simul-
taneously, and the designer has to find a
means to express what happens when an
interrupt arrives while another interrupt
is being serviced.
Events
The basic difference between events
and interrupts is that an event can only
be taken in a dedicated place in the
code. The programmer chooses one or
Event-Driven Processor
Programming
Figure 1. Example task structure. The background task is green, the interrupt handlers are red, and
arrows show interaction.
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Intro
more places in the task, and declares
that those places in the program are
appropriate to dispatch an event from.
Dispatching an event means that,
depending on the source (and maybe
type) of an event, a piece of code is exe-
cuted, and on completion it is the pro-
grammers choice as to what happens
next. In many cases the programmer
may decide to dispatch another event.
Typically, when no events are avail-
able, the task will pause until an event
becomes available. If programmers do
not want a task to wait forever, they can
ask for an event to execute code associ-
ated with a time-out after a set amount
of time (say one second or 20 microsec-
onds).
Using a specific place in the code ded-
icated to taking an event has a multitude
of advantages:
First, the code can be designed so that
the program is in a known and consis-
tent state. That is, it is not in the mid-
dle of updating a complex data struc-
ture (that could otherwise be modified
by the event handler).
Second, because the program is in a
known state, any registers that need
saving can be saved before the event is
taken, reducing the latency of taking
the event compared to an interrupt.
Even more important, registers can be
allocated across the background task
and the event handlers, enabling more
efficient use of registers and fewer
accesses to memory.
Third, an event can never slow down
the program in unexpected places. An
event executes from dedicated places
only, and hence the time taken to han-
dle an event is spent in a-priori known
places, rather than anywhere in the
code. This means that estimating
worst-case execution time becomes
easier and tighter.
The consequences of the first and
third point are a direct advantage to the
system designer; using events rather
than interrupts removes the need for
complex reasoning, and replaces it with
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Figure 3. Simple event time-line in a single-threaded environment.
Figure 2. Interrupts randomly delay the background task, and require time to save and restore registers.
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Intro
20 www.embeddedtechmag.com Embedded Technology, December 2011
pretty straightforward reasoning. This
increases productivity, decreases test-
time, and increases the chances of a pro-
gram that works in all corner cases. The
second point is not a direct advantage to
the programmer, but it increases the
scope of the underlying system. It can
potentially react faster to external
events, and make more efficient use of
registers resulting in shorter and faster
binaries, meaning that more tasks can
be slotted into a single device.
Programming with events is not
magic. The programmer still has to con-
sider what should happen when events
arrive simultaneously. Compared to
interrupts, however, the answer is easier
to formulate since events are taken at
known places.
Programming With Events
To fully appreciate how event-driven
programming works, we show code in
both a high-level language (XC, in this
section), and in assembly language (in
the next section).
The XC syntax for the Ethernet time
server is shown below:
while(1)
select {
case clockInput :> tick:
clock.LSW = clock.LSW + 1;
if (clock.LSW == 0)
clock.MSW = clock.MSW + 1;
break;
case ethernetRX :> newPacket:
processPacket(newPacket,
clock.LSW, clock.MSW);
break;
case ethernetTX :> packetDone:
if (!txQueueEmpty) {
ethernetTX <:
getPacketFromTxQueue();
} else {
ethernetTXReady = 1;
}
break;
}
}
The select statement indicates that
the program will wait for an event from
one or more sources. Each case
describes a possible source of an event
(in this example there are three possi-
ble sources: clockInput, EthernetRX,
and EthernetTX), and each case has a
body of code that is executed if the
event arrives and is dispatched. The first
case states that when data is available on
clockInput, the code that increments
the LSW and MSW of the clock should
be executed. The code for the second
case states that when a packet has
arrived over Ethernet, we wish to
process this packet (possibly placing
packets in the output-queue). The third
case takes an event if a packet has just
been transmitted over Ethernet, in
which case the next packet is taken from
the queue and transmitted.
The select statement is enclosed in a
while(1) statement, which means that
after the first event is dispatched, the
program will wait for the second event,
and so on, forever.
We can now analyze the behavior of
this code. Events are taken only at the
select, and hence the code inside each
case statement is safe in the sense that
the code cannot be interrupted. For
example, if, just after an EthernetRX
event, a clockInput event comes in, the
code for the Ethernet packet will first be
completed, and then the clock input will
be dealt with (This may not be desirable
we will get back to this.). If the events
arrived in a different order, then the
clock input would be processed first,
and then the Ethernet packet is served
(with a clock value that is one higher).
Since a case is always completely execut-
ed, there is no concern that code may be
interrupted halfway.
We can calculate the worst-case execu-
tion time (WCET) for each case, and use
the worst-case timings to analyze
whether the program can keep up with
the data, and whether any events can
ever be missed. For example, the time to
deal with the three cases may be 1, 20,
and 3 microseconds.
First, the programmer can, from
these numbers, derive that if all three
events come in (almost) simultaneously,
then the last event will be completed
after 24 microseconds; this number can
be verified against the system require-
ments to work out whether 24 microsec-
onds is acceptable. It would be difficult
to establish this number in an interrupt-
driven environment.
Second, the programmer can estimate
the throughput of the system. Given the
timings of the three cases, the system
can deal with at most 1,000,000 clock
inputs per second, at most 50,000
EthernetRX requests per second, and at
most 333,333 EthernetTX packets per
second; or a combination of those num-
bers. Again, these numbers can be
checked against the requirements.
The numbers highlight potential
problems. For example, the solution in
Figure 3 works fine if the clock is a low
frequency clock, say, 32 KHz. At 32 KHz
the program can guarantee to pick up
all the clock events, even if three events
happen simultaneously. However, if the
clock rate is, say, 100 KHz, then two or
more clock pulses may arrive while the
program deals with a single EthernetRX
event. In this case, the program will not
meet its requirements.
The way around this is to modify the
program so that it operates on the
received packets in a separate, concur-
rent task. There are two methods to
achieve this. One is to still receive the
packets in the same select statement,
and pass the processing of the packet to
a separate task; the other method is to
receive the packet in a separate task but
then to communicate the timestamp
between the threads. The two execution
traces are shown in Figure 4. Note that
rather than using an interrupt to imple-
ment pseudo-concurrency, a multi-core
or multi-threaded processor can be used
to get true concurrency.
It is worth noting that when threads
are waiting for an event, for example the
next clock input or EthernetRX event,
they are idle and do not do anything.
This is not really a waste of resources.
There must be enough slack in the sys-
tem to cope with the worst case, which
Figure 4: Multi-threaded events take a predictable amount of time.
Processor Programming
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Intro
means that in a typical case the thread
will have to be idle and wait. Indeed, sep-
arate threads can be used to improve
latency further, for example by dedicat-
ing a thread to a single event source,
which may be appropriate where an
extremely low-latency response is
required. This enables hardware inter-
faces to be implemented in software, as
response times are reduced to a few
instruction cycles.
Extra threads can also be used for a
different purpose, specifically to in -
crease throughput. Figure 4 shows a sep-
arate thread to implement the receiver
processing, but it is still limited to the
same throughput. A third thread could
be deployed, enabling software to serve
two requests simultaneously and increas-
ing the bandwidth of the system.
Assembly Level Events
To show the workings of events, it is
useful to look at how they can be
described at assembly level. Like inter-
rupts, each event source has an associat-
ed vector at which the code is stored to
handle the event. To create an efficient
event-driven instruction set, three basic
instructions are required: enable specific
event sources, wait for any enabled event,
and disable one or all event sources. An
example sequence that handles the three
event sources above is shown below:
SETV ethRX, ethRX_vector
SETV ethTX, ethTX_vector
SETV clock, clock_vector
EEU ethRX
EEU ethTX
EEU clock
WAITEU
clock_vector:
...
WAITEU
ethRX_vector:
...
WAITEU
ethTX_vector:
...
WAITEU
The first three instructions set up the
event vectors this needs to be done
only once. The second three instructions
enable all three event sources. After that,
the WAITEU instruction waits for an
event, and on arrival, dispatches the event
by jumping to one of the three vectors.
Each event handler ends with a WAITEU
instruction, which will dispatch the next
event (jumping to the next handler).
Because there is a known control-flow
that passes from the while to the select
to any of the case statements, the com-
piler can perform full register allocation
across all cases, making best use of the
available registers and avoiding the need
for pushing and popping registers on
the stack. If interrupt routines are to be
written with the same efficiency, it is
manual work since only humans know
where interrupts are taken.
On inspecting the assembly code, the
final advantage of event-driven program-
ming becomes apparent. Event-driven
programming provides a clean mecha-
nism to stop the core when idle: any
time that a WAITEU instruction has no
events, this thread will not activate until
an event arrives. When all threads are
waiting in a WAITEU, the processor can
enter a sleep mode until an external
event becomes available. This gives a
clean architectural interface to different
levels of sleep mode.
This article was written by Henk Muller,
Principal Technologist, XMOS (Bristol, UK).
For more information, contact Mr. Muller at
henk@xmos.com, or visit http://info.
hotims.com/34461-400.
Embedded Technology, December 2011 21 Free Info at http://info.hotims.com/34461-801
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Intro
22 www.embeddedtechmag.com Embedded Technology, December 2011
C
reating a new field programma-
ble gate array is no small feat.
FPGA vendors spend tens-of-
thousands of man-hours simply
researching markets to deter-
mine the feature set a given
device will require and the silicon
process that they will use to manufac-
ture the device. This starts years
before they embark on the ever more
difficult task of actually designing the
IC and the software to allow users to
program it.
While creating a next-generation
FPGA is difficult, creating a device that
combines a microprocessor and pro-
grammable logic on the same device is
even more daunting. Vendors not only
have to figure out the most efficient way
to integrate programmable logic with a
microprocessor in a tiny square of sili-
con, they must also create an infrastruc-
ture that allows users to quickly and eas-
ily program both the programmable
logic and on-chip microprocessor por-
tions of the device. For silicon vendors,
the Holy Grail is to create a device that
appeals not only to traditional FPGA
users but to embedded system archi-
tects and software programmers as well.
A new class of device called an
Extensible Processing Platform (EPP) is
making great strides on this journey.
Hard IP and Soft IP
Implementing microprocessors on
FPGAs isnt new. In fact, for almost two
decades now FPGA vendors have
offered soft cores (silicon intellectual
property, commonly called IP) that
users can program (with logic synthesis
and place and route tools) into the pro-
grammable logic in FPGAs. About a
decade ago, FPGA vendors took that a
step further and designed microproces-
sor hard cores PowerPC, ARM, and
MIPs processors into the silicon
alongside traditional programmable
logic blocks. Both soft IP and hard IP
approaches have their advantages and
disadvantages.
Implementing soft IP into an FPGA
offers maximum flexibility at the
expense of performance, power con-
sumption, and area utilization. Users
can determine what processor function-
ality they need for their specific design
and synthesize a single processor core,
or multiple processor cores 8-bit, 16-
bit or 32-bit MCU, MPU, or DSP into
the programmable logic in their designs.
This, however, means they have to give
up programmable logic element real-
estate and design around the core they
implement in their design. And in
designing around the soft MPU, they
must also be very mindful of timing con-
straints and power budgets, which can
change depending on what applications
are ultimately run on the microproces-
sor a task which, unfortunately, typi-
cally comes after the hardware has been
designed.
A hard IP-based device has several
advantages over a soft IP approach.
These hard IP implementations tend to
raise both the performance of the
microprocessor and the entire chips
functionality significantly (over soft
implementations) while lowering the
devices overall power consumption.
Because FPGA vendors implement the
core directly into the silicon (instead of
programmable logic), it leaves more real
estate on the chip for programmable
logic and additional integrated function-
ality. While the hard IP implementations
are significantly faster than soft IP imple-
mentations, earlier generations of these
devices didnt have the most elegant
interconnections be tween the processor
core, the programmable logic blocks,
onboard memory, and (if any) onboard
Extensible
Processing
Platforms
Giving
Designers the
Best of Both
Worlds
Extensible
Processing
Platforms
Giving
Designers the
Best of Both
Worlds
Xilinx developed this Zynq-7000 emulation system to allow customers to start developing software prior
to production boards hitting the market. The emulation system uses multiple FPGAs to simulate all of the
functionality i.e. ARM core, programmable logic blocks, and associated peripherals of an EPP.
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Intro
Embedded Technology, December 2011 www.embeddedtechmag.com 23
peripherals. This meant they were
faster than soft implementations but
werent as fast as they could have
been. Of course the most significant
downside of the hard IP architecture
is lack of flexibility. Users are pretty
much limited to the microprocessor
and peripherals the vendor chooses
to implement in their device. If addi-
tional peripherals are needed, users
have to add soft IP versions of those
peripherals to the programmable
logic on the device or add other chips
on the PCB.
One of the biggest challenges of
both of these implementations is of
course that users had to be fairly well
versed in hardware design languages
(HDLs) such as Verilog or VHDL, as
well as hardware design techniques,
especially tim ing/clocking, to pro-
gram the programmable logic por-
tion of these devices. The last genera-
tion of these devices wouldnt even
allow users to access the MPU core
until the programmable logic had
been programmed to a significant
extent. This practically eliminated
any potential for using the device to
do hardware and software co-design
and prototyping.
The EPP Era
Having learned lessons from offer-
ing both soft and hard implementa-
tions over the last two decades, chip
companies, mainly FPGA vendors,
are starting to offer a new class of
device called Extensible Processing
Platforms (EPPs).
EPPs are not FPGAs with a hard
or soft core implemented on them
(Figure 1). While EPPs do have
processors and FPGA logic on the
same device, a number of things dif-
ferentiate them from FPGAs. Most
significant is the fact that the MPU
cores in the EPP run the show. That
is, the microprocessor boots first
and then depending on how the
user programmed the device ini-
tializes the programmable logic.
This processor-first architecture is a
significant differentiator in that it
allows system designers to program
their systems into the processor and
then decide what functions they can
speed up by implementing them in
the programmable logic portion of
the device. The processor-first EPP pro-
gramming model also appeals to a
wider audience and allows users more
attuned to programming software to
use the devices.
Because EPP vendors implement their
devices in the latest process geometries,
it means they can also implement larger
memory blocks and a broader range of
hard IP peripherals directly into the sili-
con to complement the microprocessor
core and service a wider range of applica-
tion spaces. This alleviates even more of
the hardware design burden from users,
and, because the functionality is all on
Figure 1. Unlike previous chips that combine MPUs in an FPGA fabric, Xilinxs new Zynq-7000 Extensible Processing
Platform device family lets the ARM processor, rather than the programmable logic, run the show.
Figure 2. The Zynq-7000 Extensible Processing Platform relies on a familiar tool flow for system architects,
software developers, and hardware designers.
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Intro
the same piece of silicon, improves system performance and
lowers power consumption.
EPPs also have faster and more elegant on-chip intercon-
nects, speeding communications between MPU cores, pro-
grammable logic, memory, and peripherals. EPP vendors are
also including programmable point-to-point interconnect,
such as ARM AXI4, in these devices to further speed perform-
ance between various blocks on a device, from MPU to periph-
erals and peripheral to peripheral. This greater amount of
interconnect and programmable interconnect adds greater
degrees of flexibility into these devices and allows users to
essentially deactivate unneeded peripheral functions depend-
ing on their design needs.
Because EPP vendors are emphasizing system functionality
rather than just hardware functionality, EPP vendors are ensur-
ing the devices support commonly used software flows such as
compilers, debuggers, OSs, etc., as well as traditional FPGA
programming flows (Figure 2). While programming the logic
blocks of EPPs still requires some hardware design knowledge
today, vendors are hard at work creating flows that will lessen
these hardware programming challenges and appeal to a rap-
idly expanding user base.
Where FPGA vendors have had relatively great success in
helping users implement processors into programmable logic,
EPPs will certainly take this marriage of processing and pro-
grammable logic to a new level. Indeed, as companies start
rolling out EPPs and maturing the use model and tool flows, it
will be interesting to see what amazing innovations a much
broader user base will be able to do with these devices.
This article was written by Larry Getman, Vice President,
Processing Platforms, Xilinx Inc. (San Jose, CA). For more informa-
tion, contact Mr. Getman at larryg@xilinx.com, or visit
http://info.hotims.com/34461-401.
24 www.embeddedtechmag.com Embedded Technology, December 2011
NEW TECH TALKS
Quick technology overviews
for the busy engineer
Overcoming the Barriers Imposed
by Geometry: Improving the
CAD/CAM Iterative Cycle
Ken Versprille, PhD,
Senior Consultant, CIMdata
CAE analysts often face the burden of poor
quality and over-detailed geometric models in preparing finite element
meshing for analysis. However, end users of SpaceClaim Engineer testify
that the application is making a valued impact to alleviate these barriers. To
surmount those problems, a solution must be able to import an extensive
range of CAD model formats and also support an intuitive user interface that
is easy to learn for non-CAD experts.
Spring-Loaded Pins & Connectors
Jim Peluso, Senior Regional Sales
Manager, Mill-Max Mfg. Corp.
Electronic interconnect challenges are
increasing every day. In an ever-expanding
number of industries, spring pin connectors
are being recognized as a perfect solution
across a wide range of applications. This Tech Talk explains the technology
and its many benefits, and presents several examples of both standard and
application-specific spring pin connectors.
View online: www.techbriefs.com/webcasts
Extensible Processing Platforms
E
ach of the Zynq-7000 familys four devices has the
exact same ARM processing system, but the program-
mable logic resources vary for scalability and fit differ-
ent applications.
The Cortex-A9 Multi-Processor core (MPCore) consists of
two CPUs each a Cortex A9 processor with dedicated
NEON coprocessor (a media and signal-processing archi-
tecture that adds instructions targeted at audio, video, 3-D
graphics, image and speech processing), and a double-pre-
cision floating-point unit. The Cortex-A9 processor is a high-
performance, low-power, ARM macrocell with a Level 1
cache subsystem that provides full virtual memory capabili-
ties. The processor implements the ARMv7
TM
architecture
and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb
instructions, and 8-bit Java byte codes in Jazelle state. In
addition, the processing system includes a snoop control
unit, a Level 2 cache controller, on-chip SRAM, timers and
counters, DMA, system control registers, device configura-
tion, and an ARM CoreSight system. For debug, it contains
an embedded trace buffer (ETB), instrumentation trace
macrocell (ITM) and cross-trigger module (CTI) from ARM,
along with AXI monitor (AXIM) and fabric trace (FTM) mod-
ules from Xilinx.
The two larger devices, the Zynq-7030 and Zynq-7040,
include high-speed, low-power serial connectivity with built-
in multigigabit transceivers operating at up to 10.3125
Gbits/second. These devices offer approximately 1.9 million
and 3.5 million equivalent ASIC gates (125K and 235K
logic cells) respectively, along with DSP resources that deliv-
er 480 GMACs and 912 GMACs respectively of peak per-
formance. The two smaller devices, the Zynq-7010 and
Zynq-7020, provide roughly 430,000 and 1.3 million
ASIC-gate equivalents (30K and 85K logic cells) respective-
ly, with 58 GMACs and 158 GMACs of peak DSP perform-
ance.
Each device contains a general-purpose analog-to-digital
converter (XADC) interface, which features two 12-bit, 1-
Msps ADCs, on-chip sensors, and external analog input
channels. The XADC offers enhanced functionality over the
system monitor found in previous generations of Virtex
FPGAs. The two 12-bit ADCs support up to 1 million sam-
ples per second and can sample up to 17 external-input
analog channels. The ADCs support a diverse range of
applications that need to process analog signals with band-
widths of less than 500 kHz.
The Zynq-7000 EPPs
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Intro
The Moxtek ProFlux polarizers (PPL Series) and beamsplitters
(PBS Series), are based on aluminum wire-grids on a glass
substrate using nano-scale patterning technology. Volume
manufacturing capability and an extensive patent portfolio make
Moxtek your best source for nano-wire applications.
The ProFlux family of wire-grid polarizers includes products for
the ultraviolet, visible, and infrared. Performance options include
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www.moxtek.com
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Leading Innovation in Optical Polarizers
More than the eye can see.
Embedded Technology, December 2011 25 Free Info at http://info.hotims.com/34461-803
Graphics Processor
T
he rad-hard and rad-tolerant
reprogrammable Virtex

-
5QV FPGA from Xilinx (San
Jose, CA) supports specified Total
Ionizing Dose (TID) and character-
ized Single-Event Effects (SEE). The
space-grade field programmable
gate arrays are also optimized with
embedded MPUs, embedded DSP
elements, built-in Ethernet MAC blocks, and high-speed serial connectivity.
Built on 65nm copper process technology, the Virtex-5QV Space Grade
FPGA provides hardness to Single-Event-Upset (SEU), immunity to
Single-Event Latchup (SEL), and data path protection from Single-Event
Transients (SET). The Virtex-5QV FPGA contains hard-IP system level
blocks, including 36-Kbit block RAM/FIFOs, second generation 25 18
DSP slices, SelectIO technology with built-in digitally controlled imped-
ance, power-optimized high-speed serial transceiver blocks for enhanced
serial connectivity, PCI Express

-compliant integrated Endpoint blocks,


and Tri-mode Ethernet MACs (Media Access Controllers).
Each configuration logic block (CLB) in the device contains eight user
registers. Registers are implemented with rad-hard, dual-node latches in
a target-initiator configuration. The Virtex-5QV FPGA input/output
blocks (IOBs) have rad-hard dual-node latch registers in all ISERDES,
OSERDES, ILOGIC, and OLOGIC blocks.
For Free Info Visit http://info.hotims.com/34461-405
PRODUCT BRIEFS
Rad-Hard FPGAs
A
MD (Sunnyvale, CA) has introduced the AMD
Radeon E6460 discrete graphics processor.
With support for up to four simultaneous dis-
plays, the E6460 GPU enables an immersive experi-
ence with desktop-level 3D graphics and multimedia
features. A 3D graphics engine and programmable
shader architecture support Microsoft DirectX

11
tech nology for graphics ren-
dering. The unified
video decoder also
provides dual HD de -
code of H.264, VC-1,
MPEG4, and MPEG2
compressed video
streams.
A 512MB GDDR5
frame buffer included
in the BGA package
supplies high mem ory
bandwidth. Featuring multi-display with AMD
Eyefinity technology, the AMD Radeon E6460 GPU
supports HDMI 1.4 stereoscopic video and
DisplayPort 1.2 for higher link speeds and simplified
display connectivity.
For Free Info Visit http://info.hotims.com/34461-409
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Intro
26 www.defensetechbriefs.com Defense Tech Briefs, December 2011
APPLICATION BRIEFS
Corrosion Control
EonCoat
Wilson, NC
252-360-3110
www.eoncoat.com
Chemically Bonded Phosphate
Ceramics Stop Corrosion
Corrosion of steel, aluminum, and other structural metals
erodes the safety and financial stability of industries and coun-
tries alike. Fighting corrosion in ships, tanks, planes, and
equipment costs the Pentagon $22.9 billion a year. Corrosion
costs advanced industrialized nations about 3.5% of GDP to
replace damaged material and components, plus a similar
amount due to lost production, environmental impact, disrupt-
ed transportation, injuries, and fatalities.
For generations, polymer paints have acted as a physical bar-
rier to keep corrosion promoters such as salt water and oxygen
away from steel and aluminum substrates. This works until the
paint is scratched, chipped, or breached, and corrosion pro-
moters enter the gap between the substrate and polymer coat-
ing. Then the coating can act like a greenhousetrapping
water, oxygen and other corrosion promotersallowing corro-
sion to spread.
Placing sacrificial, reactive elements next to steel that will
corrode first, such as zinc and galvanized coatings, is another
strategy. This works until the sacrificial elements are used up
and recoating must be done, usually after a few years.
Cathodic protection, where a negative voltage is imposed
on steel, can limit corrosion on pipelines or other stationary,
continuous metal structures where voltage can be attached.
But this can fail if its not properly insulated and voltage goes
to ground.
For assets that demand long-term corrosion protection, stain-
less steel alloys work. But with stainless steel costing up to six
times more than mild steel, this option is often cost prohibitive.
Ideally, engineers, facility managers, and industrial paint
contractors would want the long-term corrosion-resistance of a
stainless steel part with the lower cost of coating application. A
new category of Chemically Bonded Phosphate Ceramics
(CBPCs) is now basically making this possible. Unlike polymer
paints that simply cover a substrate, CBPCs essentially alloy
the surface.
Dr. Arun Wagh, a former materials engineer at Argonne
National Lab, explains it like this. When a dual-component
spray gun mixes an acid phosphate with base minerals and
metal oxides in a water slurry, a chemical reaction occurs on
the surface of the steel substrate, says Wagh. A hand-held
thermometer indicates a 10-12 F temperature rise, as iron
becomes a corrosion-resistant passivation layer of iron oxy
hydroxide. Because the passivation layer is electrochemically
stable, like gold and platinum, it does not react with corrosion
promoters such as water and oxygen.
Scanning electron microscopy indicates this passivation layer
is about 20 microns thick. X-ray diffraction indicates this pas-
sivation layer is about 60% iron with components of phos-
phate, magnesium, silicon, hydrogen, and oxygen.
History suggests that the new CBPCs passivation layer may
resist corrosion indefinitely, as demonstrated by the Iron Pillar
of Delhi, says Wagh. The Iron Pillar, a 7-meter high, 6-ton
Indian artifact that has resisted corrosion for 1600 years with its
original inscriptions still legible, has a virtually identical passi-
vation layer to that of the new CBPC.
In contrast to typical paint polymer coatings that sit on top of
the substrate, the new ceramic coating bonds through a chemi-
cal reaction with the substrate, so slight surface oxidation actu-
ally improves the reaction. This makes it virtually impossible for
corrosion promoters like oxygen and humidity to get behind
the coating the way they can with ordinary paints.
The corrosion-resistant passivation layer is further protect-
ed by a true ceramic outer shell. This dense ceramic outer
shell is impermeable to water, and resists impact, abrasion,
chemicals, and fire. The ceramic outer shell forms simulta-
neously with the passivation layer and chemically bonds with
it, after acid and base materials mix in the spray gun nozzle
then react with the substrate surface. The dual-layer ceram-
ic coating can be used both as a primer and a topcoat, and
can be applied in a single pass thats dry to the touch in a
minute, hard dry in 15 minutes, and can be returned to serv-
ice in an hour.
Though CBPCs such as these have proven themselves in the
laboratory and in examples such as the Iron Pillar, Tony Collins
knew that the effectiveness of the new material had to be com-
pared to that of traditional anti-corrosion coatings.
Duplicating a NASA corrosion test, these new CBPCs have
been put to the test against 19 leading anti-corrosion coatings
in a live corrosion test, viewable to the public by webcam.
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Intro
Rakon is a global leader in the supply and
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0% 0% 0% 0% 0% 0% 0% 0% %%%%%%%%%% 0 22222222222222222222&&&&&&&&&&//2 2222222222222--------! -! -! -! ---! - .# #%
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Defense Tech Briefs, December 2011 27 Free Info at http://info.hotims.com/34461-791
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computing performance.
The system can be tailored for specific configurations.
Coated samples were scribed, then exposed to 12 hours of sea
spray, followed by 12 hours of sunlight (or the UV light equiv-
alent). After 45 days, every other high-performance coating
tested failed. Except for the rust on its scribe (gouge) line, the
EonCoat sample looked the same as day one.
To monitor another ongoing corrosion test modeled on
NASAs sea spray test, the public can view, zoom, and control a
live webcam at www.eoncoat.com. In the latest test, which has
passed 120 days and includes brand names matched to num-
bers, 20 Q panels coated with a popular primer, topcoat, or the
new CBPC are sprayed daily with corrosive seawater.
Theres nothing like seeing results with your own eyes. The
product has gone more than 10,000 hours with no corrosion in
a salt spray ASTM B117 test, but it is believed that engineers,
facility managers, and industrial contractors will see value in
comparing its effectiveness with leading brands. New CBPCs are
a new approach to corrosion protection that should be looked
into as aging plants, equipment, and infrastructure need to be
safely maintained as long as possible.
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Lithium Metal Oxide Batteries
Tadiran Batteries
New Hyde Park, NY
1-800-537-1368
www.tadiranbat.com
New Energy Source Powers Single-Use
Mil/Aero Equipment
Until recently, single-use high energy devices were typically
powered by reserve/thermal batteries using decades-old tech-
nology. Recognizing that battery performance limitations
could hinder new product development, the U.S. DoD identi-
fied a critical need for a new generation of high-power, long
life batteries.
In response to this challenge, high energy lithium metal
oxide batteries have been developed that outperform legacy
batteries on many fronts: extended shelf life, system readiness
testing, instantaneous activation, and cost. These batteries
compete directly with reserve/thermal batteries and spin-acti-
vated batteries, and less frequently with silver zinc, LiSO
2
, and
rechargeable batteries.
Reserve/thermal batteries encompass a broad range of
chemistries, including lead-acid, silver-zinc, and lithium
thionyl chloride. The most popular version is the thermal bat-
tery, which utilizes a metallic salt electrolyte that is solid, inert,
and non-conducting at ambient temperatures. A squib is used
to deliver a pyrotechnic charge, causing the electrolyte to
become molten at 400C to 700C, delivering continuous
power ranging from a few watts to several kilowatts depending
upon battery size and chemistry.
The advantages of reserve/thermal batteries include rugged-
ness, safety, and long shelf life, but these cells also have limita-
tions. System readiness cannot be tested without fully deplet-
ing the cell. Battery activation is also delayed until the chemi-
cal reaction occurs. Layers of bulky insulation are required for
heat retention so the electrolyte can remain molten, and to
protect surrounding components from heat-related damage.
Spin-activated batteries store electrolyte inside an ampoule
or bladder, which is cut open when a projectile is fired, with
the spinning action distributing the electrolyte throughout the
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Intro
cell stack. Spin-activated batteries made
with lithium thionyl chloride chemistry
are powering minelets and communica-
tion jammers that are launched into the
battlefield by artillery shells that are
equipped with parachutes to ensure a
soft landing.
Lithium metal oxide batteries, devel-
oped by Tadiran as the TLM Series, are
constructed with a carbon-based anode,
multi-metal oxide cathode, organic elec-
trolyte, and shut-down separator.
Lithium metal oxide batteries can deliv-
er high current pulses and high rate
energy, with up to 20 years of storage life
due to a self-discharge rate of less than
1% per year. An enhanced version, the
TLM-HE Series, now available in an AA-
size, provides an open circuit voltage of
4V, with a discharge capacity of 1,100
mAh for an AA-size cell (20 mA at 2.8V
RT), capable of handling 5A continuous
current and 15A pulses.
TLM batteries feature a wide operat-
ing temperature range (-40C to +85C),
and comply with MIL-STD 810G specs
for vibration, shock, temperature shock,
salt fog, altitude, acceleration (50,000
gn), and spinning (30,000 rpm). They
also conform to UN 1642 and IEC 60086
standards for crush, impact,
nail penetration, heat, over-
charge and short circuit, and
can be shipped as non-haz-
ardous goods. Standard cells
come in cylindrical configu-
rations (AA-size, CR-2 size,
and 20mm length) and a
AAA-size (10mm), and can
be easily configured into cus-
tom battery packs.
Unlike thermal/reserve
and spin-activated batteries,
TLM batteries permit instan-
taneous activation without
the need for squibs or gas
generators. They can also be
periodically tested to ensure
system readiness, thus re -
ducing the number of
duds in missile guidance
systems. Power can also be
drawn intermittently, so
their use is not restricted to
single-use applications. In
addition, these cells do not
generate the high internal
temperatures required by
thermal batteries, thus eliminating the
need for bulky insulation.
Some real-life military applications for
lithium metal oxide batteries are:
ODAM 60 mm mortar guidance sys-
tems: Under DARPAs Optically
Directed Attack Munitions (ODAM)
project, BAE Systems conducted feasi-
bility studies for a low-cost, laser-guid-
ed, 60mm mortar round. BAE Systems
selected TLM-1530-HP lithium batter-
ies to power the laser-guided optical
seekers. TLM-1530-HP batteries were
chosen over CR-2 consumer type bat-
teries because they could withstand
extremely cold temperatures (-40C)
and offered four times longer shelf life
(20 years versus 5 years).
Unmanned Aerial Vehicles: Lithium
metal oxide batteries power the emer-
gency recovery system of an
unmanned air reconnaissance aircraft.
To create a weight- and space-saving
solution, a 32V/480W battery pack was
developed using 96 AA-size lithium
metal oxide batteries, delivering up to
120W per hour at -30C, and weighing
approximately 2 Kg including a metal
enclosure. This battery pack can be
quickly reconfigured for other UAV
applications.
Powering missile systems: The guid-
ance system of an air-to-ground mis-
sile previously powered by 19 silver-
zinc cells can be converted to a bat-
tery pack consisting of 24 high-power
lithium metal oxide cells, resulting in
3.5 times greater energy density, as
well as reducing size by 30% and
weight by 75% (2.2 Kg vs. 0.5 Kg).
The squib, gas generator, and heater
required by silver-zinc batteries are
also eliminated.
Choice of battery is influenced by per-
formance criteria such as voltage, capac-
ity, size, weight, special packaging, serv-
ice life, temperature, and environmen-
tal requirements. Other design consid-
erations can include the need for
instant activation, system readiness test-
ing, and multiple use requirements,
where applicable.
Recently the U.S. DoD decided to
require oxhalide batteries instead of
lead-acid or thermal batteries to power
the latest generation of spin-activated
Multi-Option Fuses for Artillery (MOFA),
including 105mm and 155mm bursting
artillery projectiles. Had lithium metal
oxide been chosen over lithium
oxhalide chemistry, significant per-
formance advantages could have been
realized, including seven times greater
capacity (200 mAh vs. 30 mAh), over
ten times greater current (3.5A vs. 325
mA), more stable voltage, and faster
activation (instantaneous vs. a 100 ms
delay).
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www.defensetechbriefs.com Defense Tech Briefs, December 2011 Free Info at http://info.hotims.com/34461-788
One military application for lithium metal oxide batteries is pow-
ering air-to-ground missile guidance sustems.
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Intro
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Intro
30 www.defensetechbriefs.com Defense Tech Briefs, December 2011
Technology Focus:
Materials & Coatings
A
n acoustic crystal composed of
tightly packed spherical particles
can exhibit a wide spectrum of acoustic
properties with responses varying from
linear to highly nonlinear regimes. The
physical attractiveness of these crystals
resides in the controllability of such
acoustic responses by simple manipula-
tion of static pre-compression applied to
the material.
During the first part of this study, the
focus was on the fundamental under-
standing of the energy transmission
through these crystals in relation to the
tunable acoustic nonlinearity. To control
the degree of nonlinearity, three param-
eters were varied: pre-compression, strik-
er velocity, and striker mass, maintaining
an identical configuration of one-dimen-
sional (1D) granular structures. The
transmission gain in the stop/pass fre-
quency band of the granular chain was
evaluated as a function of the nonlinear-
ity. The evolution of the frequency band
structure was studied as the degree of
nonlinearity was changed. The transmis-
sion gain of the granular structure shows
a remarkable dependence on the struc-
tural linearity level.
To combine the frequency filtering
response governed by the discrete parti-
cles with an amplitude filtering
response, a system composed of a highly
nonlinear granular chain and a
deformable linear medium was assem-
bled. Acoustic wave propagation can be
efficiently manipulated and redirected
with such added degree of freedom.
During the second part of the study,
a hybrid linear/nonlinear metamaterial
was built to allow high-energy transmis-
sion only in a selected range of external
impact amplitude. In this hybrid struc-
ture, the nonlinear granular chain
takes the role of transmitting energy
when the system is excited with low
amplitude impacts, whereas the linear
structure performs as an effective shock
mitigation medium under large-ampli-
tude impacts, controlled by structural
deflections. A strong correlation of
transmission gain with external impact
amplitudes was verified, showing an
order-of-magnitude reduction of trans-
mission gain for large-amplitude
impacts compared to that of low-ampli-
Figure 2. As a higher degree of system nonlinearity is imposed on the Granular Chain, it starts to
form highly nonlinear solitary waves under a striker impact. This plot reports the smooth transition
of wave configurations from linear (top grey curve) to highly nonlinear ones (bottom blue curve) as
the system nonlinearity is increased due to the reduction of static pre-compression.
Figure 1. The dynamic responses of a 1D
phononic crystal were investigated under vari-
ous nonlinearity conditions. A Granular Crystal
composed of 20 stainless steel beads was
assembled, guided by four vertical rails.
300
250
200
150
100
50
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
0 N
6.4 N
14 N
33 N
77 N
166 N
307 N
Time [ms]
F
o
r
c
e

[
N
]
Nonlinear Acoustic Metamaterials for Sound
Attenuation Applications
Acoustic filter system material could be useful in protecting soldiers against hearing
damage from weapons fire, while largely retaining their situational awareness.
Defense Advanced Research Projects Agency, Arlington, Virginia
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A
Intro
Defense Tech Briefs, December 2011 www.defensetechbriefs.com 31
tude impacts. The wave propagation
and impact mitigation were evaluated
in the nonlinear acoustic metamaterial
using a combined discrete particle
model and a finite element method.
Finally, it was verified that the numeri-
cal results are in excellent agreement
with the experimental results.
The proposed metamaterials are fun-
damentally different from any other
approach to vibration isolation. They
do not use active modulation to sup-
press external vibration/impacts, but
rely on passive insulation. Furthermore,
they are stiff and load-bearing, present
large recovery to external deformation,
and do not develop permanent damage
in the ranges of excitations studied.
The proposed systems are designed to
forbid the propagation of waves in
selected frequency ranges (also called
as band gaps or stop bands). Incident
waves in these forbidden frequency
ranges experience an exponential
decay of their amplitudes (i.e., they are
evanescent waves), and they are fully
reflected. The presence of nonlinearity
in the structure may allow the redirec-
tion of part of the incoming energy into
allowed modes.
This work was done by Jinkyu Yang and Chiara
Daraio of the California Institute of Technology for
DARPA. For more information, download the
Technical Support Package (free white paper) at
www.defensetechbriefs.com/tsp under the Ma -
terials & Coatings category. DARPA-0011
T
he objective of this work was to lay the
groundwork for the development of a
new tunable II-VI infrared (IR) material
system using mature III-V semiconduc-
tors as lattice-matched substrates. Mer -
cury cadmium selenide (HgCdSe) was
studied as an alternative to mercury cad-
mium telluride (HgCdTe) as an IR-
detecting material.
The advantage of the HgCdSe system is
twofold. First, it is tunable to any IR wave-
length of interest by controlling the cad-
mium (Cd) composition, and second, it is
lattice-matched to mature III-V semicon-
ductor systems, such as gallium anti-
monide (GaSb) and indium arsenide
(InAs). By using a lattice-matched mature
substrate technology, in principle,
HgCdSe can be grown with limited gen-
eration of dislocations, resulting in
extremely high-quality and uniform IR
sensing material, which would greatly
improve operability of the focal plane
array (FPA). This is completely analogous
to HgCdTe grown on lattice-matched
bulk cadmium zinc telluride (CdZnTe)
substrates, which result in two orders of
magnitude reduction in dislocation den-
sity over HgCdTe grown on silicon (Si)
substrates.
Previous experience in growing the II-
VI IR detecting compound, HgCdTe, by
molecular beam epitaxy (MBE) was
leveraged to develop a completely new
IR sensing II-VI system, HgCdSe.
Currently, HgCdTe is the material used
in the majority of fielded Army IR sys-
tems, and much effort has been expend-
ed to push the technology to both large-
format and low-cost systems while still
maintaining superior performance.
However, this technology has been sit-
ting at a roadblock for several years that,
to date, has not been overcome, and no
solution appears imminent. Namely, in
order to achieve large-format sizes as
required for third generation, a new Si-
based composite substrate technology
needed to be developed since current
lattice-matched substrate technology
(bulk grown CdZnTe) is severely limited
in size and scalability (a maximum of 6
6 cm
2
is commercially available).
Due to the huge lattice mismatch
between Si and HgCdTe (19%), and
associated strain energy, misfit disloca-
tions need to be generated somewhere
in the thin film stack to alleviate this
energy, which ultimately propagates into
the IR-absorbing layer. Generally, two
orders of magnitude higher dislocation
density is present in scalable HgCdTe/Si
material with respect to non-scalable
HgCdTe/CdZnTe. It has been demon-
strated that this higher dislocation level
results in lower device performance.
There is ongoing effort to either reduce
dislocation density in HgCdTe/Si or ren-
der the dislocations electrically inactive,
but, to date, no single approach appears
to offer a clear and immediately success-
ful option.
This work proposes that HgCdSe will
act very similarly to HgCdTe in terms of
its IR material properties, but will have
the great advantage of having commer-
cially available large-area (and scalable)
substrates readily available. Additionally,
previous work on MBE growth of
CdSeTe indicated that the Cd-selenide
(Se) bond strength is stronger than the
Cd-telluride (Te) bond strength. It is
expected that this will be another advan-
tage of HgCdSe over HgCdTe in that the
material itself may be more tolerant of
dislocations due to this fact.
Mercury selenide (HgSe) is a semi-
metal, and cadmium selenide (CdSe) is
a wide-bandgap semiconductor, both
with nearly identical lattice constants
(HgSe = 6.08 A, CdSe = 6.05 A). By form-
ing an alloy of Hg
1-x
Cd
x
Se, the bandgap
of the material can be tuned to absorb
any wavelength of IR light resulting in
an ideal material to cover the entire IR
spectral range. In addition, two III-V
binary semiconductors are available to
use as substrates that are nearly lattice-
matched to HgCdSe, specifically InAs
and GaSb. These substrates are devel-
oped and readily available from com-
mercial suppliers.
By using III-V bulk substrates, a start-
ing template for HgCdSe growth with a
very low dislocation density will be avail-
able. Presently, GaSb is quoted as hav-
ing a dislocation density of less than 10
4
cm
-2
. Even with the small lattice mis-
match present between GaSb and
HgCdSe (f ~0.70% depending on the
exact HgCdSe composition), the final
HgCdSe dislocation density is expected
to measure in the 10
4
cm
-2
to low 10
5
cm
-2
range. This type of dislocation
density is exactly what is achieved for
HgCdTe material grown on bulk
CdZnTe substrates, and which produces
state-of-the-art infrared focal plane
arrays (IRFPAs) for numerous applica-
tions. There is no reason to assume that
achieving HgCdSe material with the
same dislocation density value will not
yield similar IRFPA performance.
This work was done by Gregory Brill and
Yuanping Chen of the Army Research Lab -
oratory. For more information, download the
Technical Support Package (free white paper)
at www.defensetechbriefs.com/tsp under the
Materials & Coatings category. ARL-0125
Tunable Infrared Material System
This technique results in a high-quality, uniform IR sensing material.
Army Research Laboratory, Adelphi, Maryland
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A
Intro
W
hen a high-energy laser (HEL) beam transmits through a
window material, a part of the laser energy is absorbed by
the material and causes optical aberrations. This absorbed ener-
gy results in material heating in the local exposed region, chang-
ing its refractive index based on the materials thermo-optic coef-
ficient, thermal expansion coefficient, and stress optic coeffi-
cient. These changes result in beam distortion and loss of output
power, measured as optical path distortion (OPD), which has a
severe impact on system performance.
For HEL systems operating in the shortwave infrared
(SWIR) wavelength region, the materials of choice are limited
to just a few, including fused silica and oxyfluoride (OFG)
glasses. Some of the HEL systems are expected to operate in
harsh environmental conditions where fused silica and OFG
glasses will not survive.
Transparent magnesium aluminate spinel (MgAl
2
O
4
)
ceramic was developed as a rugged window and dome materi-
al for protecting sensors operating from the ultraviolet (UV) to
the mid-IR. The transparent spinel ceramic was made from
high-purity powder synthesized using aqueous chemical meth-
ods. The 5 9s pure Al and Mg chloride were mixed together
to form a homogeneous solution at 80 C. Ammonium hydrox-
ide was added to the solution to form a precipitate that was
subsequently filtered, washed with water and then acetone,
and baked to dry. The powder was then calcined at 600 C to
convert to magnesium aluminate spinel.
Ceramic spinel was made by hot-pressing ball-milled spinel
powders at 1400-1650 C for 2-4 hours using a uniform coating
of a small amount of LiF sintering aid that was eliminated by
evaporation prior to full densification. The hot-pressed sam-
ples were transparent, with densities greater than 99% of theo-
retical. The samples were subsequently hot isostatically pressed
(HIP) at 1600 C for 2 hours under an Ar gas pressure of
30,000 psi to produce fully dense and transparent ceramics.
The samples ranged in size from 5 cm in diameter and 6 mm
thick, to larger samples (15 cm diameter) from which smaller
samples were cut, ground, and polished for many of the meas-
urements. High-damage-threshold anti-reflective (AR) coat-
ings (SiO
2
/ZrO
2
) were applied to the surface of polished 5-cm-
diameter samples using dc-magnetron sputtering.
Spinel powder synthesized by the aqueous process produced
approximately 100-200 nm crystallites with excellent phase
purity as highlighted by X-ray diffraction analysis and chemical
analysis. Compared to commercial powder, the impurity con-
tent is several orders of magnitude lower. The surface area of
the synthesized powder was 25 m
2
/g compared with a range of
10-30 m
2
/g for commercial powder.
Rain and sand erosion tests performed on spinel ceramic
were successful. The spinel samples were able to withstand
impact from rain droplets at speeds up to 600 mph and sand
particles at speeds up to 460 mph without damage, without sur-
face pitting, and with no change in transmission, unlike glass,
which exhibits considerable damage.
Spinel is a rugged ceramic material that transmits from the
UV to 5 m and could be used as an exit aperture for HEL sys-
tems. However, spinel made from commercial powder exhibits
high absorption losses due to extrinsic impurities. Ceramic sam-
ples made from spinel powders demonstrated a record low
absorption loss of 6 ppm/cm at 1.06 m.
This work was done by Jas Sanghera, Shyam Bayya, Guillermo
Villalobos, Woohong Kim, Jesse Frantz, Brandon Shaw, Colin Baker, and
Ishwar Aggarwal of the Naval Research Laboratory; Bryan Sadowski, R.
Miklos, and Fred Kung of GTEC Inc.; Michael Hunt of University
Research Foundation; David Reicher and Stan Peplinski of the Air Force
Research Laboratory; Al Ogloza and Peter Langston of NAWC; Chuck
Lamar of the Army Space & Missile Defense Command; Peter Varmette of
SAIC; Mark Dubinskiy of the Army Research Laboratory; and Lewis
DeSandre of ONR Global. For more information, download the Technical
Support Package (free white paper) at www.defensetechbriefs.com/tsp
under the Materials & Coatings category. NRL-0048
32 Defense Tech Briefs, December 2011 Free Info at http://info.hotims.com/34461-790
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Transparent Ceramics for High-Energy Laser Systems
These ceramics can be used as window and dome material for protecting sensors.
Naval Research Laboratory, Washington, DC
The ceramics made from the Spinel Powder exhibit excellent visible and
infrared transparency. (a) An uncoated 5-cm diameter spinel window, and (b)
a 10" diameter spinel window coated with broadband anti-reflective coatings.
(a) (b)
Materials & Coatings
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A
Intro
Defense Tech Briefs, December 2011 33
The FRED

Optical Engineering Software by Photon Engineering


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The above image is the interference pattern formed by a stellar interferometer
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Manufacturing & Prototyping
T
he emerging threats caused by
improvised explosive devices (IEDs)
have drastically increased concerns
about soldier survivability. The ability to
identify friend vs. foe of any approach-
ing vehicles clearly, quickly, and from a
distance, is invaluable to ensure a sol-
diers safety, as well as critical to provid-
ing protection of facilities at strategic
locations. The current state-of-the-art
uses externally applied coatings or mark-
ings onto vehicles that are not seen in
the visible light spectrum, yet are
detectable with the use of an ultraviolet
(UV) or infrared (IR) interrogation
device. However, coatings can wear off
or wash off, and are susceptible to being
counterfeited or tempered.
A need exists for novel transparent
polymer composites that contain inter-
nally embedded taggant materials that
preserve transparency while being capa-
ble of patterning for optical tagging. The
technical challenge is in the difficulty of
fabricating and dispersing the nano -
fibers in the matrix. Transparency of a
material is influenced by both the extent
of light transmittance and the percent-
age of haze. Furthermore, the scattering
of light in polymer fiber composites is
greatly influenced by the compounding
effects from the diameter of fibers, and
the difference in refractive index
between matrix and fiber. For example,
poly(methyl methacrylate) (PMMA) and
polyacrylonitrile (PAN) have a small dif-
ference between their refractive indexes
(1.49 and 1.52, respectively) that would
produce significant haze.
The approach for making optically
clear, fiber-modified polymer compos-
ites is based on the match of refractive
index of selected fiber and matrix poly-
mers. PMMA has been used widely in
many transparent materials applications.
Fabrication of Novel Transparent PMMA Composites
for Optical Tagging
Optically clear composites are used in tags and decals to easily identify
vehicles from a distance.
Army Research Laboratory, Aberdeen Proving Ground, Maryland
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A
Intro
34 www.defensetechbriefs.com Defense Tech Briefs, December 2011
Manufacturing &
Prototyping
Poly(vinyl butyral) (PVB) has an attrac-
tive combination of chemical, mechani-
cal, and optical properties, and it has
been used in a wide array of commercial
applications, such as structural adhesives
for glass laminates, coatings, and matrix
polymer for fiber-reinforced thermoset
composites. PVB has the same refractive
index as PMMA, and is, therefore, select-
ed for the production of electrospun
fibers. PVB, however, has extremely high
melt viscosity and is generally not melt
spun into fibers.
Electrospinning offers a simple and
robust method to produce submicron
PVB fibers. In addition, electrospinning
has the following advantages: (1) it can
produce very fine fibers (average diam-
eter ranging from 100 nm to 500 nm)
that can minimize the scattering of light
if there is a slight mismatch in the
refractive indices; (2) it can produce a
fibrous mat that has a large surface area
to mass ratio for better bonding to the
matrix material; (3) it allows the dye to
disperse in the spin solution; and (4) it
does not compromise the chemical sta-
bility of the dye during spinning and
composite fabrication.
The scope of this work is to demon-
strate the feasibility of making transpar-
ent composites that possess chromatic
functionalities capable of changing
color and/or optical clarity, reversibly,
upon exposure to an external irradia-
tion. In-situ polymerization/cast process
is used for fabrication of PMMA PVB-
fiber composites. This study examines
the stability of an embedded fluorescent
dye within the electrospun fibers and
their capability of patterning for optical
tagging.
In-situ polymerization/cast was used
for preparation of PMMA PVB-fiber
composites. The electrospun PVB mat
was cut into 4 4" pieces. Then several
layers of PVB pieces were compacted in
a hydraulic press. The stack of PVB mats
was soaked in the PMMA-MMA-AIBN
solution for 5 hours. The degassed resin-
impregnated fiber mat was then trans-
ferred to an aluminum mold. The interi-
or dimensions of the mold are 4 4
0.02". The inner surfaces of the alu-
minum mold have a mirrorpolished fin-
ish. The mold surfaces were sprayed
with a release agent (LPS, Dry Film
Silicon Lubricant). First, the PVB mat
was laid flat into the mold, then an
excess amount of PMMA-MMA-AIBN
solution was added to the mold. The
mold was placed in a hot press for cur-
ing. The pressure was set at 1000 kPa
and the temperature was set to 55 C.
The curing process lasted for 12 hours,
and then cooled down slowly to room
temperature.
PVB has the same refractive index as
PMMA, and as a result, the PMMA PVB-
fiber composites were completely opti-
cally clear. The stability of the selected
UV-dye within the electrospun fibers
appeared to be excellent, even long
after fabrication.
This work was done by Jian H. Yu and
Alex J. Hsieh of the Army Research
Laboratory, and Gregory C. Rutledge of MIT.
For more information, download the
Technical Support Package (free white
paper) at www.defensetechbriefs.com/tsp
under the Manufacturing & Prototyping cat-
egory. ARL-0121
The optical clarity of a presoaked Fiber Mat after degassing is shown. (a) PVB mat soaking in
PMMA-MMA-AIBN solution; (b) PVB after 5 hours of soaking and vacuum egression.
(a)
(b)
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A
Intro
Defense Tech Briefs, December 2011 35
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Software System for
Microbial Genome Sequence
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The annotation of genomes from
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needs to be rapid, high-throughput, and
fully integrated and automated. Al -
though a few Web-based annotation
services have recently become available,
they may not be the best solution for
researchers that need to annotate a
large number of genomes, possibly
including proprietary data, and store
them locally for further analysis.
A standalone software application, the
Annotation of microbial Genome
Sequences (AGeS) system, incorporates
publicly available and in-house-developed
bioinformatics tools and databases, many
of which are parallelized for high-through-
put performance. AGeS was designed to
support three main capabilities. The first is
the storage of input contig sequences in
FASTA format and the resulting annota-
tion data in a central, customized data-
base, where the data manipulation and
visualization steps are performed through
easy-to-use graphical user interfaces
(GUIs). The second is the annotation of
microbial genomes using an integrated
software pipeline, which analyzes se -
quence contigs and locates genomic
regions that code for proteins, RNAs, and
other genomic elements through the Do-
It-Yourself Annotation (DIYA) framework.
The identified protein-coding regions are
then annotated using an in-house-devel-
oped, high-throughput pipeline, the
Pipeline for Protein Annotation (PIPA).
The third capability is the visualization of
annotated sequences using the open-
source genome browser GBrowse. Full
genome and protein annotation, storage,
and visualization for bacterial genomes
have been implemented.
The AGeS system was designed and
implemented to provide a standalone,
integrated solution that users can
install on their computers. AGeS can
be installed on either a standalone
Linux computer or a Linux cluster.
When run on a multicore Linux com-
puter or a Linux cluster, AGeS sup-
ports OpenMPI for parallel execution
and PBS for batch submission. The
AGeS system has been designed for
easy integration with future sequence
analysis modules. Its Web applications
use technologies based on open stan-
dards, including Java, JavaScript, and
XML.
This work was done by Kamal Kumar,
Valmik Desai, Li Cheng, Maxim Khitrov,
Deepak Grover, Ravi Vijaya Satya,
Chenggang Yu, Nela Zavaljevski, and
Jaques Reifman of the Army Medical
Research and Materiel Command. For more
information, download the Technical
Support Package (free white paper) at
www.defensetechbriefs.com/tsp under the
Software category. ARL-0129
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A
Intro
36 www.defensetechbriefs.com Defense Tech Briefs, December 2011
TECH TRANSFER REPORT
Commerci al Spi noff s f rom Mi l i tary R&D Programs
Polarization Sensors
Polaris Sensor Technologies,
Inc. (Huntsville, AL), has devel-
oped a polarization sensor
technology that improves on
infrared (IR) optical sensing
tools. The Missile Defense
Agency (MDA) funded Polaris
through SBIR Phase II con-
tracts in 2005 and 2006.
Because the polarization
functionality removes undesir-
able glare and reflection of
objects, the technology could enhance imaging systems for port
security, cancer treatment, and environmental monitoring.
For port security, the Polaris sensor enables agents to find
vessels in crowded harbor environments, or detect objects that
do not produce significant radar signatures. The companys
sensor may also improve weather forecasting by better detect-
ing water content in clouds.
Polaris, which additionally was funded by the National
Institutes of Health, uses its spectral polarization sensor tech-
nology to help discriminate between malignant and nonmalig-
nant skin lesions.
For more information on Polaris Sensor Technologies, visit
http://info.hotims.com/34461-504. (Source: David Chenault,
Polaris Sensor Technologies/NTTC; MDA TechUpdate, Missile
Defense Agency, National Technology Transfer Center Washington
Operations).
Paper-Thin Mirrors
McCarter Machine, Inc. (Deer Park, TX), has developed a
patented process to make smooth, precise, defect-free mirrors.
The company uses silicon boules that are free of residual stress,
which enables rapid machining with the use of conventional
tools. The company has patented its grinding and superfinish-
ing techniques.
McCarter received MDA
funding support through a
2005 SBIR Phase II contract.
Commercial opportunities may
exist in the production of fast-
steering, paper-thin mirrors.
Such mirrors show promise in
applications such as lithogra-
phy, x-ray synchrotrons, and
fabric-cutting tools for the
apparel industry. The compa-
nys additional offerings include a variety of precision-machin-
ing and silicon-process services.
For more information on McCarter Machine technology, visit
http://info.hotims.com/34461-505. (Source: Douglas McCarter,
McCarter Machine, Inc./NTTC; MDA TechUpdate, Missile Defense
Agency, National Technology Transfer Center Washington Operations).
Laser Materials
Cleveland Crystals (Cleveland, OH) has developed a domes-
tic source of material for tunable lasers and high-average-
power Pockels cells. The material provides a variety of features
and a wide transmission frequency range critical for support-
ing a variety of applications, including medicine, spectroscopy,
LIDAR, and materials processing.
Cleveland Crystals, now part of major optics supplier Gooch
& Housego, received funding from MDAs predecessor agen-
cies via two Phase I and one
Phase II SBIR contracts.
Compared to dye lasers,
solid-state lasers based on the
material offer both cost
advantages and wide tenabili-
ty. The material could be
used in Q-switched lasers,
which are now well known
for removing tattoos, ablat-
ing tissue in the prostate,
processing the surface of industrial materials, and providing
precision micromachining of optical, mechanical, and elec-
trical components.
For more information on Cleveland Crystals technology, visit
http://info.hotims.com/34461-506. (Source: Gary Catella, Gooch and
Housego, Inc./NTTC; MDA TechUpdate, Missile Defense Agency,
National Technology Transfer Center Washington Operations).
Graphical User Interface
Lockheed Martin (Bethesda, MD) was selected by the U.S.
Armys Research Development and Engineering Command,
Communications-Electronics Research, Development and
Engineering Center (RDECOM CERDEC) Night Vision and
Electronic Sensors Directorate (NVESD) to demonstrate an
advanced slew-to-cue sensor system designed to provide
greater situational awareness during route clearance and sur-
veillance missions.
The Multi-sensor Graphical User Interface (MS GUI), shown
recently at the Association of the U.S. Army Annual Meeting in
Washington, D.C., is a backwards compatible upgrade kit for
fielded Gyrocam systems currently deployed with the U.S.
Army and U.S. Marine Corps.
MS GUI allows the operator to use a touch screen display
capability to slew between reference cameras, such as the
Drivers Vision Enhancer, and the Gyrocam

Vehicle Optics
Sensor System (VOSS), to simultaneously search for potential
threats while interrogating identified hazards on route clear-
ance missions.
Lockheed Martin will continuously update capabilities of
the MS GUI system for use in various situational awareness
applications, paving the way for the eventual fielding of the
technology.
For more information on Lockheed Martin technology, visit
http://info.hotims.com/34461-538. (Source: Lockheed Martin).
Sensors, Mirrors and Laser Materials
The sensors polarizing technolo-
gy allows users to differentiate
between objects.
Patented machining technique
offers cost-effective alternative to
beryllium and silicon carbide.
Material for solid-state lasers.
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Intro
U.S. Navy electronics technicians perform
maintenance on the 43 radar aboard the
aircraft carrier USS John C. Stennis.
Modern radar often requires the use of
wideband waveforms to perform high-
resolution target imaging. Find out how
waveform generation software is being
used to support radar development
efforts in the article on page 41.
(U.S. Navy photo by Mass Communication
Specialist 3rd Class Will Tyndall)
December 2011
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A
Intro
38 www.defensetechbriefs.com RF & Microwave Technology, December 2011
O
ne aspect that sets circuit pro-
tection for radio frequency
(RF) apart from other types of
applications is the range of frequencies
in which RF circuits operate. With
abbreviated clock cycles, the transition
time of the data leaves little room for
error. Transitions must be clean and reli-
able to ensure the integrity of the data
and interface. Circuit protection charac-
teristics such as capacitance become
important in terms of their effect on
these high-frequency signals and it often
complicates the design.
While capacitance can be designed
into the circuit to provide the benefit of
smoothing the transition of the data, it is
often at the cost of the data becoming
stable too late in the clock cycle, result-
ing in errors. A proven method to pro-
vide circuit protection includes the use
of an electronic current limiter (ECL),
which reacts when either the voltage or
current is out of the safe range of opera-
tion. Particularly useful for RF applica-
tions that operate up to 3 GHz, this solu-
tion is available to complement other
technologies, and provides protection
from overcurrent, overvoltage, and
open or short circuits.
Applications that follow Gigabit
Ethernet (GbE), Serial Digital Interface
(SDI), and Low Voltage Differential
Signaling (LVDS) standards are well suit-
ed to an ECL solution. An ECL intro-
duces negligible capacitance, which
makes this method of circuit protection
an optimal choice.
RF and LVDS Vulnerability
RF interfaces include a variety of sensi-
tive electronic equipment such as cable
drivers and equalizers. While signals may
be transmitted wirelessly, an abundance
of interface circuits is required in order
to transmit, receive, and process the sig-
nals. Thus, while the signal itself does not
require protection, the parts that make
up the interface do. On the wired side of
the RF application, there are numerous
circuits that require circuit protection
beyond the nominal or even enhanced
electrical overstress protection provided
with the devices. Depending on the end
application, wired components in the RF
signal chain may be susceptible to light-
ning and other faults that require
extended protection from severe over-
stress. Many of these applications inter-
face with equipment that uses high-
speed LVDS signaling.
LVDS technology is useful for inter-
face applications requiring high band-
width. As use of communications net-
works increases in a wide range of
applications and markets, LVDS signal-
ing will be employed on transmission
lines that may be exposed to electrical
overstress. Any LVDS communications
lines that interface with the outside
environment will most likely include
external lines exposed to lightning
Figure 1. GDT & TBU HSP board insertion loss.
Figure 2. GDT & TBU HSP board return loss (GDT side).
An Advanced Circuit Protection
Approach for RF Interfaces
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A
Intro
surge and power cross-threats, such as
high-speed lightning transient levels at
1 MHz and 10 MHz. Hundreds or thou-
sands of volts can be introduced to
these lines due to a lightning strike,
whether direct or indirect, and in
orders of magnitude greater than the
1.25V signaling of LVDS signals. A high-
ly effective protection method is
required that protects the electronics
while maintaining the wide bandwidth
requirements of LVDS applications.
Typical RF Application Protection
A variety of technologies is employed
for circuit protection in RF applications,
including TVS diodes, coaxial arresters,
and gas tubes at the connector interface.
While TVS diodes are suitable for elec-
trostatic discharge (ESD) protection
where connection and disconnection of
cables occurs, and in providing protec-
tion for overvoltage conditions, they typ-
ically will not be sufficient for lightning
standards. Systems are available that pre-
dict when a lightning event will occur
and will switch to standby or otherwise
prepare for the event in advance, but
this interruption may not be acceptable.
A reliable level of continuous protection
is preferable.
Five standards are typically followed to
determine the level of protection a
design requires and to which it is tested
based on the application. Lightning pro-
tection solutions suitable to meet these
standards for interface devices at speeds
up to 3 GHz consist of pairing gas dis-
charge tubes (GDT) with ECL protec-
tors. Until recently, the overall perform-
ance of the signal interface was inherent-
ly degraded due to the load that the pro-
tection devices introduced to the circuit.
An Advanced Approach
Technology advancements in the area
of circuit protection devices now make it
possible to provide robust overstress pro-
tection without major impact to the per-
formance of the interface. There are two
combinations of interest that cover all
five standards for lightning protection.
The resistance of the solution is 10 ohms
with 1 pF capacitance for GR-1089 Intra-
B, IEC61000-4-5 Class 0-3 applications.
To meet GR-1089 Intra-B Enhanced,
IEC61000-4-5 Class 4-5, ITU-T K.21, a
solution with 14 ohms and 1 pF capaci-
tance is used. Each combination consists
of a GDT and an ECL.
An ECL is a compact series device that
introduces virtually no capacitance or
inductance and that does not consume
power in standby mode. It protects against
overvoltage and overcurrent conditions,
reacting in hundreds of nanoseconds.
Benefits of this barrier for sensitive equip-
ment include reset capabilities after a
fault, high bandwidth, low installed cost,
and a longer design lifetime since it does
not bring energy into the printed circuit
board on which it is installed. In stark con-
trast to the typical solution, which gener-
ally has an insertion loss that would limit
the effective rate-reaching performance
of the transmitted signal, the capacitance
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Figure 3. GDT & TBU HSP board return loss (TBU HSP side).
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Intro
of the line is not an issue with
this solution. And, the ECL
style of protection has a 3-dB
point of approximately 3 GHz,
which makes it ideal for the
high-speed data interface typi-
cal of LVDS.
An ECL is transient in
nature, reacting within a
small fraction of a microsec-
ond to protect loads from
exposure to very fast surges.
The ECL provides protection
by blocking the surge from
affecting the circuit, thereby
preventing any damage with-
in the rated limits of the
device. At low currents, the
ECL has a resistive character-
istic. Once above a set block-
ing current, it switches to
high impedance and effec-
tively creates an open circuit.
For example, if a short-circuit
condition occurs, current
limiting comes into effect
once the trigger current is
reached. The voltage limiting
circuit disconnects voltage
and current, and the circuit is
protected. In response to a
1.2 s rise time waveform, the
ECL protects within 100 ns. A
total let-through of 100 nJ
over approximately 800 ns
can be expected. The result is
well-protected equipment
because the ECL and the
equipment are not exposed
to harmful damage levels.
Effective Results
This combination of GDTs and ECLs
can be used in high-speed designs with-
out introducing capacitance to the line,
so it does not significantly affect per-
formance. Engineers at Bourns have con-
ducted tests on this combination solu-
tion to evaluate the signal integrity for
protection against high-speed lightning
situations. The solution was installed in
series with devices typical in high-speed,
point-to-point applications, including a
cable driver and equalizer combination,
and a high-speed LVDS buffer and
repeater device. The test board featured
high-bandwidth SMA connectors, con-
trolled 50-ohm impedance microstrips,
and inner layer cutouts under the protec-
tion devices for minimal parasitic capaci-
tance. Signal path impedance was also
controlled so that the filtered impedance
profile of the test board remained within
a 40- to 60-ohm range.
Per the electrical description of the
solution, it was expected that the
impact on the signal integrity of the
link would be minimal when installed
in line within the circuit. A time-
domain reflectometer was used to veri-
fy that the impedance impact to the
link was minimal. Frequency domain
analysis showed minimal degradation
or impact. Based on the insertion loss
(shown in Figure 1), the -3 dB band-
width of the GDT and ECL board is
approximately 3 GHz. Measured from
the GDT side (shown in Figure 2), the
return loss remains below -15 dB at fre-
quencies up to 1.5 GHz. From the ECL
side (shown in Figure 3), this limit is
maintained up to 2 GHz.
These characteristics qualify the per-
formance of the solution as optimal for
bit rates up to 2 Gbps and acceptable up
to 3 Gbps. Two applications were tested
to obtain eye patterns to show the time
domain analysis and overall jitter with
and without the solution.
Figure 4 shows the interface
without the solution, and
Figure 5 shows the same inter-
face with the solution added
in line. Notice the minimal jit-
ter the solution adds to the
link. At 3.125 GHz, the intro-
duced jitter was approximate-
ly 15-20 ps, and the applica-
tions operated within their
specifications in both cases.
When longer cables are
used, the series resistance of
the solution may impact the
performance. For instance,
when an adaptive equalizer is
used with a 75-100 meter
cable, the resistance at the
transmit side of the link can be
reduced to ensure signal qual-
ity remains acceptable. Lower
series resistance further
reduces these minor impacts.
Time domain test results con-
firm that these frequency
domain measurements are
valid. The solution was shown
to have little impact and allow
reliable performance at bit
rates up to 3 Gbps.
Maintaining RF
System Integrity
When enhanced and ex -
tended circuit protection is
needed to protect applica-
tions from severe electrical
overstress such as lightning
and other serious surge
threats, the combination of GDT and
ECL technologies offers highly effective
protection with minimal impact to sys-
tem performance. This combined solu-
tion allows the rapid clock transitions of
high-frequency LVDS signals up to 3
GHz to operate reliably within specifica-
tion. It also protects against severe light-
ning threats and other open or short
conditions that can cause overvoltage
and overcurrent conditions.
When used in RF applications, the
integrity of the system is maintained and
the systems lifetime is enhanced by not
introducing additional energy onto the
circuit board. Added benefits of this
combined circuit protection method
include packages that feature a small
physical footprint and long product life.
This article was written by Ian Doyle,
Product Line Manager, Semiconductor
Products, at Bourns, Inc., Riverside, CA. For
more information, visit http://info.hotims.
com/34461-541.
40 www.defensetechbriefs.com RF & Microwave Technology, December 2011
Figure 5: Interface with protection solution, 3.15 GHz, Tj=52 ps.
Figure 4: Interface without protection solution, 3.15 GHz, Tj=35 ps.
Advanced Circuit Protection
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Intro
RF & Microwave Technology, December 2011 www.defensetechbriefs.com 41
Application Briefs
M
odern radars often require the use
of wideband waveforms to perform
high-resolution target imaging. In
microwave systems, the bandwidth can
be on the order of 1.5 GHz, while in
UHF systems that typically operate
between 200 and 500 MHz, the wave-
form bandwidth might exceed 200 MHz.
A major issue in the operation of such
systems is that they often overlap the
spectrum used by other radars, and even
the spectrum allocated for other types of
systems such as communications and
navigation devices.
For the radar to operate using a wide-
band waveform, spectral notches must
be included that suppress the radiated
signal by 30 dB or more at frequencies
allocated to other systems. One method
for a radar to generate such notches is
to interrupt the sweep of a linear FM
(i.e. a CHIRP) pulse. While this method
can be effective, it often results in a sig-
nificant loss in radiated power as the
transmitter is turned off during the
notching. The action of turning the
transmitter on and off during can also
cause significant VSWR problems.
Additionally, there are systems for which
a modulation such as a phase coded or
noise-like modulation is required.
To address these challenges, Tech -
nology Service Corp. (TSC) has devel-
oped software for the US Army to gener-
ate constant envelope amplitude, spec-
trally compliant wideband waveforms.
The waveform generation approach is
based on constrained optimization theo-
ry. Such waveforms are currently being
used in a state-of-the-art wideband UHF
synthetic aperture radar (SAR). Among
the capabilities of the software are the
abilities to:
1. Generate either constant amplitude
pulses, or pulses with controlled lead-
ing edge rise times, trailing edge fall
times, and pulse envelope tapers.
2. Create multiple, narrow, and wide spec-
tral notches, both within and outside
the radar waveform bandwidth (notch-
ing in excess of 15% of the signal band-
width has been demonstrated).
3. Pre-distort the signal that is input to the
radars high-power amplifier (HPA) to
ensure that the requisite notches are
preserved in the transmitted signal.
4. Generate mismatched pulse compres-
sion filters that suppress (typically by
15 dB) the high-range sidelobes creat-
ed by the spectral notching.
The software produces the digital
waveform coefficients (currently done
offline) that are stored in the radars dig-
ital arbitrary waveform generator within
nominally one minute. (This time could
be shortened by many orders of magni-
tude by re-hosting the code in a language
such as C++ on an FPGA processor.)
SAR Waveform Example
A UHF SAR that is being developed
by Lockheed Martin for the US Army is
required to have a frequency-compli-
ant waveform that must be designed
specifically for domestic testing pur-
poses. The SAR waveform was required
to incorporate four spectrum notches.
There are three in-band notches cen-
tered at 243, 332, and 410 MHz with
widths of 0.5, 6.8, and 20 MHz, respec-
tively, and one out-of-band notch cen-
tered at 452.5 MHz with a width of 5
MHz. Figure 1 shows the notched spec-
trum of the resulting waveform that
was used for domestic testing. The
Lockheed measurements have thus
confirmed that all of the spectral
notches had depths of at least 40 dB
when measured at the HPA output.
(Note: The pre-distortion techniques
described below were not applied to
this waveform.)
Waveform Pre-Distortion
In some radar systems, the transmitter
amplitude and phase characteristics can
degrade the spectral notch characteris-
Spectrally Compliant Waveforms for Wideband Radar
Figure 2. Spectrum of desired signal. a) Desired
signal spectrum; b) Pre-distorted HPA input spec-
trum; c) Simulated HPA output spectrum.
Figure 1. SAR waveform spectrum. a) Pulse spectrum at waveform generator output; b) Pulse
spectrum measured at HPA output.
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tics. To prevent this from occurring,
waveform pre-distortion techniques that
compensate for transmitter effects have
been developed. The waveform genera-
tion software uses the measured trans-
mitter characteristics to pre-distort the
signal at the HPA input in a manner that
preserves the desired characteristics at
the output.
Figure 2 is a simulated case where a
transmitter having a steep spectral
rolloff and a nonlinear phase charac-
teristic was modeled. Figure 2a shows
the spectrum of a desired constant
amplitude transmit pulse. Figure 2b
shows the spectrum on the pre-distort-
ed signal that was input to the simulat-
ed transmitter. Figure 2c shows the
resulting spectrum at the HPA output.
As can be seen, the spectrum at the
simulated transmitter output very
closely resembles the ideal spectrum.
The output pulses envelope amplitude
ripple was less than 0.1 dB. Thus the
pre-distortion techniques should be
effective in preserving the desired
pulse amplitude and spectral charac-
teristics. (Note: Although there are no
spectral notches in this example, simu-
lated notched waveforms show similar
performance.)
Mismatched Filtering
When a significant fraction of the
waveform is notched, high-pulse-com-
pression sidelobes result. This is shown
in Figure 3 for the notched SAR wave-
form presented in Figure 1. To reduce
the sidelobes, the software also provides
a mismatched pulse compression filter
(MMF). As shown in Figure 4, the MMF
suppresses the high range sidelobes by
nominally 15 dB. The cost for achieving
this sidelobe suppression is a 58%
broadening of the 3 dB compressed
pulse width and a 2.0 dB SNR loss.
These values are comparable to a
weighting function (e.g. Hamming)
that typically would be applied to a
radar signal.
Summary
The Spectrally Compliant Waveform
Generation Software, which is a licensed
TSC product that is currently being used
by the Army to support synthetic aper-
ture radar (SAR) programs, has been
used to support several other radar
development efforts.
This article was written by Lee R. Moyer of
Technology Service Corporation, Fairfax, VA.
For more information, visit http://info.
hotims.com/34461-542.
www.defensetechbriefs.com RF & Microwave Technology, December 2011 Free Info at http://info.hotims.com/34461-805
Application Briefs
Figure 4. Mismatched pulse compression filter response for the notched SAR waveform. a) 0
0.25 sec; b) 0 2 sec.
Figure 3. Matched pulse compression filter response for the notched SAR waveform. a) 0 0.25
sec; b) 0 2 sec.
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adjustable DC voltage gain, to 300 V/V, via a front panel potentiometer; controlled AC output
signals; and four-quadrant class AB solid-state output stages.
For Free Info Visit http://info.hotims.com/34461-551
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44 www.defensetechbriefs.com Defense Tech Briefs, December 2011
NEW PRODUCTS
Vapor Chambers
Advanced Cooling Technologies
(ACT) (Lancaster, PA) has developed a
vapor chamber that allows for higher
density electronic component installa-
tion. ACT vapor chambers are planar
heat pipes used to spread concentrated
heat, with thermal conductivities exceed-
ing that of copper interface materials. By
designing vapor chambers out of a copper-plated ceramic casing, the
coefficient of thermal expansion (CTE) can be matched to that of the
high-heat-flux silicon semiconductor materials for direct bonding. The
ACT vapor chamber has an evaporator wick structure that handles heat
fluxes up to 500 W/cm
2
. The overall resistance of the vapor chamber is
less than 0.12 C-cm
2
/W. The devices also work in conjunction with nat-
ural convection, forced convection, or liquid cooling.
For Free Info Visit http://info.hotims.com/34461-510
Single Board Computer
Advanced Digital Logic (ADL) (San
Diego, CA) has announced its
ADLQM67PC Sandy Bridge single
board computer. The ADLQM67PC
features the Intel Core i7 proces-
sor. The i7 processor integrates
Intels HD Graphics 3000 engine
with AVX (Advanced Vector Extensions),
as well as memory controller functions. The QM67
Platform Controller Hub (PCH) provides PCI-Express I/O bandwidth
at 5 Gbps.
The ADLQM67PC has a discrete 16-bit digital I/O port, along with
separate VGA, LVDS, HDMI, and Display Port interfaces. The single
board computer also features 2x RS232 COM ports and 2x SATA
6Gb/s with RAID support.
For Free Info Visit http://info.hotims.com/34461-513
Epoxy
Formulated with a blend of polymeric and inorganic materials, a two-
component epoxy from Master Bond (Hackensack, NJ) can be used in
bonding, sealing, casting, and coating applications. Serviceable over the
temperature range of -60 F to 250 F, EP30LTE-LO cures at room temper-
ature, with 85% of its maximum strength developed within 48 hours. Faster
cures are possible at elevated temperatures. The 100% reactive epoxy fea-
tures a low coefficient of thermal expansion
of 1210
-6
in/in/C and a low shrinkage
rate of less than 0.0002 in/in. The product
creates bonds with a tensile strength of over
5,000 psi. The electrically insulative system
resists thermal cycling and chemicals
including water, fuels, and many acids,
bases, salts, and organic solvents. The epoxy
has a working life of up to 60 minutes for a
200-gram mass.
For Free Info Visit http://info.hotims.com/34461-512
Ethernet Switch Card
Ballard Technology (Everett, WA) has introduced the MPR-ES-1,
a 10-port managed/unmanaged Ethernet switch PMC for embed-
ded use. The rugged COTS switch is suitable for both conduction
and convection (air) cooled systems.
The MPR-ES-1 Ethernet switch includes two Gigabit ports and
eight 10/100 Mbps ports. One Gigabit port routes directly to the
integrated Ethernet controller and provides the host computer
with a direct connection to the switch for system expansion. The
second Gigabit port can act either as a straight 1 GB path for the
host single board computer, as a high-speed uplink to other switch-
es, or as a standard 10/100/1000 Mbps port. The CCPMC form
factor allows integration with modern embedded computers,
including VME, VME-64,
cPCI, and VPX systems.
The MPR-ES-1 combines
a Marvell

switch controller
with onboard magnetics. It
provides IEEE 802.1X MAC-
based authentication and
support for up to 8K MAC
address entries. Management functions include VLAN, QOS,
and ingress/egress limiting. In addition, the switch includes
health monitoring and diagnostic features such as Built-in Test
(BIT), temperature monitoring, port mirroring, and Virtual
Cable Tester.
For Free Info Visit http://info.hotims.com/34461-514
High-Temp Cable Assembly
Meggitt Sensing Systems (San
Juan Capistrano, CA) has intro-
duced the Endevco

model
3075M6-XXX hardline cable
assembly, offering performance
up to +482 C (+900 F). Offered with a hermetically sealed design
for resistance to corrosion, humidity, and other harsh environ-
mental conditions, the 3075M6-XXX is constructed with a fiber-
glass jacket over a 304L stainless steel outer sheath, preventing
inadvertent signal grounding.
Both cable assembly ends terminate into glass-fired 10-32 UNF
connectors. An optional 10-32 to 10-32 inline adaptor, sold sepa-
rately as the Endevco

model 33268, conjoins two model 3075M6-


XXX assemblies into a single operating unit. The cable assembly is
compatible with high-temperature single-ended piezoelectric
accelerometers.
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OpenVPX Signal-Processing Modules
New 3U and 6U OpenVPX modules from Mercury
Computer Systems (Chelmsford, MA) support
Electronic Warfare/Signals In telligence (EW/SIG-
INT) applications. The modules de tect electron-
ic transmissions from opposing forces in
missions ranging from radar target-
ing suppression to counter-IED. The
modules can be configured with
radio frequency (RF) tuners, or into advanced
Application Ready Subsystems (ARS) as part of larger
EW/SIGINT systems.
The larger 6U OpenVPX subsystems are enhanced with the
Echotek

Series SCFE-V6-OVPX module, which supports three Virtex-


6 FPGAs, two VITA-57 FMC sites, and a Linux-based control processor.
The FMC sites can be configured with A/D and D/A converters, sup-
porting a range of IF bandwidths and channel densities. Multiple 6U
modules can be configured in scalable subsystems supporting multi-
channel coherency.
Two new 3U OpenVPX modules support EW/SIGINT functionality.
The Ensemble HCD3210 processing module combines a Virtex-6 FPGA
with a Freescale dual-core 8640D general-purpose processor. An indus-
try-standard XMC site enables I/O directly into the module. The
Ensemble SFM3010, a multi-plane switching module, supports a low-
latency, deterministic SRIO fabric data plane, a GigE switching control
plane, and an IPMI-based system management plane.
For Free Info Visit http://info.hotims.com/34461-515
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Intro
Polymer Membrane
To comply with spilled materi-
als regulations, Durabak-M26, a
single-component, slip-resistant
chemical- and petroleum-resist-
ant product from ADI Tech -
nologies (McLean, VA), seals
porous concrete, thereby en -
abling the proper cleanup in the
event of a spill that may potential-
ly leak to the soil and cause damage to the environment. The
polyurethane system bonds to the wall area to provide a seamless, leak-
free, and repairable membrane.
For Free Info Visit http://info.hotims.com/34461-511
Defense Tech Briefs, December 2011 45 Free Info at http://info.hotims.com/34461-795
Free Info at http://info.hotims.com/34461-794
Avionics Cables and Connectors
TE Connectivity (TE) (Berwyn,
PA) has developed new cable and
connector offerings to support
Ethernet data rates. The products
handle IEEE 1394, USB, and a
range of speeds from 1 GbE through
10 GbE. The TE connectors, which
support UAVs, helicopters, missiles,
and soldier systems, will include high-speed, small-form-factor circular
and rectangular connectors in sizes as small as nanominiature.
Termination methods involve mechanical crimp, solder, and high-
retention-force removable clamps.
For Free Info Visit http://info.hotims.com/34461-517
Bellows Assembly
Servometer

PMG, LLC (Cedar Grove,


NJ) has introduced an athermalization, or
atherm, temperature-sensitive bellows
assembly. The lightweight assemblies have
thin-walled, electrodeposited nickel sol-
dered to custom end pieces. The end
pieces are filled with a working fluid and
then sealed.
By sealing a specific volume of fluid with-
in a Servometer electrodeposited nickel bellows, the volumetric ther-
mal expansion characteristic of the fluid transforms into a measurable
linear movement. This movement can be used as an actuator or cali-
brated to be read as control data. The process is also reversible due to
the low hysteresis of the bellows material.
For Free Info Visit http://info.hotims.com/34461-520
DC/DC Converters
The QMJ Series of DC/DC converters from Contech (Concord,
CA), a division of Calex, offers up to 20 Watts of fully regulated output
power. The series offers a 4:1 input range with nominal input voltages
of 24 VDC and 48 VDC. Single outputs
offered are 3.3, 5, 12, and 15 VDC.
Dual outputs are 12 and 15 VDC.
The 1 1" package operates with
efficiencies as high as 90%. Features
include remote On/Off, output trim,
and short circuit protection. The
RoHs-compliant QMJ, which has an
operating ambient temperature range of -40 to +70 C, is encapsulat-
ed with a thermally conductive potting compound in a six-sided
metal case.
For Free Info Visit http://info.hotims.com/34461-521
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Intro
46 Defense Tech Briefs, December 2011 Free Info at http://info.hotims.com/34461-797
BEGINS
HERE
GROWTH
Sapphire windows up
to 15in diameter
Optical wave fronts of 1/10
wave peak to valley and better
No bubbles or thickness
restrictions
Industrys best homogeneity
of refractive index
Sapphire quality begins with
GT Advanced Technologies
GT Crystal Systems, a subsidiary of GT Advanced
Technologies, is recognized worldwide as
a leading producer of high quality sapphire
material. GTs HEM sapphire is known for its high
purity levels (>99.996%), crystalline perfection
and large diameter crystals. Learn why the
worlds most demanding optical applications
begin with GT HEM sapphire. Contact us at
sapphiresales@gtat.com or call +1.978.745.0088.
POLYSILICON PHOTOVOLTAIC SAPPHIRE gtat.com
Free Info at http://info.hotims.com/34461-796
NEW PRODUCTS
MIL-STD-1553 PMC Card
The BU-65596F/M, a MIL-STD-1553 PMC
card from Data Device Corporation
(Bohemia, NY), uses DDCs Enhanced
Mini-ACE

ASIC core. The BU-


65596F/M incorporates Total-ACE

integrated terminals and includes over


62 million hours of in-service history.
The high-MTBF, DO-254-certifiable
card has up to 4 MIL-STD-1553 channels and 16 avionics discrete I/O,
and is VITA 47 Class V3 rated for rugged environments.
For Free Info Visit http://info.hotims.com/34461-522
FPGA Development Environment
Extreme Engineering Solutions (X-ES) (Middleton, WI) offers the
XPedite2300, a Xilinx

Virtex

-6 based XMC module with support for


pluggable daughter cards for customizable I/O. In conjunction with
the XPedite2300, X-ES has announced
the XPedite2300 FPGA Development
Kit (FDK), an embedded FPGA
development environment based
on the AXI4 interface protocol. The
FDK includes IP blocks, example FPGA
designs, and software to control and communicate
with FPGAs. All of the IP blocks included in the FDK inter-
face to the industry-standard AXI4 interconnect, which enables reuse
of IP.
The XPedite2300 supports the Virtex-6 LX130T, LX195T, LX240T,
LX365T, SX315T, and SX475T FPGAs. There are initially two daughter
cards that can be mounted on the XPedite2300: a 10-bit, dual, 1.5-
GSPS (or single 3.0-GSPS) A/D daughter card, and a 14-bit, dual, 2.5-
GSPS D/A daughter card.
The module features include a conduction- or air-cooled XMC mod-
ule; two channels of DDR3 SDRAM, up to 1 GB (512 MB each); 128
MB of flash; x8 PCI Express XMC interface on the Pn5 connector;
optional super cap backup for configuration bitstream encryption key;
and configuration via PCIe, flash, and JTAG with multi-boot support.
For Free Info Visit http://info.hotims.com/34461-524
Digital Oscilloscope
Rigol Technologies (Oakwood
Village, OH) has introduced the
DS6000 series digital oscilloscope, fea-
turing up to 1 GHz bandwidth, 1.5 GHz
bandwidth differential, and single-
ended active probes. The digital oscillo-
scopes use advanced waveform search,
visualization, and replay to detect signal and device characteristics.
Rigols DS6000 series features specifications of up to 1-GHz band-
width with 5-GSa/s sample rate, a standard 140,000,000 points of deep
memory, up to 180,000 frames for waveform record and replay, and up
to 180,000 waveforms/second acquisition rate. In addition, DS6000
digital oscilloscopes offer up to 256 levels of intensity-grading display
and real-time waveform record and display, with customizable real-time
hardware filters available.
With a variety of trigger functions and automatic measurements,
Rigols DS6000 series features serial bus trigger and decodes such as
I2C, SPI, RS232, and CAN, as well as advanced math functions. Rigol
also offers a variety of probes and other accessories, including RP6150
passive probes, RP7150 active probes, arm mounts, and rack mount
kits. The device features a large 10.1" WVGA display with LED back-
lighting. DS6000 series oscilloscopes are available in 600 MHz or 1
GHz, and 2- or 4-channel varieties.
For Free Info Visit http://info.hotims.com/34461-525
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Intro
Free Info at http://info.hotims.com/34461-809
Free Info at http://info.hotims.com/34461-807
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Free Info at http://info.hotims.com/34461-811 Free Info at http://info.hotims.com/34461-813
WIRELESS
PROPAGATION
SOFTWARE
Remcoms Wireless InSite
is site-specific radio propa-
gation software for the analysis and design of wireless
communication systems. It provides efficient and
accurate predictions of propagation and communi-
cation channel characteristics in complex urban,
indoor, rural and mixed path environments.
Applications range from military defense to com-
mercial communications, including wireless links,
antenna coverage optimization, and jammer effec-
tiveness. Visit www.remcom.com/wireless-insite for
more information.
Remcom
COOL YOUR IGBT'S
WITH STELLAR'S
DBC
Stellar Industries Corp. offers
custom copper circuit pat-
terns on ceramics for medium
to high power applications
throughout the frequency spectrum from DC thru
RF/Microwave. Custom copper thicknesses from 6
microns to 12 mils are available with Stellars CPU
(Copper-Plate-Up) and DBC (Direct Bond Copper)
technologies. Stellar is Copper Power. Visit
www.stellarind.com; call (877) 840-1884; e-mail
sales@stellarind.com.
Stellar Industries
Defense Tech Briefs, December 2011 www.defensetechbriefs.com 47
LITERATURE & WEB SITE
SPOTLI GHT
Free catalogs and literature for Defense Tech Briefs readers. To order, enter the corresponding number
on the Online Reader Service Page at www.defensetechbriefs.com/rs, or visit the appropriate URL.
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48 www.defensetechbriefs.com Defense Tech Briefs, December 2011
Published by...........................................................Tech Briefs Media Group
Publisher ...................................................................Joseph T. Pramberger
Editorial Director .......................................................................Linda L. Bell
Editor, DTB, PTB and Embedded Technology ..........................Bruce A. Bennett
Technical/Managing Editor .........................................................Ted Selinsky
Technical Writers.......................................................................Shirl Phelps
Nick Lukianoff
Editor, Green Design & Manufacturing........................................Kendra Smith
Editor, Medical Design Briefs.......................................................Emily Chang
Associate Editor .........................................................................Billy Hurley
Production Manager ...........................................................Adam Santiago
Production Manager ......................................................Cortney Silva
Art Director ............................................................................Lois Erlacher
Designer...............................................................Bernadette Torres
Marketing Director..............................................................Debora Rothwell
Circulation Manager..............................................................Marie Claussell
Circulation/Audience Development Coordinator .....................Brandie Denlinger
TECH BRIEFS MEDIA GROUP
261 Fifth Avenue, Suite 1901, New York, NY 10016
(212) 490-3999 FAX (212) 986-7864
Chief Executive Officer .................................................Domenic A. Mucchetti
Executive Vice-President ........................................................Luke Schnirring
Technology Director...............................................................Oliver Rockwell
Systems Administrator ...........................................................Albert Sunseri
Web Developer .....................................................................Karina Adames
Online Content Manager/Web Developer ...........................................Peter Bonavita
Digital Media Producer ..................................................................................Phil Abalos
Credit/Collection......................................................................Felecia Lahey
Accounting/Human Resources Manager.........................................Sylvia Ruiz
Office Manager....................................................................Alfredo Vasquez
Receptionist ............................................................Elizabeth Brache-Torres
DEFENSE TECH BRIEFS ADVERTISING ACCOUNT EXECUTIVES
CT, MA, NH, ME, VT, RI, Eastern Canada.......................................Ed Marecki
.........................................................................................Tatiana Marecki
at (401) 351-0274
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at (973) 545-2132
NY .....................................................................................Stan Greenfield
at (203) 938-2418
VA, MD, DC, NC, SC, GA, FL, AL, TN, MS, LA, AR, OK, TX, WV ....Ray Tompkins
at (281) 313-1004
Western NY, OH, MI, IN .........................................................Ryan Beckman
at (973) 409-4687
MN, ND, SD, WI, IL, KY, MO, KS, IA, NE, Central Canada.................Bob Casey
at (847) 223-5225
Northwest, N. Calif., Western Canada........................................Craig Pitcher
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CO, UT, MT, WY, ID, NM.............................................................Tim Powers
at (973) 409-4762
S. Calif., AZ, NV............................................................................Tom Boris
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at (973) 409-4686
Angelo Danza
at (973) 874-0271
Michael Barboza
at (973) 545-2565
Reprints ....................................................................................Jill Kaletha
at (866) 879-9144, x168
www.defensetechbriefs.com
ADVERTISERS INDEX
ACCES I/O Products ................................................801 ............................21
AeroCon 2012 ............................................................798 ............................29
Agilent Technologies ................................................785 ............................11
Boyd Coating Research Co., Inc. ..............................796 ............................46
COMSOL, Inc.....................................................779, 813 ........................3, 47
Concept Group, Inc. ..................................................783 ..............................8
CST of America ..........................................................789 ..................COV III
Deposition Sciences, Inc. ..........................................782 ..............................7
Douglas Electrical Components................................790 ............................32
Electron Co., Ltd. ......................................................788 ............................28
Elma Electronics Inc. ................................................802 ............................27
EMCO High Voltage Corporation ............................794 ............................45
FEKO EM Software & Systems (USA), Inc. ..........804 ............................39
GT Advanced Technologies ......................................797 ............................46
Hawthorne Rubber Mfg. Corp. ................................807 ............................47
M.S. Kennedy Corporation........................................781 ..............................6
Mini-Systems, Inc. ......................................................793 ............................35
Minitab........................................................................799....................COV IV
Moxtek, Inc.................................................................803 ............................25
National Instruments ................................................776 ....................COV II
NuSil Technology ......................................................780 ..............................5
Omega Engineering ..........................................777, 808 ........................1, 47
Omicron USA ............................................................800 ............................19
PEI-Genesis ................................................................786 ............................12
Photon Engineering ..................................................792 ............................33
Rakon Ltd. ..................................................................791 ............................27
Remcom......................................................................809 ............................47
S.I. Tech ......................................................................810 ............................47
Schott North America, Inc. ......................................784 ..............................9
SmallPC.com ..............................................................811 ............................47
Stellar Industries Corporation ..................................812 ............................47
Tadiran Batteries ........................................................787 ............................13
Thermacore, Inc.........................................................778 ..............................2
Voltage Multipliers, Inc. ............................................795 ............................45
W.L. Gore............................................................805, 806 ......................42, 43
For free product literature, enter advertisers reader service numbers at www.techbriefs.com/rs, or visit the
Web site beneath their ad in this issue.
Reader Service
Company Number Page
Reader Service
Company Number Page
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CHANGING THE STANDARDS
RCS & Surface Current Simulation
of a Helicopter
CST COMPUTER SIMULATION TECHNOLOGY | www.cst.com | info@cst.com
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Intro
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Intro

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