Zero flagFrom Wikipedia, the free encyclopediaJump to: navigation, search The Zero Flag is a single bit flag

that is a central feature on most conventiona l CPU architectures (including x86, ARM, PDP-11, 68000 and numerous others). It is often stored in a dedicated register, typically called status register or fla g register, along with other flags. The zero flag is typically abbreviated Z or ZF or similar in most documentation and assembly languages. Along with a carry flag, a sign flag and an overflow flag, the zero flag is used to check the result of an arithmetic operation, including bitwise logical instr uctions. It is set if an arithmetic result is zero, and reset otherwise. This in cludes results which are not stored, as most traditional instruction sets implem ent the compare instruction as a subtract where the result is discarded. It is a lso common that processors have a bitwise AND-instruction that does not store th e result. In most processors, the zero flag is mainly used in conditional branch instructi ons, which alter control flow on previous instruction results, but there are oft en other uses as well. In some instruction sets such as the MIPS architecture, a dedicated flag registe r is not used; jump instructions instead check a register for zero.

Status registerFrom Wikipedia, the free encyclopediaJump to: navigation, search A status register or flag register (also: condition code register, program statu s word, PSW, etc.) is a collection of flag bits for a processor. An example is t he FLAGS register of the x86 architecture. The status register is a hardware register which contains information about proc ess state. Individual bits are implicitly or explicitly read and/or written by t he machine code instructions executing on the processor. The status register in a traditional processor design includes at least three central flags: Zero, Carr y, and Overflow, which are tested via the condition codes that are part of many machine code instructions. A status register may often have other fields as well , such as more specialized flags, interrupt enable bits, and similar types of in formation. During an interrupt, the status of the thread currently executing can be preserved (and later recalled) by storing the current value of the status re gister along with the program counter and other active registers into the machin e stack or a reserved area of memory. [edit] The most common flagsFlag Name Description Z Zero flag Indicates that the result of an arithmetic or logical operation (or, sometimes, a load) was zero. C Carry flag Enables numbers larger than a single word to be added/subtracted by carrying a binary digit from a less significant word to the least significant b it of a more significant word as needed. It is also used to extend bit shifts an d rotates in a similar manner on many processors (sometimes done via a dedicated X flag). S / N Sign flag / Negative flag Indicates that the result of a mathematical oper ation is negative. In some processors,[1] the N and S flags are distinct with di fferent meanings and usage: One indicates whether the last result was negative w hereas the other indicates whether a subtraction or addition has taken place. V / O / W Overflow flag Indicates that the signed result of an operation is too large to fit in the register width using twos complement representation. P Parity flag Indicates whether the number of set bits of the last result is odd or even.

[edit] See alsoControl register Flag byte Flag (computing) FLAGS register (computing)

Carry flagFrom Wikipedia, the free encyclopediaJump to: navigation, search In computer processors the carry flag (usually indicated as the C flag) is a sin gle bit in a system status (flag) register used to indicate when an arithmetic c arry or borrow has been generated out of the most significant ALU bit position. The carry flag enables numbers larger than a single ALU width to be added/subtra cted by carrying (adding) a binary digit from a partial addition/subtraction to the least significant bit position of a more significant word. It is also used t o extend bit shifts and rotates in a similar manner on many processors (sometime s done via a dedicated X flag). For subtractive operations, two (opposite) conve ntions are employed as most machines sets the carry flag on borrow while some ma chines (such as the 6502 and the PIC) instead resets the carry flag on borrow (a nd vice versa). Negative flagFrom Wikipedia, the free encyclopediaJump to: navigation, search This article does not cite any references or sources. Please help improve this article by adding citations to reliable sources. Unsourced material may be chall enged and removed. (December 2009) In computer processor the negative flag or sign flag is a single bit in a system status (flag) register used to indicate whether the result of last mathematic o peration resulted in a value whose most significant bit was set. In a two's comp lement interpretation of the result, the negative flag is set if the result was negative. For example, in an 8-bit signed number system, -37 will be represented as 1101 1 011 in binary (the most significant bit is 1), while +37 will be represented as 0010 0101 (the most significant bit is 0). The negative flag is changed in the x86 series processors by the following instr uctions (referring to the Intel 80386 manual [1]): All arithmetic operations except multiplication and division; compare instructions (equivalent to subtract instructions without storing the re sult); Logical instructions - XOR, AND, OR; Overflow flagFrom Wikipedia, the free encyclopediaJump to: navigation, search This article needs additional citations for verification. Please help improve t his article by adding citations to reliable sources. Unsourced material may be c hallenged and removed. (January 2008) In computer processors, the overflow flag (sometimes called V flag) is usually a single bit in a system status register used to indicate when an arithmetic over flow has occurred in an operation, indicating that the signed two's-complement r esult would not fit in the number of bits used for the operation (the ALU width) . Some architectures may be configured to automatically generate an exception on an operation resulting in overflow. Although not very precise, the overflow flag could be considered a two's complem ent form of a carry flag, but the typical usage is quite different.

An illustrative example is what happens if we add 127 and 127 using 8-bit regist ers. 127+127 is 254, but using 8-bit aritmetics the result would be 1111 1110 bi nary, which is -2 in two's complement, and thus negative. A negative result out of positive operands (or vice versa) is an overflow. The overflow flag would the n be set so the program can be aware of the problem and mitigate this or signal an error. The overflow flag is thus set when the most significant bit (here cons idered the sign bit) is changed by adding two numbers with the same sign (or sub tracting two numbers with opposite signs). Overflow never occurs when the sign o f two addition operands are different (or the sign of two subtraction operands a re the same). Internally, the overflow flag is usually generated by an exclusive or of the int ernal carry into and out of the sign bit. As the sign bit is the same as the mos t significant bit of a number considered unsigned, the overflow flag is "meaning less" and normally ignored when unsigned numbers are added or subtracted. The overflow flag is typically changed by all arithmetic operations, including c ompare instructions (equivalent to a subtract instruction without storing the re sult). In many processor architectures, the overflow flag is cleared by bitwise operations (and, or, xor, not), possibly including shifts and rotates, but it ma y also be left undefined by these. Instructions such as multiply and divide ofte n leave the flag undefined, or affected by the last partial result. [edit] Notes and referencesRetrieved from "http://en.wikipedia.org/w/index.php?t itle=Overflow_flag&oldid=459349427" View page ratingsRate this page Rate this page Page ratings What's this?Current average ratings. Trustworthy Objective Complete Well-written I am highly knowledgeable about this topic (optional) I have a relevant college/university degreeIt is part of my professionIt ep personal passionThe source of my knowledge is not listed here I would help improve Wikipedia, send me an e-mail (optional) We will send you a ation e-mail. We will not share your e-mail address with outside parties our feedback privacy statement.Submit ratings is a de like to confirm as per

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Parity flagFrom Wikipedia, the free encyclopediaJump to: navigation, search In computer processors the parity flag indicates if the number of set bits is od d or even in the binary representation of the result of the last operation. It i s normally a single bit in a processor status register. For example, assume a machine where a set parity flag indicates even parity. If the result of the last operation were 26 (11010 in binary), the parity flag woul d be 0 since the number of set bits is odd. Similarly, if the result were 102 (1 100110 in binary) then the parity flag would be 1. [edit] x86 ProcessorsIn x86 processors, the parity flag reflects the parity only of the least significant byte of the result, and is set if the number of set bi ts of ones is even. According to 80386 Intel manual, the parity flag is changed in the x86 processor family by the following instructions: All arithmetic instructions; Compare instruction (equivalent to a subtract instruction without storing the re sult); Logical instructions - XOR, AND, OR; the TEST instruction (equivalent to the AND instruction without storing the resu lt). the POPF instruction The parity flag is usually used in conditional jumps, where e.g. the JP instruct ion jumps to the given target when the parity flag is set and the JNP instructio n jumps if it is not set. The flag may be also read directly with instructions s uch as PUSHF, which pushes the flags register on the stack. One common reason to test the parity flag actually has nothing to do with parity . The FPU has four condition flags (C0 to C3), but they can not be tested direct ly, and must instead be first copied to the flags register. When this happens, C 0 is placed in the carry flag, C2 in the parity flag and C3 in the zero flag[1]. The C2 flag is set when e.g. incomparable floating point values (NaN or unsuppo rted format) are compared with the FUCOM instructions.