Professional Documents
Culture Documents
by Michael Tse
September 2003
CONTENTS
1. Introduction
1.1 Types of lters 1.2 Monolithic lters 1.3 Integrators 1.4 Simple rst-order gm-C lters
2.
3.
4.
Realization of Transconductors
4.1 BJT transconductors 4.2 MOSFET transconductors 4.3 Exercise
Michael Tse: HF Filter Design 2
1. INTRODUCTION
1920 1960 1970
Basic forms: LC-Ladders Due to the advent of op-amps, ACTIVE RC lters became popular. Miniaturization leads to IC lters which use monolithic technology for active components and thin-lms for frequency determining components (C,R). IC monolithic lters became popular.
1980
Advantages:
Less components, smaller volume Good matching of components Automatic tuning correct transfer functions for process/temp variations Smaller parasitic caps on chip Fabricated in large quantity
Michael Tse: HF Filter Design 3
0011001110010
D/A
0011001110010
Since we are dealing with high-frequency design, we will focus on Analog Continuous-time Filters in these notes
1.2.2 MOS lters High voltage gain Properties High output drive High frequency (up to ~100 MHz) 1. Low power 2. High packing density Low noise and offsets 3. High noise immunity 4. Ease of design 5. Ease of scaling 6. High frequency (up to ~100 MHz)
n x R m x C C int
Ri
Mi
Vi Ri
+
Vo
Design notes:
1. Nonlinearity of MOSFETS is mainly second-order. Thus, MOSFET-C integrators must be designed in BALANCED FORM in order to cancel even harmonics. 2. It is difcult to implement good MOS op-amps. Usually, BiMOS technology is used for MOSFETC integrator lters. 3. It is also possible to tune the frequency using the transconductance instead of the MOSFET resistance.
With MOSFET-C integrators, the tuning problem can be solved by varying the gate voltage of Mi --> Ri --> ti .
transconductance
Vi
gm
i = Vi g m
Vi
gmi gm
n x gm Vo C int
Vo =
n g V mi i
i=1 jwCeff
m j =1
mCV j j
j=1 Ceff
We can control t i = Ceff/gmi by tuning the transconductance. Note: The transfer function suffers from loading effects, which depend on the summation cap Cj. The gain gm is a design parameter (whereas in activeRC, the op-amp gain doesnt matter).
C j
9
Vout k1 s + k0 = Vi n s + w0
Gm-C realisation:
g m
Vin
+g m
2 CA
Vout
CX =
Va Vb
+gm g m g m +g m +gm
g Vo = m (Va - Vb ) sC
I = g (V - Vb )
Va Vb
+gm
g m
g Vo = m (Va - Vb ) sC
+gm
I = gm (Va - Vb )
SUITABLE FOR HF
g m
11
2.1
(b)
+ gm + C
g V -V Vc + m a b sC 2
Vc is cancelled!
g V - V Vc - m a b sC 2
Vc +
1 2 Vin
Vc 1 Vin 2
+ gm +
+ gm +
+ gm +
g I = + m (Va - Vb ) 2
g I = - m (Va - Vb ) 2
Michael Tse: HF Filter Design 12
2.1
(c)
(d)
a2 s2 + a1s + a0 H(s) = K w s2 + s o + wo Qp
a2 = a1 = 0 --> LOWPASS a2 = a0 = 0 --> BANDPASS a1 = a0 = 0 --> HIGHPASS a1 = 0 --> BANDSTOP
Michael Tse: HF Filter Design 14
2
+gm
3
g m
C1
C2
Va
+g m
5 4
where w o =
Qp =
Vb Vc
+gm
C3
So, K, a0, a1, wo and Qp can be chosen by choosing gms and Cs.
Michael Tse: HF Filter Design 15
Disadvantage of cascaded biquads: Passband sensitivity to component variations tends to be too large for some applications. (A better approach is to start with LC ladder.)
Michael Tse: HF Filter Design 16
I5 IC3
+ +
Vin
VC2
C2
C 3 C4
VC4
R5 Vout
Vi n - VC 2 R1 V V (sC2 + sC3 )VC 2 - sC3VC 4 + C 2 = i n - IL 3 R1 R1 sC2VC 2 + I L 3 + sC3 (VC 2 - VC 4 ) = VC 2 + VC 2 CV Vi n IL3 = 3 C4 + s(C2 + C3 )R1 C2 + C3 sR1 (C1 + C3 ) s(C2 + C3 )
Michael Tse: HF Filter Design 17
I5 IC3
+ +
Vin
1 sR1 (C2 + C3 )
VC2
C3 C2 + C3
VC4 OR Vin
Vin
VC2
C2
C 3 C4
VC4
R5 Vout
1 sR1 (C2 + C3 )
-1 s(C2 + C3 )
C3 VC2 C2 + C3
VC4
IL3 1
1 sR1 (C2 + C3 )
1
Combining similar factors together
Michael Tse: HF Filter Design
R1IL3
18
Vout = I L 3 + sC3 (VC 2 - VC 4 ) R5 -V s(C4 + C3 )VC 4 = out + IL 3 + sC3VC 2 R5 -Vout IL3 CV VC 4 = + + 3 C2 sR5 (C3 + C4 ) s(C3 + C4 ) C3 + C4 sC4 VC 4 +
C3 C3 + C4
I5 IC3
+ +
Vin
VC2
C2
C 3 C4
VC4
R5 Vout
VC2
VC4
1 1
1 sR5 (C3 + C4 )
Vout
VC2
C3 C3 + C4
VC4
Vout
1 s(C3 + C4 )
1 sR5 (C3 + C4 )
IL3
1
R5IL3
19
sL3 IL 3 = VC 2 - VC 4 VC 2 - VC 4 IL 3 = sL3
VC2
IL3 L 3 R1 I 1 I 3
+ +
I5 IC3
+ +
Vin
VC2
C2
C 3 C4
VC4
R5 Vout
VC4
1 sL3
IL3
20
IL3 L 3 R1 I 1 I 3
+
I5 IC3
+ +
Vin
C3 C2 + C3
VC2
C2
C 3 C4
VC4
R5 Vout
Vin
1 1
VC2
C3 C4 + C3
1
1 sR1 (C2 + C3 )
1
R1 sL3
VC4
1 1
Vout
1 sR1 (C3 + C4 )
R1IL3
Michael Tse: HF Filter Design
R1 = R5
21
VC2
C3
VC4
C2
C4
C3
+gm g m +gm
gm
Vin
+gm
VC2
VC4
Vout
C2
gm
C L3
C4
4. REALISATION OF TRANSCONDUCTORS
Transconductors (gm blocks) can be realized in BJT form or MOSFET form.
Bipolar: 1. Fixed transconductor cascaded with gain cell. A xed transconductor is usually a differential pair linearized by resistor degeneration. Differential input stage with multiple inputs, with transistor scaling for better linearity. MOS: 1. Fixed-bias triode MOS transistor as resistor. Multiple outputs are possible using mirrors. Varying-bias triode MOS transistor as resistor. Differential input with constant drain-source current.
2.
2.
3.
To avoid confusion, in the next pages, we use Gm to stand for the transconductance of the whole block, and gm for the transistors.
Michael Tse: HF Filter Design 23
I1
Q1 i o1 i o1 Q 2
I1
I1
Q1 i o1 i o1 Q 2
I1
No bias current ows in RE. The CM voltage is nearly zero, hence larger CM range. (The base of each side must not be less than Vi/2, or the transistor will be cut off.)
+ Vi
RE /2 RE /2
+ Vi I1
RE
2I 1
I1
io1 1 = Gm = 2 Vi + RE gm
Note: Distortion due to non-constant Gm. So, linearity can be improved if RE is much greater than 1/gm of the transistor. Moreover, if Vbe is assumed xed, Vi appears purely across resistor and hence Gm = 1/RE (independent of gm).
Michael Tse: HF Filter Design 24
4.1 BJT Transconductors (cont) Finding the Gm for this xed transconductance
Half-circuit equivalent model:
I1
Q1 i o1 i o1 Q 2
I1
io1 +
vbe
r
RE/2
+ Vi
RE /2 RE /2
Vi 2
gmvbe
2I 1
Vi rp 1 io1 = gm = Vi RE 2 2 r + b + RE p 2 gm
io1 1 = Gm = 2 Vi + RE gm
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Q3
Q4
level shifter
I2
I2
+ Vi I1
Q1
Q2
+ VLS
+ VLS
Q5 Q6
i o1
RE 2I 2
I1
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4.2 MOSFET Transconductors Fixed-bias triode MOSFETusing a MOSFET operating in triode region to simulate a resistor
I1
Q5 Q1 Q2
I1
Q6
Transconductance is
Gm =
I 1 + i o1
Q8
V+
i
Vi
I 1 i o1
Vc
Q9
Q7
Q3
Q4
I2
I2
27
I1 i o1
Q3 and Q4 are in triode region and undergo varying bias conditions (because their gates are not connected to xed bias.) Why is linearity improved? Try the exercise on next page.
Transconductance is
V2 I1
Q4
Gm =
I1
m Cox W where kn = 2 L n
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EXERCISE Consider the circuit of the previous page. Suppose I1 = 100A, Cox = 96A/V2, (W/L)1 = (W/L)2 = 20, (W/L)3 = 3, and V2 = 0. (a) Assuming a perfectly linear transconductor, nd io1 when V1=2.5mV and 250mV, using the formula given in the previous page. (b) Assume the gates of Q3 and Q4 are connected to ground and use classical models for both the triode and active regions. Find the true value of io1 when V1=2.5mV and 250mV. Compare your results with those found in (a). (c) Repeat (b), assuming the gates of Q3 and Q4 are connected to the input signals as shown in the circuit. (d) Comment on the linearity improvement, if any, when varying bias triode transistor is used.
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