1.

In a common emitter amplifier , the unbypassed emitter resistance provides (GATE EE 1992) (a) Voltage-shunt feedback (b) Current series feedback (c) Negative-voltage feedback (d) Positive current feedback 2. An ideal OP-AMP is used to make an inverting amplifier . The two input terminals of the OP-AMP are at the same potential because (GATE EE 1992) (a) The two input terminals are directly shorted internally (b) The input impedance of the OP-AMP is infinity (c) The open loop gain of the OP-AMP is infinity (d) CMRR is infinity 3. In an RC- coupled common emitter amplifier , which of the following is true ? (GATE EE 1992) (a) Coupling capacitance affects the hf response and bypass capacitance affects the If response (b) Both Coupling and bypass capacitances affects the If response only (c) Both Coupling and bypass capacitance affects the hf response only (d) Coupling capacitance affects the If response and bypass capacitance affects the hf response 4. The circuit shown in the figure is excited by the input Vi as shown . Sketch the waveforms of the output V0 , including the silent values. Assume all components to be ideal. (GATE EE 1992)

Vi V0 Vi

t / sec

5. In the following circuit(Figure) the 5V zener diode requires a minimum current of 10mA . For obtaining a regulated output of 5V, the maximum permisable load current , IL is .. mA and the minimum power rating of zener diode is W. (GATE EE 1992)

C V0

R C R R et R

6. In a dual slope integrating typw digital voltmeter the first integration is carried out for 10 periods of the supply frequency of 50Hz. If the reference voltage used is 2V, the total conversion time for an input 1V is ..sec. (GATE EE 1992) 7. A CRO screen has 10 divisions on the horizontal scale. If a voltage signal 5sin ( 314t + 450 ) is examined with a line base settings of 5 m sec / div, the number of cycles of signal displayed on the screen will be (GATE EE 1993) (a) 0.5 cycles (b) 2.5 cycles (c) 5 cycles (d) 10 cycles 8. A Lissajous pattern , as shown in Figure , is observed on the screen of a CRO when voltages of frequencies fx and fy are applied to the x and y plates repectively , fx : fy is then equal to (GATE EE 1994)

(a) 3 : 2 (b) 1 : 2 (c) 2 : 3 (d) 2 : 1 9. In the transistor circuit shown in figure , collector to ground voltage is +20 V. Which of the following is the probable cause of error ? (GATE EE 1994) (a) Collector-emitter terminals shorted +20V (b) Emitter to ground connection open 10K (c) 10 kohm resistor open (d) collector-base terminals shorted +10V 47K

10. A piezo-electric pick up is an example for an active transducer (TRUE / FALSE) (GATE EE 1994) 11. A practical RC sinusoidal oscillator is built using a positive feedback amplifier with a closed loop-gain slightly less than unity. (GATE EE 1994) 12. An analog comparator is a high-gain amplifier whose output is always either in positive or in negative saturation (GATE EE 1994) 13. Given figure shows a two-stage small signal transistor feedback amplifier. Match the defective component with its probable effect on the circuit. (GATE EE 1994) VCC

R1 R5 C1

RC1

C2 TR1

R1 TR2

RC2

C5

V0

VS

R2

Re1

R2

Re2

C3

C4

RF

(P) All dc voltages normal , v0 increases marginally (Q) Collector of TRZ is at VCC ,v0 = 0 (R) All dc voltages normal, gain of 2nd stage increase V0 decrease (d) Rc2 is shorted (S) All dc voltages normal, v0 = 0 (T) All dc voltages normal, overall gain of the amplifie increases , v0 increases (U) no change 14. Given figure , shows a non-inverting op-amp summer with V1= 2V and V2 = -1V . The output voltage V0 = . (GATE EE 1994) 2R R R +2V R R V0

(a) Capacitor C1 is open (b) Capacitor C3 is open (c) Capacitor C4 is open

15. A certain oscilloscope with 4 cm by 4cm screen has its own sweep output fed to its input. If the x and y sensitivities are same , the oscilloscope will display a (GATE EE 1995) (a) Triangular wave (b) Dioganal line (c) sine wave (d) Triangular 16. Fringing in a capacitive type transducer can be minimized by providing a . (GATE EE 1995) 17. The common mode voltage of a unity gain op-amp buffer in terms of its output voltage V0 is .. (GATE EE 1995) 18. An oscilloscope is operated in X-Y mode, The figure in 8 is displayed on the oscilloscope screen. If the frequency of the X-input is 1 kHz , the Y-input frequency is. (GATE EE 1995) 19. The depletion region of space charge region or transition region in a semiconductor pn junction diode has (GATE EE 1996) (a) electrons and holes (b) positive ions and electrons (c) positive ions and negative ions (d) negative ions and holes (e) no ions, electrons or holes 20. A non-inverting Op-Amp is shown in the figure . The output voltage V0 is (GATE EE 1996) (a) ( 3 / 2 ) sin (100t ) 2R (b) 3sin (100t ) (c) 2sin (100t ) (d) none R -2V R [2 + sin 100t ] 21. In the transistor amplifier shown in the figure , the ratio of small signal voltage gain, when the emitter resistor Re is bypassed by the capacitor Ce to when it not bypassed, assuming simplified approximate h-paraneter model for transistor, is (GATE EE 1996) (a) 1 VCC (b) h fe (c)

V0

(1 + h ) R
fe

(d) 1 +

(1 + h ) R
fe

hie

R1
e

RC

CC

V0

hie

Vi

Cb R2 Re Ce

22. Let the magniotuide of the gain in the inverting Op-Amp amplifier circuit shown in be x with switch S1 open. When the switch S1 is closed , the magnituide of gain becomes (GATE EE 1996) S1 (a) x / 2 (b) x R R (c) 2x (d) 2x Vi R V0

23.In an oscilloscope , the input to the horizontal plates is a 100 Hz voltage signal. The Lissajious pattern (A),(B) and (C) will be generated when different frequency voltages signals are applied to vertical plates. Match each Lissajous pattern to the corresponding frequency fy . (GATE EE 1996) (P) fy = 50 (Q) fy = 66.66 (R) fy = 125 (S) fy = 150 (T) fy = 200 (U) fy = 300

(a)

(b)

(c)

24. A major advantage of active filters is that they can be realized with out using (GATE EE 1997) (a) op-amps (b) inductors (c) resistors (d) capacitors 25. A differentiator has transfer function whose (GATE EE 1997) (a) phase increases linearly with frequency (b) amplituide remains constant (c) amplituide increase linearly with frequency (d) amplituide decreases linearly with frequency

26. Introduction of integral action in the forward path of a unity feedback system results in a (GATE EE 1997) (a) marginally stable system (b) system with no steady state error (c) system with increased stability margin (d) system with better speed of response 27. The circuit shown in the figure , acts as a . And for the given inputs , its output voltage is . V (GATE EE 1997) 1k ohm 1V 2V 1k 1k V0

28. For an input signal of 4 sin 10t, the voltage across the resistance R in the circuit shown in figure, is . V (GATE EE 1997) +12V Input

R R -12V 29. For the differential amplifier circuit shown in figure,determine the defferential gain , the commom mode gain and the common mode rejection ratio. (GATE EE 1997) + 12V 2k V01 T1 RC1000 V1 T2 100 RS V2 2k V02 T1 and T2 are identical with the h-parameters hie = 2k, hre = 8*10 , hfe = 100, hoe is neglisable

Re

1k

30. Determine the frequency of oscillation of the circuit shown in figure. Assume the opamp to be ideal. (GATE EE 1997) 1k 2k

V0 4.7 F

1k

1k

4.7 F

31. Figure shows the electrostatic vertical deflection system of CRT . Given that VA is the accelerating voltage, the deflection sensitivity (deflection / volt) is proportional to (GATE EE 1998) LLs (a) +d/2 L +VD electron trajectory dVA LLsVD (b) e beam dVA LLs (c) VA -d/2 Deflection plates LS Fluorescent screen d dLs (d) LVA 32. Match the following Circuit (GATE EE 1998) Function

(A)

( P ) High pass filter ( Q ) Amplifier

( R)Comparator

( S ) Low pass filter

(B)

(C)

33. A NPN , silicon transistor is meant for low current audio amplification, Match its following characteristics against their values (GATE EE 1998) Characteristics Values (P) 0.7 V (A) VEB, max (B) VCB, max (Q) 0.2 V (C) VCE, max (R) 6V (S) 50 V 34. An electron moves in the X-Y plane with a speed of 106 m / s. Its velocity vector makes an angle of 600 with X axis . A magnetic field of magnituide 10-2 T exists along the Y axis . Compute the magnetic force excerted on the electron and its direction (GATE EE 1998) 35. Show that the circuit given in Figure will work as an oscillator at 1 f = , if R1 = 2 R2 . Is (GATE EE 1998) 2 RC R2 R1

V0

36. An enhancement type n-channel MOSFET is represented by the sysmbol (GATE EE 1999)

(a)

(b)

(c)

(d)

37. As the temperature is ncreased , the voltage across a diode carrying a diode carrying a constant current (GATE EE 1999) (a) increases (b) decreases (c) remains constant (d) may increase or decrease depending upon the doping levels in the junctions 38. A single channel digital storage oscilloscope uses a 10 bit , 107 samples per second Analog-to-Digital converter. For a 100 kHz sine wave input , the number of samples taken per cycle of the input will be (GATE EE 1999) (a) 107 (b) 104 (c) 103 (d) 102 39. The color code of a 1 kohm resistance is (GATE EE 1999) (a) black, brown, red (b) red, brown, brown (c) brown, black, red (d) black, black, red 40. For the small signal BJT amplifier shown in given figure. Determine at 1 kHz , the following (a) quiescent collector current, IcQ (b) small signal voltage gain , ( v0 / vi ) ; (c) maximum possible swing of the collector current +5V RB 420k RC 1k 25 F (GATE EE 1999)

V0

V1

25 F +0.7

RB

100

41. The input voltage vi in the given citrcuit is a 1 kHz sine-wave of 1 V amplituide. Assume ideal operational amplifiers with 15 V DC supply. Sketch on a single diagram the waveforms of the voltages vi' , V0 , and v1 shown, indicating the peak value of v1 and the average value v0. (GATE EE 1999) 10k 5k Vi 1k V0 100 F 9

42. The circuit shown in the figure uses an ideal op-amp working with +5V and 5V power supplies. The output voltage V0 is equal to (GATE EE 2000) (a) +5V 1k (b) 5V +5V (c) +1V (d) 1V V0 1mA -5V

43. The type of power amplifier which exhibits crossover distortion in its output is (GATE EE 2000) (a) Class A (b) Class B (c) Class AB (d) Class C 44. The feedback factor for the circuit shown in Figure is (GATE EE 2000) 100

VS 10 ohms

900

1k

(a) 9 / 100 (b) 9 / 10 (c) 1 / 9 (d) 1 / 10 45. An analogue electronic circuit that measures rms value of the input voltage by averaging the square of the instantaneous voltage level, responds slowly to changes in the input signal due to (GATE EE 2000) (a) the square function built into the circuit (b) the square-root function built into the circuit (c) the averaging function built into the circuit (d) none V 46. A diode whose terminal characteristics are related as iD = I s , where Is is the VT reverse saturation current and VT is the thermal voltage (= 25 mA) , is biased at ID = 2 mA . Its dynamic resistance is (GATE EE 2000) (a) 25 ohms (b) 12.5 ohms (c) 50 ohms (d) 100 ohms 47. In the circuit shown in figure , the value of the base current IB will be (GATE EE 2000)

10

5V 5k

IB 0.7

= 50

-10V (b) 18.2 A (c) 26.7 A (d) 40.0 A (a) 0.0 A 48. An active filter consisting of an op-amp , resistors R1, R2, R3 and two capacitors of s ( R1C ) value C each, has a transfer function T ( s ) = where R = R1 R2 . If R1 2s 1 2 s + + ( R3C ) ( RR3C 2 ) = 2 kohms, R2 = 2/3 kohms, R3 = 200 kohms and C = 0.1 F, determine the center frequency 0 and A0 and the Q of the filter. (GATE EE 2000) 49. In the single-stage transistor amplifier circuit shown in the figure, the capacitor CE is removed. Then , the ac small-signal midband voltage gain of the amplifier (GATE EE 2001) (a) increases (b) decreases +12V (c) is unaffected (d) drops to zero out put Vi

CE

50. An op-amp has an open loop gain of 105 and an open-loop upper cut-off frequency of 10 Hz. If this op-amp is connected as an amplifier with a closed-loop gain of 100, hen the new upper cut-off frequency is (GATE EE 2001) (a) 10 Hz (b) 100 Hz (c) 10 kHz (d) 100 kHz 51. For the oscillator circuit shown in figure , the expressions for the time period of oscillation can be given by (where = RC ) (GATE EE 2001)

11

(a) ln 3 (b) 2 ln 3 (c) ln 2 (d) 2 ln 2

R V0

R R

52. An op-amp , having a slew rte of 62.8 V / sec, is connected in a voltage follower configuration . If the maximum amplituide of the input sinusoidal is 10 V, then the minimum frequency at which the slew rate limited distortion would set in at the output is (GATE EE 2001) (a) 1.0 MHz (b) 6.28 MHz (c) 10.0 MHz (d) 62.8 MHz 53. An n-channel JFET, having a pinch-off voltage (Vp) of 5V, shows a transconduction (gm) of 1 mA / V when the applied gate-to-source voltage (VGS) is 3 V. Its maximum transconductance (in mA/V ) is (GATE EE 2001) (a) 1.5 (b) 2.0 (c) 2.5 (d) 3.0 54. For the op-amp circuit shown in figure, determine the output voltage v0 . Assume that the op-amps are ideal. (GATE EE 2001) 1k 2k 4k 8k 1V V0 3k -1V

1k

55. The transistor in the amplifier circuit shown in figure is biased at IC = 1 mA. Use VT ( = KT / q ) = 26mV , 0 = 200, rb = 0, and r0 . (a) Determine the ac small-signal midband voltage gain v0 / vi of the circuit (b) Determine the required value of CE for the circuit ton have a lower cut-off frequency off 10 Hz. (GATE EE 2001)

12

VCC RC 1k V0 Vi RB 25k

RE 100

CE

56. A simple active filter is shown in figure. Assume ideal op-amp . Derive the transfer function v0 / vi of the circuit, and state the type of the filter (i.e., high pass , low pass , band pass, or band reject). Determine the required values of R1, R2, and C in order for the filter to have a 3-dB frequency of 1 kHz, a high frequency input resistance of 100 kohms, and a high frequency gain magnituide of 10. (GATE EE 2001) R2 Vi R1 C V0

57. Two in phase , 50 Hz sinusoidal waveforms if unit amplituide are fed into channel 1 and channel 2 respectively of an oscilloscope. Assuming that the voltage scale , time scale and the other settings are exactly the same for both the channels , what would be observed if the oscilloscope is operated in X-Y mode ? (GATE EE 2002) (a) A circle of unit radius (b) An ellipse (c) A parabola (d) A straight line inclined at 450 with respect to the x-axis. 58. The cut-in voltage of both zener diode DZ and diode D shown in figureis 0.7V, while break-down voltage of DZ is 3.3 V and reverse breakdown voltage of D is 50 V . The other parameters can be assumed to be the same those of an ideal diode . The values of the peak output voltage (V0) are (GATE EE 2002) (a) 3.3 V in the positive half cycle and 1.4 V in the negative half cycle. (b) 4 V in the positive half cycle and 5 V in the negative half cycle (c) 3.3 V in both positive and negative half cycle (d) 4 V in both positive and negative half cycle

13

1k DZ 10 sin wt w = 314 rad/sec D V0

59. The output voltage of the Schmitt trigger shown in figure swings between +15V and 15 V . Assume that the operational amplifier is ideal. The output will change from +15V to 15 V when the instantaneous value of the input sine wave is (GATE EE 2002) (a) 5V in the positive slope only (b) 5V in the negative slope only (c) 5V in the positive slope and negative slopes (d) 3 V in the positive and negative slopes 60. For the circuit shown in the figure , IE = 1mA, = 99 and VBE = 0.7V . Determine (GATE EE 2002) (a) The current through R1 and RC 15V (b) The output voltage V0 RC 1k RF V0 (c) The value of RF

R1

17k

1mA 1k

Vy 61. Determine the transfer function for the RC network shown in the figure . This Vx network is used as a feedback circuit in an oscillator circuit shown in the figure to generate sinusoidal oscillations . Assuming that the operational amplifier is ideal, determine RF for generating these oscillations , Also , determine the oscillation frequency if R = 10 kohms and C = 100 pF. R C (GATE EE 2002) RF=
VX C R VY 1k V0

C R C

14

62. The variation of drain current with gate to sourc voltage (ID VGS characteristic) of a MOSFET is shown in figure. The MOSFET is (GATE EE 2003) (a) an n-channel depletion mode device ID (b) an n-channel enhancement mode device (c) a p-channel depletion mode device (d) a p-channel enhancement mode device 0 VGS

63. In the circuit of figure assume that the transistor has hFE = 99 and VBE = 0.7 V. The value of collector current IC of the transistor is approximately (GATE EE 2003) 3.3k 33k

4V

3.3k

12V

(a) [3.3 / 3.3]mA (b) [3.3 / (3.3+0.33)]mA (c) [3.3 / 33]mA (d) [3.3 / (33+3.3)]mA 64. For the circuit of figure with an ideal operational amplifier, the maximum phase shift of the output Vout with reference to the input Vin is (GATE EE 2003) (a) 00 R1 0 (b) -90 (c) +900 Vin R1 V0 0 (d) 180 R C

65. For the n-channel enhancement MOSFET shown in figure , the threshold voltage Vin = 2V. The drain current ID of the MOSFET is 4 mA when the drain resistance RD is 1 kohm. If the value of RD is increased to 4 kohms, drain current ID will become (GATE EE 2003) (a) 2.8 mA 10V (b) 2.0 mA ID RD (c) 1.4 mA (d) 1.0 mA

15

66. Assuming the operational amplifier to be ideal , the gain Vout / Vin for the circuit shown in figure is 10k 10k (GATE EE 2003) (a) 1 (b) 20 1k (c) 100 (d) 120 Vin 1k V0

67. A voltage signal 10sin t is applied to the circuit with ideal diodes , as shown in the figure. The maximum , and minimum values of the output waveform Vout of the circuit are respectively 10 kWohm. (GATE EE 2003) 10k

Vin

4V 10k

4V

V0

(a) +10V and 10V (b) +4V and 4V (c) +7V and 4V (d) +4V and 7V 68. The circuit of figure shows a 555 timer IC connected as an astable multivibrator. The value of the capacitor C is 10 nF . he values of the resistors RA and RB for a frequency of 10 kHz and a duty cycle of 0.75 for the output voltage waveform are +Vcc (GATE EE 2003) (a) RA = 3.62 k , RB = 3.62 k (b) RA = 3.62 k , RB = 7.25 k (c) RA = 7.25 k , RB = 3.62 k (d) RA = 7.25 k , RB = 7.25 k RA
V0

RB

R1 Th Tr 555 Timer IC

16

69. Group II represents the figures obtained on the CRO screen when the voltage signals Vx =Vx sin t and Vy = Vym sin( t + ) are given to its X and Y plates respectively and V is changed. Choose the correct value of from Group I to match with the corresponding figure of the group II Group I Group II (GATE EE 2003)
P = 0 Q =

2 3 2

R < < S = 3 2

(a) P = 1, Q = 3, R = 6, S = 5 (b) P = 2, Q = 6, R = 4, S = 5 (c) P = 2, Q = 3, R = 5, S = 4 (d) P = 1, Q = 5, R = 6, S = 6 70. In the circuit shown in the figure , the current gain ( ) of the ideal transistor is 10. Theoperating point of the transistor (Vcc , Ic ) is (GATE EE 2003) IC 10 0.5A 15V VCC 40V

(a) (40V, 4A) (b) (40V, 5A) (c) (0V, 4A) 71. The current through the zener diode in figure is 2004) (a) 33 mA 22k (b) 3.3 mA Rz = 0.1k (c) 2 mA (d) 0 mA 10V IZ Vz = 3.3V

(d) (15V, 4A) (GATE EE

R1 = 3.5 V

72. The feedback used in the circuit shown in the figure can be classified as (GATE EE 2004)

17

(a) shunt-series feedback (b) shunt-shunt feedback (c) series-shunt feedback (d) series-series feedback C=x

VCC RF RC C=x

RL RS RB RE C=x

73. The digital circuit using two inverters shown in figure will acts as (GATE EE 2004) (a) a bistable multi-vibrator (b) an astable multi-vibrator (c) a mnostable multi-vibrator (d) an oscillator 74. A BJT is used as apower control switch by biasing it in the cut-off region (OFF state) or in saturation region (ON state). In the ON state , for the BJT (GATE EE 2004) (a) both the base-emitter and base-collector junctions are reversed biased (b) the base-emitter junction is reverse biased , and the base-collector junction is forward biased (c) the base-emitter junction is forward biased , and the base-collector junction is reverse biased (d) Both the base-emitter and base-collector junctions are forward biased 75. Assuming that the diodes are ideal in figure , the current in diode D1 is (GATE EE 2004) (a) 8 mA (b) 5 mA 1k 1k (c) 0 mA (d) 3 mA D2 5V D1 8V

76. The transconductance gm of the transistor shown in figure is 10 ms. The value of the input resistance RIN is (GATE EE 2004)

18

(a) 10.0 k (b) 8.3 k (c) 5.0 k (d) 2.5 k VS

VCC 10k
C =

RC
C=

C =

V0

10k

1k

C =

77. The value of R for which the PMOS transistor in figure will be biased in linear region is (GATE EE 2004) (a) 220 +4V (b) 470 VT = -1 V (c) 680 (d) 1200 R 1mA

78. In the active filter circuit shown in the figure , if Q = 1, a pair of poles will be realized with 0 equal to (GATE EE 2004) (a) 1000 rad / sec R1 = 200 k (b) 100 rad / sec (c) 10 rad / sec 1nF 1nF (d) 1 rad / sec R2

79. The input resistance RIN ( = vx / ix ) of the circuit in figure is (a) +100 k (b) 100 k (c) +1 M (d) 1 M Vx Ix 1M 10k 100k

(GATE EE 2004)

VY

80. A CRO probe has an impedance of 500 k in parallel with a capacitance of 10pF. The probe is used to measure the voltage between P and Q as shown in figure, The measured voltage will be (GATE EE 2004) 19

(a) 3.53 V (b) 4.37 V (c) 4.54 V (d) 5.00 V 10V rms 100 kHz

100k

100k

To CRO through probe

81. Assume D1 and D2 in figure are ideal diodes. The value of current I is (GATE EE 2005) (a) 0 mA (b) 0.5 mA (c) 1 mA (d) 2 mA D1 2k 1mA(DC)

D2

2k

82. Assume that the N-channel MOSFET shown in the figure is ideal, and that its thereshold voltage is +1.0 . The voltage Vab between nodes a and b is (GATE EE 2005) (a) 5 V 1k 1k a (b) 2 V (c) 1 V (d) 0 V D 10V G 2k Vab S 2V b 83. The conduction loss versus device current characteristic of a power MOSFET is best approximated by (GATE EE 2005) (a) a parabola (b) a straight line (c) a rectangular hyperbola (d) an exponentially decaying function 84. A three-phase diode bridge rectifier is fed from a 400 V RMS, 50 Hz, 3-phase AC source . If the load is purely resistive, then peak instantaneous output voltage is equal to (GATE EE 2005) 2 400 (a) 400 V (b) 400 2 V (c) 400 V (d) 3 3 85. The simultaneous application of signals x(t) and y(t) to the horizontal and vertical plates, respectively, of an oscilloscope, produces a vertical figure of 8-display. If P and (GATE EE 2005) Q are constants , and x ( t ) = P sin ( 4t + 30 ) , then y(t) is equal to 20

(a) Q sin (4t-30) (b) Q sin (2t+15) (c) Q sin (8t+60) (d) Q sin (4t+30) 86. The common emitter amplifier shown in the figure is biased using a 1 mA ideal current source. The approximate base current value is (GATE EE 2005) (a) 0 A (b) 10 A (c) 100 A (d) 1000 A 87. consider the inverting amplifier , using an ideal op-amp shown in figure. The designer wishes to realize the input resistance seen by the small-signal source to be as large as possible while keeping the voltage gain between 10 and 25 . The upper limit on RF is 1Mohm. He value of R1 should be (GATE EE 2005) (a) infinity RF (b) 1 M ohm (c) 100 kohms Vin R1 Vout (d) 40 kohms

88. The typical frequency response of a two-stage direct coupled voltage amplifier is as shown in as below (GATE EE 2005)

Gain
(a)

Gain
(b)

frequency

frequency (c)

Gain

Gain

frequency

(d) frequency

21

89. Statement linked question

(GATE EE 2005)

Assume that the threshold voltage of the N-channel MOSFET shown in the figure is +0.75 V. The output characteristics of the MOSFET are also shown VDD = 25V 4 R = 10k 3 Vout 2 2mV 2V 1 0 VDS (V) a. The transconductance of the MOSFET is (a) 0.75 ms (b) 1 ms (c) 2ms (d) 10ms b. The voltage gain of the amplifer is (a) +5 (b) 7.5 (c) +10 (d) 10 90. The time/div and voltage/div axes of an oscilloscope have been earsed. A student connects a 1kHz , 5V p-p square wave calibration pulse to channel1 of the scope and observes the screen to be as shown in the upper trace of the figure. An unknown signal is connected to channel2 (lower trace) of the scope. If the time/div and V/div on both channels are the same , the amplituide (p-p) and period of the unknown signal are respectively (GATE EE 2006) (a) 5 V ,1 ms (b) 5V, 2ms (c) 7.5V, 2ms (d) 10V, 1ms 2V 1V 3V IDS = 4V VGS = 4V

22

91. What are the states of the three ideal diodes of the circuit shown in figure ? (GATE EE 2006) (a) D1 ON , D2 OFF, D3 OFF 1 ohm D2 1 ohm (b) D1 OFF , D2 ON, D3 OFF (c) D1 ON , D2 OFF, D3 ON (d) D1 OFF , D2 ON, D3 ON 10V D1 1ohm D3 5A

92. Assuming the diodes D1 and D2 of the circuit shown in figure to be ideal ones, the transfer characteristics of the circuit will be (GATE EE 2006)

D1 2 ohms D2 Vi 10V 5V V0

RL =

93. Consider the circuit shown in figure. If the of the transistor is 30 and ICBO is 20 nA and the input voltage is +5V , then transistor would be operating in (GATE EE 2006) +12V (a) saturation region (b) active region (c) break down region 2.2 k (d) cut-off region Vi 15k

100k

-12V 94. Statement linked questions (GATE EE 2006) It is required to design an anti-aliasing filter for an 8 bit ADC. The filter is a first order RC filter with R = 1ohm and C = 1F. The ADC is designed to span a sinusoidal signal with peak to peak amplituide equal to the full scale range of the ADC.

23

R = 1ohm

C = 1F

A/D

(b) (1 + RCs ) , 40db / decade

a. The transfer function of the filter and its roll off respectively are (a) 1/ (1 + RCs ) , 20db / decade (c) 1/ (1 + RCs ) , 40db / decade

(d) {RCs / (1 + RCs )}, 20db / decade b. What is the SNR of the ADC ? Also find the frequency at the filter output at which the filter attenuation just exceeds the SNR of the ADC. (a) 50 dB, 2 decades (b) 50 dB, 2.5 decades (c) 60 dB, 2 decades (d) 60 dB, 2.5 decades 95. The common emitter forward current gain of the transistor shown is F = 100 The transistor is operating in (GATE EE 2007) (a) saturation region +VCC (b) cut-off region 1k (c) Reverse active region (d) Forward active region 270 k

1k

96. The three-terminal linear voltage regulatior is connected to a 10ohm load resistor as shown in the figure. If Vin is 10 V, what is the power dissipated in the transistor ? (GATE EE 2007)

24

(a) 0.6 W (b) 2.4 W (c) 4.2 W (d) 5.4 W

+10V

Vin 6.6V

1k zener diode

RL = 10 ohms

97. The circuit shown in the figure is (a) a voltage source with voltage
rV R1 R2 r R2 (b) a voltage source with voltage V R1 r R2 V (c) a current source with current R1 + R2 r R2 V (d) a current source with current R1 + R2 r

(GATE EE 2007)

R1

R2 load r 98. The probes of a non-isolated , two channel oscilloscope are clipped to points A, B and C in the circuit of the adjacent figure. Vin is a square wave of a suitable low frequency . The deisplay on Ch1 and Ch2 are as shown on the right. Then the signal and Ground probes S1,G1 and S2 ,G2 of Ch1 and Ch2 respectively are connected to points. (GATE EE 2007) (a) A, B, C, A (b) A, B, C, B (c) C, B, A, B (d) B, A, B, C

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99.The input signal Vin shown in te figure is a 1 kHz square wave voltage that alternates between +7V and 7V with a 50% duty cycle. Both transistors have the same current gain, which is large. The circuit delivers power to the load resistor RL . what is the efficiency of this circuit for the given input ? Choose the closest answer (GATE EE 2007) +10V (a) 46 % (b) 55 % (c) 63 % (d) 92 % Vin RL = 10

-10V 100. The switch S of the circuit is initially closed. It is opened at time t = 0. You may neglect the zener diode forward voltage drops. What is the behaviour of Vout for t > 0 ? (GATE EE 2007) (a) It makes a transition from 5V to +5V at t = 12.98 s (b) It makes a transition from 5V to +5V at t = 2.57 s (c) It makes a transition from +5V to -5V at t = 12.98 s (d) It makes a transition from +5V to -5V at t = 2.57 s 101. Two perfectly matched silicon transistors are connected as shown in the figure. Assuming the of the transistor to be very high and the forward voltage drop in diodes to be 0.7V, the value of current I is (GATE EE 2008) (a) 0 mA (b) 3.6 mA (c) 4.3 mA (d) 5.7 mA 102. In the voltage doubler circuit shown in the figure, the switch S is closed at t = 0. Assuming diodes D1 and D2 to be ideal ,load resistance to be infinite and initial capacitor voltages to be zero, the steady state voltage across C1 and C2 will be (GATE EE 2008) (a) Vc1 = 10V, Vc2 = 5V (b) Vc1 = 10V, Vc2 = -5V (c) Vc1 = 5V, Vc2 = 10V (d) Vc1 = 5V, Vc2 = -10V 103. Two sinusoidal signals p (1t ) = A sin (1t ) and q ( 2t ) are applied to X and Y inputs of a dual channel C.O.The signal q (2t ) will be represented as (GATE EE 2008)

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(b) q (2t ) = A sin (2t ) , 2 = 1 / 2 (d) q (2t ) = A cos ( 2t ) , 2 = 1 / 2 (c) q (2t ) = A cos (2t ) , 2 = 21 X

(a) q (2t ) = A sin (2t ) , 2 = 21

104. Statement for linked question A general filter circuit shown in figure C R2 Vi R1 V0 R3 R4 a. If R1 = R2 = RA and R3 = R4 = RB , the circuit acts as a

(GATE EE 2008)

(a) all pass filter (b) band pass filter (c) high pass filter (d) low pass filter b. The output of the filter in figure is ;The gain Vs frequency characteristic of the output (v0) will be 105. The two inputs of a CRO are fed with two stationary periodic signals . In the X-Y mode, the screen shows a figure which changes from ellipse to circle and back to ellipse with its major axis changing orientation slowly and repeatedly. The following inference can be made from this. (GATE EE 2009) (a) The signals are not sinusoidal (b) The amplituides of the signals are very close but not equal (c) The signals are sinusoidal with their frequencies very close but not equal (d) There is aconstant but small phase difference between the signals 106. The nature of the op-amp in the feedback circuit shown is (a) current-current feedback 2k (b) voltage-voltage feedback 1k (c) current-voltage feedback +6 (d) voltage-current feedback -6 Vin (GATE EE 2009)

Vout

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107. The following circuit has R = 10ohms , C = 10 F. The input voltage is a sinusoidal at 50 Hz with an rms value of 10V. under ideal conditions , the current is from the source is (GATE EE 2009) 0 (a) 10 mA leading by 90 (b) 20 mA leading by 900 (c) 10 mA leading by 900 10k R 0 (d) 10 mA lagging by 90 is VS = 10V rms, 50Hz 10k C 10micro F

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