Final Datasheet, Version 2.

06, 2003-02-21

LIN Transceiver TLE 6259-2

Automotive and Industrial

N e v e r s t o p t h i n k i n g .

Single-Wire-Transceiver
Final Datasheet
1 1.1 Overview Features

TLE 6259-2

Single-wire transceiver, suitable for LIN protocol Transmission rate up to 20 kBaud Compatible to LIN specification 1.2 Compatible to ISO 9141 functions Very low current consumption in sleep mode Control output for voltage regulator Bus short to GND protection Short circuit proof to ground and battery Overtemperature protection Ordering Code Q 67006 - A 9596

P-DSO-8-3, -6

Type TLE 6259-2G

Package P-DSO-8-3

Description The TLE 6259-2 is a monolithic integrated circuit in a P-DSO-8-3 package. It works as an interface between the protocol controller and the physical bus. The TLE 6259-2 is especially suitable to drive the bus line in LIN systems in automotive and industrial applications. Further it can be used in standard ISO9141 systems. The TLE6259-2 has a BUS short to GND feature implemented, to avoid a battery decharge. In order to reduce the current consumption, the TLE 6259-2 offers a sleep operation mode. In this mode a voltage regulator can be controlled to minimize the current consumption of the whole application. A wake-up caused by a message on the bus, enables the voltage regulator and sets the RxD output LOW until the device is switched to normal operation mode. The IC is based on the Smart Power Technology SPT which allows bipolar and CMOS control circuitry in accordance with DMOS power devices existing on the same monolithic circuit. The TLE 6259-2 is designed to withstand the severe conditions of automotive applications.

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1.2

Pin Configuration (top view)

RxD

INH

EN

Vs

Vcc

Bus

TxD

GND

P-DSO-8-3

Figure 1 1.3 Pin No. 1 2 3 4 5 6 7 8 Pin Definitions and Functions: Symbol RxD EN VCC TxD GND Bus Vs INH Function Receive data output; integrated pull up, LOW in dominant state, Enable input; integrated 30 kW pull down, transceiver in normal operation mode when HIGH 5V supply input; Transmit data input; integrated pull up, LOW in dominant state Ground; Bus output/input; internal 30 kW pull up, LOW in dominant state Battery supply input; Inhibit output; to control a voltage regulator, becomes HIGH when wake-up via LIN bus occurs

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1.4

Functional Block Diagram

Vs

INH

Vcc EN

30 k9

Output Stage

Driver Temp.Protection

Mode Control
30 k9

Bus

TxD

Filter

RxD

TLE 6259-2G

Receiver
5

GND

Figure 2

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1.5

Application Information
Start Up Power Up

Normal Mode EN high INH high Vcc ON

EN high

EN

low

Stand-By EN INH RxD VCC low high low1) ON high3)

EN (VCC

high ON)

Sleep Mode EN low

1) 2) 3)

INH VCC floating OFF2)

Wake Up t > tWAKE

after wake-up via bus ON when INH not connected to voltage regulator after start up

Figure 3: operation mode state diagram Master Termination For fail safe reasons, the TLE6259-2 already has a pull up resistor of 30kW implemented. To achieve the required timings for the dominant to recessive transition of the bus signal an additional external termination resistor of 1kW is required. It is recommended to place this resistor in the master node. To avoid reverse currents from the bus line into the battery supply line in case of an unpowered node, it is recommended to place a diode in series to the external pull up. For small systems (low bus capacitance) the EMC performance of the system is supported by an additional capacitor of at least 1nF in the master node (see figure 6 and 7, application circuit). External Capacitors An capacitor of 22F at the supply voltage input VS buffers the input voltage. In combination with the required reverse polarity diode this prevents the device from detecting power down conditions in case of negative transients on the supply line.

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The 100nF capacitors close to the VS pins of the 6259-2 and the voltage regulator help to improve the EMC behavior of the system. Sleep Mode In order to reduce the current consumption the TLE 6259-2 offers a sleep operation mode. This mode is selected by switching the enable input EN low (see figure 3, state diagram). In the sleep mode, a voltage regulator can be controlled via the INH output in order to minimize the current consumption of the whole application. A wake-up caused by a message on the communication bus, automatically enables the voltage regulator by switching the INH output high. In parallel the wake-up is indicated by setting the RxD output LOW. When entering the normal mode this wake-up flag is reset and the RxD output is released to transmit the bus data. In case the voltage regulator control input is not connected to INH output or the microcontroller is active respectively, the TLE6259-2 can be set in normal operation mode without a wake-up via the communication bus. Bus Short to GND Feature The TLE6259-2 also has a BUS short to GND feature implemented, in order to protect the battery from running out of charge. A normal master termination connection like described above, 1kW resistor and diode between bus and VS, whould cause a constantly drawn current via this path. The resulting resistance of this short to GND is lower than 1kW. To avoid this current during a generator off state, like a parked car, the sleep mode has a bus short to GND feature implemented in the 6259-2. This feature is only applicable, if the master termination is connected with the INH pin, instead of the VS. For a more detailed information see the application circuit in figure 6 and 7.

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Final Datasheet TLE 6259-2

2 2.1

Electrical Characteristics Absolute Maximum Ratings Symbol Limit Values min. max. Unit Remarks

Parameter

Voltages Supply voltage Battery supply voltage Bus input voltage Bus input voltage Logic voltages at EN, TxD, RxD Input voltages at INH Output current at INH Electrostatic discharge voltage at Vs, Bus Electrostatic discharge voltage Temperatures Junction temperature

VCC VS Vbus Vbus VI VINH IINH VESD VESD

-0.3 -0.3 -20 -20 -0.3 -0.3

6 40 32 40

V V V V V V mA kV kV
human body model (100 pF via 1.5 kW) human body model (100 pF via 1.5 kW) t < 1s 0 V < VCC < 5.5 V

VCC +
0.3

VS +
0.3 20

-4 -2

4 2

Tj

-40

150

Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit.

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2.2

Operating Range Symbol Limit Values min. max. 5.5 35 150 V V C

Parameter Supply voltage Battery Supply Voltage Junction temperature Thermal Resistances Junction ambient

Unit

Remarks

VCC VS Tj

4.5 6 40

Rthj-a

185

K/W

Thermal Shutdown (junction temperature) Symbol min. Thermal shutdown temp. Thermal shutdown hyst. Limit Values typ. 170 10 max. 190 C K 150 Unit

TjSD DT

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2.3

Electrical Characteristics

4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL =500 W; VEN > VEN,ON; -40 C < Tj < 125 C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified.

Parameter

Symbol

Limit Values min. typ. max.

Unit Remarks

Current Consumption Current consumption inNormal Mode

ICC

0.3 0.4

0,7 0.8 1.5 2 10 30 30

mA mA mA mA A A A A

recessive state; VTxD = VCC dominant state; VTxD = 0 V recessive state, without Rload; VTxD = VCC dominant state, without Rload; VTxD = 0 V external VR activated INH=H

IS

0.8 1.3

Current consumption in Standby Mode Current consumption in Sleep Mode

ICC IS ICC IS

3 18 18

external VR deactivated INH=L

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2.3

Electrical Characteristics (contd)

4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL =500 W; VEN > VEN,ON; -40 C < Tj < 125 C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified.

Parameter

Symbol

Limit Values min. typ. max.

Unit Remarks

Receiver Output RD HIGH level output current LOW level output current Transmission Input TD HIGH level input voltage threshold TxD input hysteresis LOW level input voltage threshold

IRD,H IRD,L

-1.2 0.5

-0.8 0.8

-0.5 1.2

mA mA

VRD = 0.8 x VCC, VRD = 0.2 x VCC,

VTD,H VTD,hys VTD,L

300

2.9 700

0.7 x

V mV V

recessive state

VCC
900 0.3 x 2.1
dominant state

VCC

TxD pull up current

Enable input (pin EN) HIGH level input voltage threshold LOW level input voltage threshold EN input hysteresis

ITD

-150

-110

-70

VTxD<0.3Vcc

VEN,on VEN,off VEN,hys REN

2.8 0.3 x 2.2

0.7 x

V V

normal mode

VCC
low power mode

VCC
300 600 900 mV

EN pull down resistance

Inhibit output (pin INH) Inhibit Ron resistance Leakage current

15

30

60

kW

RonINH

65 - 5.0

120 5.0

W
A

IINH = - 15 mA sleep mode; VINH = 0 V

IINH,lk

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2.3

Electrical Characteristics (contd)

4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL =500 W; VEN > VEN,ON; -40 C < Tj < 125 C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified.

Parameter

Symbol

Limit Values min. typ. max.

Unit Remarks

Bus receiver Receiver threshold voltage, recessive to dominant edge Receiver threshold voltage, dominant to recessive edge Receiver hysteresis wake-up threshold voltage

Vbus,rd Vbus,dr

0.44 x VS

0.5 x

V 0.6 x V mV V

-8V<Vbus<Vbus,dom Vbus,rec<Vbus<20 V Vbus,hys = Vbus,rec - Vbus,dom

VS
0.56 x VS 0.04 x VS

VS
0.1 x

Vbus,hys 0.02 x VS Vwake 0.40 x VS

VS VS

0.5 x 0.6 x

VS

Bus transmitter Bus recessive output voltage Vbus,rec Bus dominant output voltage Vbus,dom 0.9 x

VS
0.15 x VS 1.2

V V V mA

VTxD = VCC VTxD = 0 V; 8V<VS<27V 6V<VS<8V Vbus,short = 13.5 V VCC = 0 V, VS = 0 V, Vbus = -8 V VCC = 0 V, VS = 0 V, Vbus = 20 V VLIN=VS=13,5V Normal mode Sleep mode

VS

Bus short circuit current Leakage current

Ibus,sc Ibus,lk

40 -150

100 -70 10

150

mA
25 10

mA
A kW A

Bus pull up resistance Lin output current

Rbus Ilin

20 5

30 30

47 60

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2.3

Electrical Characteristics (contd)

4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL =500 W; VEN > VEN,ON; -40 C < Tj < 125 C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified.

Parameter

Symbol

Limit Values min. typ. max.

Unit Remarks

Dynamic Transceiver Characteristics Slope fall time Slope rise time Slope symmetry Slope fall time

tfslope trslope

22,5 22,5 5 22.5

s s s s

100% > Vbus > 0% Cbus= 10 nF; RL=500W VCC = 5 V; VS = 13.5 V 0% > Vbus >10 0% Cbus= 10 nF; RL=500W VCC = 5 V; VS = 13.5 V tfslope-trslope 100% > Vbus > 0% Cbus= 6,8nF;RL=660W Tambient < 85 C; VCC = 5 V; VS = 13.5 V 0% > Vbus >100% Cbus= 6,8nF;RL=660W VCC = 5 V; VS = 13.5 V tfslope-trslope VCC = 5 V VCC = 5 V VCC = 5V; CRxD = 20pF VCC = 5 V; CRxD = 20 pF tsym,R = td(L),R - td(H),R tsym,T = td(L),T - td(H),T Tj 125 Tj 150

tslopesym -5 tfslope

Slope rise time Slope symmetry Propagation delay TxD LOW to bus Propagation delay TxD HIGH to bus Propagation delay bus dominant to RxD LOW Propagation delay bus recessive to RxD HIGH Receiver delay symmetry Transmitter delay symmetry Wake-up delay time

trslope

22.5 4 1 1 1 1 -2 -2 30 100 3 3 6 6 2 2 150 170 10 10

s s s s s s s s s s s s

tslopesym -4 td(L),T
td(H),T td(L),R td(H),R tsym,R tsym,T twake

Delay time for change sleep/ tsnorm stand by mode-normal mode Delay time for change normal tnsleep mode - sleep mode

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Diagrams

Vs
100 nF

EN INH TxD

1 k9

Bus
Cbus

RxD
20 pF

GND

VCC

100 nF

Figure 4: Test circuits

VCC

VTxD
GND td(L),T VS td(H),T

Vbus
GND

Vbus,rd

Vbus,dr

td(L),R VCC

td(H),R

VRxD
0.3*VCC GND td(L),TR td(H),TR

0.7*VCC

Figure 5: Timing diagrams for dynamic characteristics

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Application

Vbat

LIN bus

master node
Vs

TLE 6259-2G
EN

100 nF

RxD Bus INH GND TxD VCC

100 nF

1nF

22 F

slave node
Vs
100 nF

22 F

Figure 6 Application circuit with bus short to GND feature applied

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100 nF 100 nF

1k

GND
100 nF

INH

VQ

5V

e.g. TLE 4263 VI GND 22 F

ECU 1

TLE 6259-2G
EN RxD

Bus INH GND

TxD VCC
100 nF 100 nF

GND

VI

VQ

5V 22 F

e.g. TLE 4278 GND

ECU X

Final Datasheet TLE 6259-2

Vbat

LIN bus

master node
Vs

TLE 6259-2G
EN

100 nF

RxD Bus INH GND TxD VCC

1nF

22 F

slave node
Vs
100 nF

100 nF

22 F

Figure 7 Application circuit without bus short to GND feature

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1k

GND
100 nF 100 nF

INH

VQ

5V

e.g. TLE 4263 VI

100 nF

GND

22 F

ECU 1

TLE 6259-2G
EN RxD

Bus INH GND

TxD VCC
100 nF 100 nF

GND

VI

VQ

5V 22 F

e.g. TLE 4278 GND

ECU X

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Package Outlines P-DSO-8-3 (Plastic Dual Small Outline Package)

0.33 0.08 x 45

1.75 MAX.

0.1 MIN. (1.5)

4 -0.21)

1.27 0.41 +0.1 -0.05 8 5

0.1 0.2
M

C A C x8
6 0.2

0.64 0.25

Index Marking

5 -0.21)
1)

Index Marking (Chamfer) Does not include plastic or metal protrusion of 0.15 max. per side

Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book Package Information. SMD = Surface Mounted Device

Dimensions in mm

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0.2

+0.05 -0.01

Final Datasheet TLE 6259-2

Edition 1999-10-12 Published by Infineon Technologies AG St.-Martin-Strasse 53 D-81541 Mnchen Infineon Technologies AG1999 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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