8085 Programming Model

Instruction & Instruction Format

An instruction is a command to the microprocessor to perform a given task on a specified data. Each instruction has two parts: one is task to be performed, called the operation code (opcode), and the second is the data to be operated on, called the operand. The operand (or data) can be specified in various ways. It may include 8-bit (or 16-bit ) data, an internal register, a memory location, or 8-bit (or 16-bit) address. In some instructions, the operand is implicit. The 8085 instruction set is classified into the following three groups according to size: (1) 1-byte instructions (2) 2-byte instructions (3) 3-byte instructions

One-Byte Instructions
A 1-byte instruction includes the opcode and operand in the same byte. Operand(s) are internal register and are coded into the instruction. Examples:

Two-Byte Instructions
In a two-byte instruction, the first byte specifies the operation code and the second byte specifies the operand. Source operand is a data byte immediately following the opcode. Examples:

Three-Byte Instructions
In a three-byte instruction, the first byte specifies the opcode, and the following two bytes specify the 16-bit address. Note that the second byte is the low-order address and the third byte is the high-order address. opcode + data byte + data byte Examples:

Addressing Modes
Every instruction of a program has to operate on a data. The method of specifying the data to be operated by the instruction is called addressing. The 8085 has the following 5 different types of addressing modes: (1) Immediate Addressing (2) Direct Addressing (3) Register Addressing (4) Register Indirect Addressing (5) Implied Addressing

Immediate Addressing:
In immediate addressing mode, the data is specified in the instruction itself. The data will be a part of the program instruction. Ex. - Move the data given in the instruction to register.

Direct Addressing:
In direct addressing mode, the address of the data is specified in the instruction. The data will be in memory. In this addressing mode, the program instructions and data can be stored in different memory. Ex. - Load the data available in memory location in to accumulator.

Register Addressing:
In register addressing mode, the instruction specifies the name of the register in which the data is available. Ex. - Move the content of register to register.

Register Indirect Addressing:

In register indirect addressing mode, the instruction specifies the name of the register in which the address of the data is available. Here the data will be in memory and the address will be in the register pair. Ex. - The memory data addressed by pair is moved to register.

Implied Addressing:
In implied addressing mode, the instruction itself specifies the data to be operated. Ex. - Complement the content of accumulator.

Instruction Set
Data Transfer Group
Instruction Examples: Description Operations performed: Register addressing Indirect addressing Indirect addressing

Examples:

Flags affected: None Length in byte: One Operations performed: Flags affected: None Length in bytes: Two Operation performed: Flags affected: None Length in bytes: Three Operation performed: Flags affected: None Length in bytes: Three Operation performed: Flags affected: None Length in bytes: Three Operations performed: Flags affected: None Length in bytes: Three Operations performed: Flags affected: None Length in bytes: Three Operation performed: Flags affected: None Length in byte: One Operation performed: Flags affected: None Length in byte: One Operations performed: Flags affected: None Length in byte: One Operation performed: Flags affected: None Length in bytes: Two Operation performed: Flags affected: None Length in bytes: Two

Register addressing Indirect addressing

Examples:

Immediate addressing

Example:

Direct addressing

Example:

Direct addressing

Example:

Direct addressing

Example:

Direct addressing

Example:

Indirect addressing

Example:

Indirect addressing

and

Implied addressing

Example:

Direct addressing

Example:

Direct addressing

Arithmetic Group
Instruction Description Operations performed: Flags affected: All flags Length in byte: One Operations performed: Flags affected: All flags Length in byte: One Operation performed: Immediate addressing Flags affected: All flags Length in byte: Two Operation performed: Immediate addressing Flags affected: All flags Length in byte: Two Operation performed: Flags affected: Only flag Length in byte: One Operations performed: Flags affected: All flags Length in byte: One Operations performed: Flags affected: All flags Length in byte: One Operations performed: Immediate addressing Flags affected: All flags Length in byte: Two Operations performed: Immediate addressing Flags affected: All flags Length in byte: Two Operations performed: Flags affected: All flags except Length in byte: One Operations performed: Flags affected: All flags except Length in byte: One Operation performed: Flags affected: None Length in byte: One flag Register addressing Indirect addressing flag Register addressing Register addressing Indirect addressing

Register addressing Indirect addressing

Register addressing

Register addressing Indirect addressing

Register addressing Indirect addressing

Register addressing Indirect addressing

Operations performed: Flags affected: None Length in byte: One Operations performed:

Register addressing Indirect addressing

Binary result in BCD result in If lower nibble of or , then , then If both of the above conditions are satisfied, then Implied addressing If higher nibble of or

Flags affected: All Length in byte: One

Logical Group
Instruction Description Operations performed: Flags affected: , , are affected by Length in byte: One Operation performed: Flags affected: , , are affected by Length in byte: Two Operations performed: Flags affected: , , are affected by Length in byte: One Operation performed: Flags affected: , , are affected by Length in byte: Two Operations performed: Flags affected: , , are affected by Length in byte: One Operation performed: Flags affected: , , are affected by Length in byte: Two Operation performed: Flags affected: Length in byte: One Operation performed: Flags affected: Only Length in byte: One and Register addressing Indirect addressing

Immediate addressing and Register addressing Indirect addressing and

Immediate addressing and Register addressing Indirect addressing and

Immediate addressing and Implied addressing

Implied addressing

Operation performed: Flags affected: Only Length in byte: One Operations performed: If If If , P and Z , then , then , then

Implied addressing

and and and

Flags affected: Only Length in byte: One Addressing modes: Register addressing for Indirect addressing for Operations performed: If If If Flags affected: Only , P and Z Length in byte: Two Addressing mode: Immediate addressing Operations performed:

, then , then , then

and and and

Flags affected: Only will be modified as Length in byte: One Addressing modes: Implied addressing Operations performed:

bit is shifted to

flag.

Flags affected: Only will be modified as Length in byte: One Addressing modes: Implied addressing Operations performed:

bit is shifted to

flag.

Flags affected: Only will be modified as Length in byte: One Addressing modes: Implied addressing

bit is shifted to

flag.

Operations performed:

Flags affected: Only will be modified as Length in byte: One Addressing modes: Implied addressing

bit is shifted to

flag.

Branching Group
Instruction Description Operation performed: Program control is transferred to the target memory location. Flags affected: None Length in byte: Three Addressing mode: Immediate addressing Operation performed: If the condition is satisfied, the program control is transferred to the target memory location. Else, next instruction after the instruction is executed. Flags affected: None, but flags are checked Length in byte: Three Instructions: Jump if [Reset] Jump if [Set] Jump if [Reset] Jump if [Set] Jump if [Reset] Jump if [Set] Jump if [Reset] Jump if [Set] Addressing mode: Immediate/register indirect addressing Operation performed: Program control is transferred to the sub-program or the subroutine. Flags affected: None Length in byte: Three Addressing mode: Immediate/Register indirect addressing

Operation performed: If the condition is satisfied, the program control is transferred to the sub-program or the subroutine. Else, the next instruction after the instruction is executed. Flags affected: None, but flags are checked Length in byte: Three Instructions: Call if [Reset] Call if [Set] Call if [Reset] Call if [Set] Call if [Reset] Call if [Set] Call if [Reset] Call if [Set] Addressing mode: Immediate/register indirect Operation performed: Program control is transferred from the sub-program or the sub-routine to the calling program, i.e. the main program where the sub-routine is called using the instruction. Flags affected: None Length in byte: One Addressing mode: Register indirect addressing Operation performed: If the condition is satisfied, the program control is transferred back to the calling program whose address is stored on the stack, i.e. the return address, by the instruction. Flags affected: None, but flags are checked Length in byte: One Instructions: Return if [Reset] Return if [Set] Return if [Reset] Return if [Set] Return if [Reset] Return if [Set] Return if [Reset] Return if [Set] Addressing mode: Register indirect addressing Operation performed: One byte instruction that transfers the program control to one out of eight vectored locations of the corresponding instruction, where ranges from to . Flags affected: None Length in byte: One Instruction Vector Address

Addressing mode: Register indirect addressing Operation performed: Flags affected: None Length in byte: One

Register addressing

Stack and Machine Control Group

Instruction Description Operation performed: Decrements the stack pointer by one and copies two bytes from register pair specified in the instruction to the two locations in the stack where the stack pointer then points. Flags affected: None Length in byte: One Addressing mode: Register indirect addressing Operation performed: Copies two bytes from the two stack locations to the register pair specified in the instruction. Flags affected: None Length in byte: One Addressing mode: Register indirect addressing Operation performed: Register addressing Flags affected: None Length in byte: One Operation performed: The instruction is fetched, decoded and no operation is performed. The microprocessor goes for the execution of the next instruction. This instruction can be used to add a small amount of delay between the executions of two instructions. Flags affected: None Length in byte: One Operation performed: The microprocessor completes the current execution and enters into a halt state. To come out of the halt state, the microprocessor can either be interrupted or reset. Flags affected: None Length in byte: One Operation performed: All interrupts are enabled. Flags affected: None Length in byte: One Operation performed: All interrupts, except are disabled. Flags affected: None Length in byte: One Operation performed: Multipurpose instruction, used to read the statuses of the restart interrupts, i.e. , & and to read one bit data from the pin of the microprocessor. Flags affected: None Length in byte: One Operation performed: Multipurpose instruction, used to control interrupts and the pin of the microprocessor. Flags affected: None Length in byte: One