ANTENNA POSITION CONTROLLING USING IR Chapter 1 Introduction

This project is a standalone Antenna position controlling using IR. Use of embedded technology makes this closed loop feedback control system efficient and reliable. Microcontroller (AT89S52) allows dynamic and faster control. The main aim of this project is to adjust the position of the antenna so as to receive the maximum signal or to transmit the signal to the other side with minimum losses in the signal. The project uses IR technology to implement this application. The user can adjust the antenna position with an ordinary TV remote. The antenna will be fixed with a controlling unit. This controlling unit consists of the microcontroller that performs all the tasks, IR receiver TSOP 1738, stepper motor which rotates the stepper motor and the driver circuit that allows the stepper motor to be interfaced with the microcontroller. Since the microcontroller cannot drive the stepper motor directly, a current driver called ULN2003 is used as an interface between the microcontroller and the stepper motor. 1.1 Objective of the project The project has the task of rotating the antenna in the desired direction using IR remote. This antenna is fixed to the stepper motor and thus the controlling unit rotates the stepper motor in a direction according to the user requirement. This project is a device that collects data from the IR receiver, codes the data into a format that can be understood by the controlling section. This system, upon receiving the data from the receiver, adjusts the position of the antenna by rotating the stepper motor in the desired direction.

The objective of the project is to develop a microcontroller based control system. It consists of a IR receiver TSOP 1738, microcontroller, ULN driver and the stepper motor. 1.2 Background of the Project The software application and the hardware implementation help the microcontroller read the value from the IR receiver and rotate the stepper motor as per the user requirement. The measure of efficiency is based on how fast the microcontroller can measure the data and act accordingly. The system is totally designed using IR and embedded systems technology. The Controlling unit has an application program to allow the microcontroller read the receiver output and adjust the position of the antenna by rotating the stepper motor. The performance of the design is maintained by controlling unit. 1.3 Organization of the Thesis In view of the proposed thesis work explanation of theoretical aspects and algorithms used in this work are presented as per the sequence described below. Chapter 1 describes a brief review of the objectives and goals of the work. Chapter 2 discusses the existing technologies and the study of various technologies in detail. Chapter 3 describes the Block diagram, Circuit diagram of the project and its description. The construction and description of various modules used for the application are described in detail. Chapter 4 explains the Software tools required for the project, the Code developed for the design. Chapter 5 presents the results, overall conclusions of the study and proposes possible improvements and directions of future research work.

Chapter 2 Overview of the technologies used

Embedded Systems: An embedded system can be defined as a computing device that does a specific focused job. Appliances such as the air-conditioner, VCD player, DVD player, printer, fax machine, mobile phone etc. are examples of embedded systems. Each of these appliances will have a processor and special hardware to meet the specific requirement of the application along with the embedded software that is executed by the processor for meeting that specific requirement. The embedded software is also called firm ware. The desktop/laptop computer is a general purpose computer. You can use it for a variety of applications such as playing games, word processing, accounting, software development and so on. In contrast, the software in the embedded systems is always fixed listed below: Embedded systems do a very specific task, they cannot be programmed to do different things. Embedded systems have very limited resources, particularly the memory. Generally, they do not have secondary storage devices such as the CDROM or the floppy disk. Embedded systems have to work against some deadlines. A specific job has to be completed within a specific time. In some embedded systems, called real-time systems, the deadlines are stringent. Missing a deadline may cause a catastrophe-loss of life or damage to property. Embedded systems are constrained for power. As many embedded systems operate through a battery, the power consumption has to be very low. Some embedded systems have to operate in extreme environmental conditions such as very high temperatures and humidity. Following are the advantages of Embedded Systems: 1. They are designed to do a specific task and have real time performance constraints which must be met. 2. They allow the system hardware to be simplified so costs are reduced.

3. They are usually in the form of small computerized parts in larger devices which serve a general purpose. The program instructions for embedded systems run with limited computer hardware resources, little memory and small or even non-existent keyboard or screen. INFRARED IN ELECTRONICS Infra-Red is interesting, because it is easily generated and doesn't suffer electromagnetic interference, so it is nicely used to communication and control, but it is not perfect, some other light emissions could contains infrared as well, and that can interfere in this communication. The sun is an example, since it emits a wide spectrum or radiation. The adventure of using lots of infra-red in TV/VCR remote controls and other applications, brought infra-red diodes (emitter and receivers) at very low cost at the market. From now on you should think as infrared as just a "red" light. This light can means something to the receiver, the "on or off" radiation can transmit different meanings. Lots of things can generate infrared, anything that radiate heat do it, including out body, lamps, stove, oven, friction your hands together, even the hot water at the faucet. To allow a good communication using infra-red, and avoid those "fake" signals, it is imperative to use a "key" that can tell the receiver what is the real data transmitted and what is fake. As an analogy, looking eye naked to the night sky you can see hundreds of stars, but you can spot easily a far away airplane just by its flashing strobe light. That strobe light is the "key", the "coding" element that alerts us. Similar to the airplane at the night sky, our TV room may have hundreds of tinny IR sources, our body and the lamps around, even the hot cup of tea. A way to avoid all those other sources, is generating a key, like the flashing airplane. So, remote controls use to pulsate its infrared in a certain frequency. The IR receiver module at the TV, VCR or stereo "tunes" to this certain

frequency and ignores all other IR received. The best frequency for the job is between 30 and 60 kHz, the most used is around 36 kHz

Chapter 3

Hardware Implementation of the Project

This chapter briefly explains about the Hardware Implementation of the project. It discusses the design and working of the design with the help of block diagram and circuit diagram and explanation of circuit diagram in detail. It explains the features, timer programming, serial communication, interrupts of AT89S52 microcontroller. It also explains the various modules used in this project. 3.1 Project Design The implementation of the project design can be divided in two parts. Hardware implementation Firmware implementation Hardware implementation deals in drawing the schematic on the plane paper according to the application, testing the schematic design over the breadboard using the various ICs to find if the design meets the objective, carrying out the PCB layout of the schematic tested on breadboard, finally preparing the board and testing the designed hardware. The firmware part deals in programming the microcontroller so that it can control the operation of the ICs used in the implementation. In the present work, we have used the Orcad design software for PCB circuit design, the Keil v3 software development tool to write and compile the source code, which has been written in the C language. The Proload programmer has been used to write this compile code into the microcontroller. The firmware implementation is explained in the next chapter. The project design and principle are explained in this chapter using the block diagram and circuit diagram. The block diagram discusses about the required components of the design and working condition is explained using circuit diagram and system wiring diagram.

3.1.1 Block Diagram of the Project and its Description

The block diagram of the design is as shown in Fig 3.1. It consists of IR receiver, microcontroller, ULN driver and the stepper motor. The brief description of each unit is explained as follows.

3.2 Power Supply:

The input to the circuit is applied from the regulated power supply. The a.c. input i.e., 230V from the mains supply is step down by the transformer to 12V and is fed to a rectifier. The output obtained from the rectifier is a pulsating d.c voltage. So in order to get a pure d.c voltage, the output voltage from the rectifier is fed to a filter to remove any a.c components present even after rectification. Now, this voltage is given to a voltage regulator to obtain a pure constant dc voltage.

Transformer: Usually, DC voltages are required to operate various electronic equipment and these voltages are 5V, 9V or 12V. But these voltages cannot be obtained directly. Thus the a.c input available at the mains supply i.e., 230V is to be brought down to the required voltage level. This is done by a transformer. Thus, a step down transformer is employed to decrease the voltage to a required level. Rectifier: The output from the transformer is fed to the rectifier. It converts A.C. into pulsating D.C. The rectifier may be a half wave or a full wave rectifier. In this project, a bridge rectifier is used because of its merits like good stability and full wave rectification. Filter: Capacitive filter is used in this project. It removes the ripples from the output of rectifier and smoothens the D.C. Output received from this filter is constant until the mains voltage and load is maintained constant. However, if either of the two is varied, D.C. voltage received at this point changes. Therefore a regulator is applied at the output stage.

Voltage regulator: As the name itself implies, it regulates the input applied to it. A voltage regulator is an electrical regulator designed to automatically maintain a constant voltage level. In this project, power supply of 5V and 12V are required. In order to obtain these voltage levels, 7805 and 7812 voltage regulators are to be used. The first number 78 represents positive supply and the numbers 05, 12 represent the required output voltage levels.

3.3 Microcontrollers:
Microprocessors and microcontrollers are widely used in embedded systems products. Microcontroller is a programmable device. A microcontroller has a CPU in addition to a fixed amount of RAM, ROM, I/O ports and a timer embedded all on a single chip. The fixed amount of on-chip ROM, RAM and number of I/O ports in microcontrollers makes them ideal for many applications in which cost and space are critical. The Intel 8051 is Harvard architecture, single chip microcontroller (C) which was developed by Intel in 1980 for use in embedded systems. It was popular in the 1980s and early 1990s, but today it has largely been superseded by a vast range of enhanced devices with 8051-compatible processor cores that are manufactured by more than 20 independent manufacturers including Atmel, Infineon Technologies and Maxim Integrated Products. 8051 is an 8-bit processor, meaning that the CPU can work on only 8 bits of data at a time. Data larger than 8 bits has to be broken into 8-bit pieces to be processed by the CPU. 8051 is available in different memory types such as UV-EPROM, Flash and NV-RAM.

Features of AT89S52: 8K Bytes of Re-programmable Flash Memory. RAM is 256 bytes. 4.0V to 5.5V Operating Range. Fully Static Operation: 0 Hz to 33 MHzs Three-level Program Memory Lock. 256 x 8-bit Internal RAM. 32 Programmable I/O Lines. Three 16-bit Timer/Counters. Eight Interrupt Sources. Full Duplex UART Serial Channel. Low-power Idle and Power-down Modes. Interrupt recovery from power down mode. Watchdog timer. Dual data pointer. Power-off flag. Fast programming time. Flexible ISP programming (byte and page mode). Description: The AT89s52 is a low-voltage, high-performance CMOS 8-bit microcomputer with 8K bytes of Flash programmable memory. The device is manufactured using Atmels high density nonvolatile memory technology and is compatible with the industrystandard MCS-51 instruction set. The on chip flash allows the program memory to be reprogrammed in system or by a conventional non volatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89s52 is a powerful microcomputer, which provides a highly flexible and costeffective solution to many embedded control applications.

In addition, the AT89s52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.

Pin description: Vcc Pin 40 provides supply voltage to the chip. The voltage source is +5V. GND Pin 20 is the ground.

Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during Program verification. External pull-ups are required during program verification. Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the following table. Port 1 also receives the low-order address bytes during Flash programming and verification.

Port 2 Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. The port also receives the high-order address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89S52, as shown in the following table.

RST Reset input A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives high for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled. ALE/PROG Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

PSEN Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/VPP External Access Enable EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier.

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be configured for use as an on-chip oscillator. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.

Special Function Registers A map of the on-chip memory area called the Special Function Register (SFR) space is shown in the following table. It should be noted that not all of the addresses are occupied and unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will, in general, return random data and write accesses will have an indeterminate effect. User software should not write 1s to these unlisted locations, since they may be used in future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 0. Timer 2 Registers: Control and status bits are contained in registers T2CON and T2MOD for Timer 2. The register pair (RCAP2H, RCAP2L) is the Capture/Reload register for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode. Interrupt Registers: The individual interrupt enable bits are in the IE register. Two priorities can be set for each of the six interrupt sources in the IP register.

Dual Data Pointer Registers: To facilitate accessing both internal and external data memory, two banks of 16-bit Data Pointer Registers are provided: DP0 at SFR address locations 82H-83H and DP1 at 84H and 85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1. The user should ALWAYS initialize the DPS bit to the appropriate value before accessing the respective Data Pointer Register. Power off Flag: The Power off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set to 1 during power up. It can be set and rest under software control and is not affected by reset.

Memory Organization MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed. Program Memory If the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.

Data Memory The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access the SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2). MOV 0A0H, #data The instructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H). MOV @R0, #data It should be noted that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.

Watchdog Timer (One-time Enabled with Reset-out)

The WDT is intended as a recovery method in situations where the CPU may be subjected to software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H).

When the WDT is enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT except through reset (either hardware reset or WDT overflow reset). When WDT overflows, it will drive an output RESET HIGH pulse at the RST pin. Using the WDT To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, the user needs to service it regularly by writing 01EH and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter overflows when it reaches 16383 (3FFFH) and this will reset the device. When the WDT is enabled, it will increment every machine cycle while the oscillator is running. This means the user must reset the WDT at least for every 16383 machine cycles. To reset the WDT, the user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only register. The WDT counter cannot be read or written. When WDT overflows, it will generate an output RESET pulse at the RST pin. The RESET pulse duration is 98xTOSC, where TOSC = 1/FOSC. To make the best use of the WDT, it should be serviced in those sections of code that will periodically be executed within the time required to prevent a WDT reset. WDT during Power-down and Idle In Power down mode the oscillator stops, which means the WDT also stops. Thus the user does not need to service the WDT in Power down mode. There are two methods of exiting Power down mode: By a hardware reset or By a level-activated external interrupt which is enabled prior to entering Power down mode.

When Power-down is exited with hardware reset, servicing the WDT should occur as it normally does whenever the AT89S52 is reset. Exiting Power down with an interrupt is significantly different. The interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the WDT be reset during the interrupt service for the interrupt used to exit Power down mode. To ensure that the WDT does not overflow within a few states of exiting Power down, it is best to reset the WDT just before entering Power down mode. Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to determine whether the WDT continues to count if enabled. The WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To prevent the WDT from resetting the AT89S52 while in IDLE mode, the user should always set up a timer that will periodically exit IDLE, service the WDT and reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count upon exit from IDLE.

UART
The Atmel 8051 Microcontrollers implement three general purpose, 16-bit timers/ counters. They are identified as Timer 0, Timer 1 and Timer 2 and can be independently configured to operate in a variety of modes as a timer or as an event counter. When operating as a timer, the timer/counter runs for a programmed length of time and then issues an interrupt request. When operating as a counter, the timer/counter counts negative transitions on an external pin. After a preset number of counts, the counter issues an interrupt request. The various operating modes of each timer/counter are described in the following sections.

A basic operation consists of timer registers THx and TLx (x= 0, 1) connected in cascade to form a 16-bit timer. Setting the run control bit (TRx) in TCON register turns the timer on by allowing the selected input to increment TLx. When TLx overflows it increments THx; when THx overflows it sets the timer overflow flag (TFx) in TCON register. Setting the TRx does not clear the THx and TLx timer registers. Timer registers can be accessed to obtain the current count or to enter preset values. They can be read at any time but TRx bit must be cleared to preset their values, otherwise the behavior of the timer/counter is unpredictable. The C/T control bit (in TCON register) selects timer operation or counter operation, by selecting the divided-down peripheral clock or external pin Tx as the source for the counted signal. TRx bit must be cleared when changing the mode of operation, otherwise the behavior of the timer/counter is unpredictable. For timer operation (C/Tx# = 0), the timer register counts the divided-down peripheral clock. The timer register is incremented once every peripheral cycle (6 peripheral clock periods). The timer clock rate is FPER / 6, i.e. FOSC / 12 in standard mode or FOSC / 6 in X2 mode. For counter operation (C/Tx# = 1), the timer register counts the negative transitions on the Tx external input pin. The external input is sampled every peripheral cycle. When the sample is high in one cycle and low in the next one, the counter is incremented. Since it takes 2 cycles (12 peripheral clock periods) to recognize a negative transition, the maximum count rate is FPER / 12, i.e. FOSC / 24 in standard mode or FOSC / 12 in X2 mode. There are no restrictions on the duty cycle of the external input signal, but to ensure that a given level is sampled at least once before it changes, it should be held for at least one full peripheral cycle. In addition to the timer or counter selection, Timer 0 and Timer 1 have four operating modes from which to select which are selected by bit-pairs (M1, M0) in TMOD. Modes 0, 1and 2 are the same for both timer/counters. Mode 3 is different. The four operating modes are described below. Timer 2, has three modes of operation: capture, auto-reload and baud rate generator. Timer 0 Timer 0 functions as either a timer or event counter in four modes of operation. Timer 0 is controlled by the four lower bits of the TMOD register and bits 0, 1, 4 and 5 of the TCON register.

TMOD register selects the method of timer gating (GATE0), timer or counter operation (T/C0#) and mode of operation (M10 and M00). The TCON register provides timer 0 control functions: overflow flag (TF0), run control bit (TR0), interrupt flag (IE0) and interrupt type control bit (IT0). For normal timer operation (GATE0= 0), setting TR0 allows TL0 to be incremented by the selected input. Setting GATE0 and TR0 allows external pin INT0# to control timer operation. Timer 0 overflow (count rolls over from all 1s to all 0s) sets TF0 flag, generating an interrupt request. It is important to stop timer/counter before changing mode.

Mode 0 (13-bit Timer) Mode 0 configures timer 0 as a 13-bit timer which is set up as an 8-bit timer (TH0 register) with a modulo-32 prescaler implemented with the lower five bits of the TL0 register. The upper three bits of TL0 register are indeterminate and should be ignored. Prescaler overflow increments the TH0 register. As the count rolls over from all 1s to all 0s, it sets the timer interrupt flag TF0. The counted input is enabled to the Timer when TR0 = 1 and either GATE = 0 or INT0 = 1. (Setting GATE = 1 allows the Timer to be controlled by external input INT0, to facilitate pulse width measurements). TR0 is a control bit in the Special Function register TCON. GATE is in TMOD. The 13-bit register consists of all 8 bits of TH0 and the lower 5 bits of TL0. The upper 3 bits of TL0 are indeterminate and should be ignored. Setting the run flag (TR0) does not clear the registers. Mode 0 operation is the same for Timer 0 as for Timer 1. There are two different GATE bits, one for Timer 1 (TMOD.7) and one for Timer 0 (TMOD.3).

Mode 1 (16-bit Timer) Mode 1 is the same as Mode 0, except that the Timer register is being run with all 16 bits. Mode 1 configures timer 0 as a 16-bit timer with the TH0 and TL0 registers connected in cascade. The selected input increments the TL0 register.

Mode 2 (8-bit Timer with Auto-Reload) Mode 2 configures timer 0 as an 8-bit timer (TL0 register) that automatically reloads from the TH0 register. TL0 overflow sets TF0 flag in the TCON register and reloads TL0 with the contents of TH0, which is preset by software. When the interrupt request is serviced, hardware clears TF0. The reload leaves TH0 unchanged. The next reload value may be changed at any time by writing it to the TH0 register. Mode 2 operation is the same for Timer/Counter 1.

Mode 3 (Two 8-bit Timers) Mode 3 configures timer 0 so that registers TL0 and TH0 operate as separate 8-bit timers. This mode is provided for applications requiring an additional 8-bit timer or counter. TL0 uses the timer 0 control bits C/T0# and GATE0 in the TMOD register, and TR0 and TF0 in the TCON register in the normal manner. TH0 is locked into a timer function (counting FPER /6) and takes over use of the timer 1 interrupt (TF1) and run control (TR1) bits. Thus, operation of timer 1 is restricted when timer 0 is in mode 3.

Timer 1 Timer 1 is identical to timer 0, except for mode 3, which is a hold-count mode. The following comments help to understand the differences:

 Timer 1 functions as either a timer or event counter in three modes of operation. Timer 1s mode 3 is a hold-count mode. Timer 1 is controlled by the four high-order bits of the TMOD register and bits 2, 3, 6 and 7 of the TCON register. The TMOD register selects the method of timer gating (GATE1), timer or counter operation (C/T1#) and mode of operation (M11 and M01). The TCON register provides timer 1 control functions: overflow flag (TF1), run control bit (TR1), interrupt flag (IE1) and interrupt type control bit (IT1). Timer 1 can serve as the baud rate generator for the serial port. Mode 2 is best suited for this purpose. For normal timer operation (GATE1 = 0), setting TR1 allows TL1 to be incremented by the selected input. Setting GATE1 and TR1 allows external pin INT1# to control timer operation. Timer 1 overflow (count rolls over from all 1s to all 0s) sets the TF1 flag generating an interrupt request. When timer 0 is in mode 3, it uses timer 1s overflow flag (TF1) and run control bit (TR1). For this situation, use timer 1 only for applications that do not require an interrupt (such as a baud rate generator for the serial port) and switch timer 1 in and out of mode 3 to turn it off and on. It is important to stop timer/counter before changing modes. Mode 0 (13-bit Timer) Mode 0 configures Timer 1 as a 13-bit timer, which is set up as an 8-bit timer (TH1 register) with a modulo-32 prescaler implemented with the lower 5 bits of the TL1 register. The upper 3 bits of the TL1 register are ignored. Prescaler overflow increments the TH1 register. Mode 1 (16-bit Timer) Mode 1 configures Timer 1 as a 16-bit timer with the TH1 and TL1 registers connected in cascade. The selected input increments the TL1 register. Mode 2 (8-bit Timer with Auto Reload) Mode 2 configures Timer 1 as an 8-bit timer (TL1 register) with automatic reload from the TH1 register on overflow. TL1 overflow sets the TF1 flag in the TCON register and reloads TL1 with the contents of TH1, which is preset by software. The reload leaves TH1 unchanged.

Mode 3 (Halt) Placing Timer 1 in mode 3 causes it to halt and hold its count. This can be used to halt Timer 1 when TR1 run control bit is not available i.e., when Timer 0 is in mode 3. Timer 2 Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON. Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.

In the Counter function, the register is incremented in response to a 1-to-0 transition at its corresponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle. Capture Mode In the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1-to-0 transition at external input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt.

Auto-reload (Up or Down Counter) Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR T2MOD. Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin.

The above figure shows Timer 2 automatically counting up when DCEN = 0. In this mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and RCAP2L are preset by software. If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure 10-2. In this mode, the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of resolution. In this operating mode, EXF2 does not flag an interrupt.

Baud Rate Generator Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON. Note that the baud rates for transmit and receive can be different if Timer 2 is used for the receiver or transmitter and Timer 1 is used for the other function. Setting RCLK and/or TCLK puts Timer 2 into its baud rate generator mode. The baud rate generator mode is similar to the auto-reload mode, in that a rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit value in registers RCAP2H and RCAP2L, which are preset by software.

The baud rates in Modes 1 and 3 are determined by Timer 2s overflow rate according to the following equation.

The Timer can be configured for either timer or counter operation. In most applications, it is configured for timer operation (CP/T2 = 0). The timer operation is different for Timer 2 when it is used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at 1/12 the oscillator frequency). As a baud rate generator, however, it increments every state time (at 1/2 the oscillator frequency). The baud rate formula is given below.

where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned integer. Timer 2 as a baud rate generator is shown in the below figure. This figure is valid only if RCLK or TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and will not generate an interrupt. Note too, that if EXEN2 is set, a 1-to-0 transition in T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can be used as an extra external interrupt. It should be noted that when Timer 2 is running (TR2 = 1) as a timer in the baud rate generator mode, TH2 or TL2 should not be read from or written to. Under these conditions, the Timer is incremented every state time, and the results of a read or write may not be accurate. The RCAP2 registers may be read but should not be written to, because a write might overlap a reload and cause write and/or reload errors. The timer should be turned off (clear TR2) before accessing the Timer 2 or RCAP2 registers.

Programmable Clock Out A 50% duty cycle clock can be programmed to come out on P1.0, as shown in the below figure. This pin, besides being a regular I/O pin, has two alternate functions. It can be programmed to input the external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to 4 MHz (for a 16-MHz operating frequency).

To configure the Timer/Counter 2 as a clock generator, bit C/T2 (T2CON.1) must be cleared and bit T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2) starts and stops the timer. The clock-out frequency depends on the oscillator frequency and the reload value of Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the following equation.

In the clock-out mode, Timer 2 roll-overs will not generate an interrupt. This behavior is similar to when Timer 2 is used as a baud-rate generator. It is possible to use Timer 2 as a baud-rate generator and a clock generator simultaneously. Note, however, that the baud rate and clock-out frequencies cannot be determined independently from one another since they both use RCAP2H and RCAP2L.

Interrupts
The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2) and the serial port interrupt. These interrupts are all shown in the below figure. Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once. The below table shows that bit position IE.6 is unimplemented. User software should not write a 1 to this bit position, since it may be used in future AT89 products.

Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software. The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.

Power saving modes of operation : 8051 has two power saving modes. They are: 1. Idle Mode 2. Power Down mode. The two power saving modes are entered by setting two bits IDL and PD in the special function register (PCON) respectively. The structure of PCON register is as follows. PCON: Address 87H

The schematic diagram for 'Power down' mode and 'Idle' mode is given as follows:

Idle Mode: Idle mode is entered by setting IDL bit to 1 (i.e., IDL=1). The clock signal is gated off to CPU, but not to interrupt, timer and serial port functions. The CPU status is preserved entirely. SP, PC, PSW, Accumulator and other registers maintain their data during IDLE mode. The port pins hold their logical states they had at the time Idle was initialized. ALE and PSEN(bar) are held at logic high levels. Ways to exit Idle Mode: 1. 1. Activation of any enabled interrupt will clear PCON.0 bit and hence the Idle Mode is exited. The program goes to the Interrupt Service Routine (ISR). After RETI is executed at the end of ISR, the next instruction will start from the one following the instruction that enabled the Idle Mode. 2. 3. 2. A hardware reset exits the idle mode. The CPU starts from the instruction following the instruction that invoked the Idle mode. Power Down Mode:

The Power Down Mode is entered by setting the PD bit to 1. The internal clock to the entire microcontroller is stopped. However, the program is not dead. The Power down Mode is exited (PCON.1 is cleared to 0) by Hardware Reset only. The CPU starts from the next instruction where the Power down Mode was invoked. Port values are not changed/ overwritten in power down mode. Vcc can be reduced to 2V in Power down Mode. However Vcc has to be restored to normal value before Power down Mode is exited.

Program Memory Lock Bits The AT89S52 has three lock bits that can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table.

When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value and holds that value until reset is activated. The latched value of EA must agree with the current logic level at that pin in order for the device to function properly. Programming the Flash Parallel Mode The AT89S52 is shipped with the on-chip Flash memory array ready to be programmed. The programming interface needs a high-voltage (12-volt) program enable signal and is compatible with conventional third-party Flash or EPROM programmers. The AT89S52 code memory array is programmed byte-by-byte. Programming Algorithm:

Before programming the AT89S52, the address, data, and control signals should be set up according to the Flash Programming Modes. To program the AT89S52, take the following steps: 1. Input the desired memory location on the address lines. 2. Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V. 5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte write cycle is self-timed and typically takes no more than 50 s. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached. Data Polling: The AT89S52 features Data Polling to indicate the end of a byte write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written data on P0.7. Once the write cycle has been completed, true data is valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.

Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.0 is pulled low after ALE goes high during programming to indicate BUSY. P3.0 is pulled high again when programming is done to indicate READY. Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The status of the individual lock bits can be verified directly by reading them back. Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows. (000H) = 1EH indicates manufactured by Atmel (100H) = 52H indicates AT89S52 (200H) = 06H Chip Erase: In the parallel programming mode, a chip erase operation is initiated by using the proper combination of control signals and by pulsing ALE/PROG low for a duration of 200 ns - 500 ns. In the serial programming mode, a chip erase operation is initiated by issuing the Chip Erase instruction. In this mode, chip erase is self-timed and takes about 500 ms. During chip erase, a serial read from any address location will return 00H at the data output.

Programming the Flash Serial Mode The Code memory array can be programmed using the serial ISP interface while RST is pulled to VCC. The serial interface consists of pins SCK, MOSI (input) and MISO (output). After RST is set high, the Programming Enable instruction needs to be executed first before other operations can be executed. Before a reprogramming sequence can occur, a Chip Erase operation is required. The Chip Erase operation turns the content of every memory location in the Code array into FFH. Either an external system clock can be supplied at pin XTAL1 or a crystal needs to be connected across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency should be less than 1/16 of the crystal frequency. With a 33 MHz oscillator clock, the maximum SCK frequency is 2 MHz. Serial Programming Algorithm To program and verify the AT89S52 in the serial programming mode, the following sequence is recommended: 1. Power-up sequence: a. Apply power between VCC and GND pins. b. Set RST pin to H. If a crystal is not connected across pins XTAL1 and XTAL2, apply a 3 MHz to 33 MHz clock to XTAL1 pin and wait for at least 10 milliseconds. 2. Enable serial programming by sending the Programming Enable serial instruction to pin MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to be less than the CPU clock at XTAL1 divided by 16. 3. The Code array is programmed one byte at a time in either the Byte or Page mode. The write cycle is self-timed and typically takes less than 0.5 ms at 5V. 4. Any memory location can be verified by using the Read instruction which returns the content at the selected address at serial output MISO/P1.6.

5. At the end of a programming session, RST can be set low to commence normal device operation. Power-off sequence (if needed): 1. Set XTAL1 to L (if a crystal is not used). 2. Set RST to L. 3. Turn VCC power off. Data Polling: The Data Polling feature is also available in the serial mode. In this mode, during a write cycle an attempted read of the last byte written will result in the complement of the MSB of the serial output byte on MISO. Serial Programming Instruction Set The Instruction Set for Serial Programming follows a 4-byte protocol and is shown in the table given below.

Programming Interface Parallel Mode Every code byte in the Flash array can be programmed by using the appropriate combination of control signals. The write operation cycle is self-timed and once initiated, will automatically time itself to completion.

After Reset signal is high, SCK should be low for at least 64 system clocks before it goes high to clock in the enable data bytes. No pulsing of Reset signal is necessary. SCK should be no faster than 1/16 of the system clock at XTAL1. For Page Read/Write, the data always starts from byte 0 to 255. After the command byte and upper address byte are latched, each byte thereafter is treated as data until all 256 bytes are shifted in/out. Then the next instruction will be ready to be decoded.

3.4 IR SECTION:
WHAT IS INFRARED? Infrared is an energy radiation with a frequency below our eyes sensitivity, so we cannot see it. Even that we can not "see" sound frequencies, we know that it exist, we can listen them.

Even that we can not see or hear infrared, we can feel it at our skin temperature sensors. When you approach your hand to fire or warm element, you will "feel" the heat, but you can't see it. You can see the fire because it emits other types of radiation, visible to your eyes, but it also emits lots of infrared that you can only feel in your skin. IR GENERATION To generate a 36 kHz pulsating infrared is quite easy, more difficult is to receive and identify this frequency. This is why some companies produce infrared receives, that contains the filters, decoding circuits and the output shaper, that delivers a square wave, meaning the existence or not of the 36kHz incoming pulsating infrared. It means that those 3 dollars small units, have an output pin that goes high (+5V) when there is a pulsating 36kHz infrared in front of it, and zero volts when there is not this radiation.

A square wave of approximately 27uS (microseconds) injected at the base of a transistor, can drive an infrared LED to transmit this pulsating light wave. Upon its presence, the commercial receiver will switch its output to high level (+5V).If you can turn on and off this frequency at the transmitter, your receiver's output will indicate when the transmitter is on or off.

Those IR demodulators have inverted logic at its output, when a burst of IR is sensed it drives its output to low level, meaning logic level = 1. The TV, VCR, and Audio equipment manufacturers for long use infra-red at their remote controls. To avoid a Philips remote control to change channels in a Panasonic TV, they use different codification at the infrared, even that all of them use basically the same transmitted frequency, from 36 to 50 kHz. So, all of them use a different combination of bits or how to code the transmitted data to avoid interference.

RC-5 Various remote control systems are used in electronic equipment today. The RC5 control protocol is one of the most popular and is widely used to control numerous home appliances, entertainment systems and some industrial applications including utility consumption remote meter reading, contact-less apparatus control, telemetry data transmission, and car security systems. Philips originally invented this protocol and virtually all Philips remotes use this protocol. Following is a description of the RC5. When the user pushes a button on the hand-held remote, the device is activated and sends modulated infrared light to transmit the command. The remote separates command data into packets. Each data packet consists of a 14-bit data word, which is repeated if the user continues to push the remote button.

The data packet structure is as follows: 2 start bits, 1 control bit, 5 address bits, 6 command bits.

The start bits are always logic 1 and intended to calibrate the optical receiver automatic gain control loop. Next, is the control bit. This bit is inverted each time the user releases the remote button and is intended to differentiate situations when the user continues to hold the same button or presses it again. The next 5 bits are the address bits and select the destination device. A number of devices can use RC5 at the same time. To exclude possible interference, each must use a different address. The 6 command bits describe the actual command. As a result, a RC5 transmitter can send the 2048 unique commands. The transmitter shifts the data word, applies Manchester encoding and passes the created one-bit sequence to a control carrier frequency signal amplitude modulator. The amplitude modulated carrier signal is sent to the optical transmitter, which radiates the infrared light. In RC5 systems the carrier frequency has been set to 36 kHz. Figure below displays the RC5 protocol. The receiver performs the reverse function. The photo detector converts optical transmission into electric signals, filters it and executes amplitude demodulation. The receiver output bit stream can be used to decode the RC5 data word. This operation is done by the microprocessor typically, but complete hardware implementations are present on the market as well. Single-die optical receivers are being mass produced by a number of companies such as Siemens, Temic, Sharp, Xiamen Hualian, Japanese Electric and others. Please note that the receiver output is inverted (log. 1 corresponds to illumination absence). IR Transmitter:

TSAL6200 is a high efficiency infrared emitting diode in GaAlAs on GaAs technology, molded in clear, blue grey tinted plastic packages. In comparison with the standard GaAs on GaAs technology these emitters achieve more than 100 % radiant power improvement at a similar wavelength. The forward voltages at low current and at high pulse current roughly correspond to the low values of the standard technology. Therefore these emitters are ideally suitable as high performance replacements of standard emitters. Features

Extra high radiant power and radiant intensity. High reliability. Low forward voltage. Suitable for high pulse current operation. Standard T-1 ( 5 mm) package. Angle of half intensity = 17. Peak wavelength p = 940 nm. Good spectral matching to Silicon photodetectors.

Applications

Infrared remote control units with high power requirements Free air transmission systems Infrared source for optical counters and card readers IR source for smoke detectors.

IR RECEIVER Description

The TSOP17.. series are miniaturized receivers for infrared remote control systems. PIN diode and preamplifier are assembled on lead frame, the epoxy package is designed as IR filter. The demodulated output signal can directly be decoded by a microprocessor. TSOP17.. is the standard IR remote control receiver series, supporting all major transmission codes. Features Photo detector and preamplifier in one package Internal filter for PCM frequency Improved shielding against electrical field disturbance TTL and CMOS compatibility Output active low Low power consumption High immunity against ambient light Continuous data transmission possible (up to 2400 bps) Suitable burst length .10 cycles/burst

Suitable Data Format The circuit of the TSOP17 is designed in that way that unexpected output pulses due to noise or disturbance signals are avoided. A bandpass filter, an integrator stage and an automatic gain control are used to suppress such disturbances. The distinguishing mark between data signal and disturbance signal are carrier frequency, burst length and duty cycle. The data signal should fulfil the following conditions: 1. Carrier frequency should be close to center frequency of the bandpass (e.g. 38 kHz). 2. Burst length should be 10 cycles/ burst or longer. 3. After each burst which is between 10 cycles and 70 cycles a gap time of at least 14 cycles is necessary. 4. For each burst which is longer than 1.8ms a corresponding gap time is necessary at some time in the data stream. This gap time should have at least same length as the burst. 5. Up to 1400 short bursts per second can be received continuously. Some examples for suitable data format are: NEC Code, Toshiba Micom Format, Sharp Code, RC5 Code, RC6 Code, R2000 Code and Sony Format (SIRCS). When a disturbance signal is applied to the TSOP17, it can still receive the data signal. However the sensitivity is reduced to that level that no unexpected pulses will occur. Some examples for such disturbance signals which are suppressed by the TSOP17 are: DC light (e.g. from tungsten bulb or sunlight) Continuous signal at 38 kHz or at any other frequency Signals from fluorescent lamps with electronic ballast (an example of the signal modulation is in the figure below).

3.5 ULN2003 CURRENT DRIVER:

The ULN2003 current driver is a high voltage, high current Darlington arrays each containing seven open collector Darlington pairs with common emitters. Each channel is rated at 500mA and can withstand peak currents of 600mA. Suppression diodes are included for inductive load driving and the inputs are pinned opposite the outputs to simplify board layout. These versatile devices are useful for driving a wide range of loads including solenoids, relays DC motors, LED displays filament lamps, thermal print heads and high power buffers. This chip is supplied in 16 pin plastic DIP packages with a copper lead frame to reduce thermal resistance.

This ULN2003 driver can drive seven relays at a time. The pins 8 and 9 provide ground and Vcc respectively.

The working of ULN driver is as follows: It can accept seven inputs at a time and produces seven corresponding outputs. If the input to any one of the seven input pins is high, then the value at its corresponding output pin will be low, for example if the input at pin 6 is high, then the value at the corresponding output i.e., output at pin 11 will be low. Similarly if the input at a particular pin is low, then the corresponding output will be high.

One of the coil terminals of the relay will be connected to the output pin of the ULN driver. Thus in order to switch on the relay to operate any load, the output from the ULN driver (any one of the 7 outputs) should be low. Thus for the output to be low, the input applied at that corresponding input pin should be high. The input to the ULN driver is provided by the microcontroller. Thus the instruction required to operate the relay through the microcontroller is SETB PX.Y where X is the port number (P0, P1, P2 and P3) And Y is the pin number of Port X. ULN driver interfacing with the microcontroller:

3.6 Stepper motor:

A stepper motor is a widely used device that translates electrical pulses into mechanical movement. The stepper motor is used for position control in applications such as disk drives, dot matrix printers and robotics. Stepper motors commonly have a permanent magnet rotor surrounded by a stator. The most common stepper motors have four stator windings that are paired with a center-tapped common. This type of stepper motor is commonly referred to as a four-phase or unipolar stepper motor. The center tap allows a change of current direction in each of the two coils when a winding is grounded, thereby resulting in a polarity change of the stator. The direction of the rotation is dictated by the stator poles. The stator poles are determined by the current sent through the wire coils. As the direction of the current is changed, the polarity is also changed causing the reverse motion of the rotor. It should be noted that while a conventional motor shaft runs freely, the stepper motor shaft moves in a fixed repeatable increment, which allows one to move it to a precise position. Thus, the stepper motor moves one step when the direction of current flow in the field coil(s) changes, reversing the magnetic field of the stator poles. The difference between unipolar and bipolar motors lies in the may that this reversal is achieved.

Advantages: 1. The rotation angle of the motor is proportional to the input pulse. 2. The motor has full torque at standstill (if the windings are energized) 3. Precise positioning and repeatability of movement since good stepper motors have an accuracy of 3 5% of a step and this error is non cumulative from one step to the next. 4. Excellent response to starting/ stopping/reversing. 5. Very reliable since there are no contact brushes in the motor. Therefore the life of the motor is simply dependant on the life of the bearing. 6. The motors response to digital input pulses provides open-loop control, making the motor simpler and less costly to control. 7. It is possible to achieve very low speed synchronous rotation with a load that is directly coupled to the shaft. 8. A wide range of rotational speeds can be realized as the speed is proportional to the frequency of the input pulses. Disadvantages: 1. Resonances can occur if not properly controlled.

2. Not easy to operate at extremely high speeds. Open Loop Operation: One of the most significant advantages of a stepper motor is its ability to be accurately controlled in an open loop system. Open loop control means no feedback information about position is needed. This type of control eliminates the need for expensive sensing and feedback devices such as optical encoders.

Stepper Motor Types: There are three basic stepper motor types. They are: Variable-reluctance Permanent-magnet Hybrid Variable-reluctance (VR) This type of stepper motor has been around for a long time. It is probably the easiest to understand from a structural point of view. This type of motor consists of a soft iron multi-toothed rotor and a wound stator. When the stator windings are energized with DC current, the poles become magnetized. Rotation occurs when the rotor teeth are attracted to the energized stator poles.

Permanent Magnet (PM)

The permanent magnet step motor is a low cost and low resolution type motor with typical step angles of 7.5 to 15. (48 24 steps/revolution) PM motors as the name implies have permanent magnets added to the motor structure. In this type of motor, the rotor does not have teeth. Instead the rotor is magnetized with alternating north and south poles situated in a straight line parallel to the rotor shaft. These magnetized rotor poles provide an increased magnetic flux intensity and because of this the PM motor exhibits improved torque characteristics when compared with the VR type.

Hybrid (HB) The hybrid stepper motor is more expensive than the PM stepper motor but provides better performance with respect to step resolution, torque and speed. Typical step angles range from 3.6 to 0.9 (100 400 steps per revolution). The hybrid stepper motor combines the best features of both the PM and VR type stepper motors. The rotor is multi-toothed like the VR motor and contains an axially magnetized concentric magnet around its shaft. The teeth on the rotor provide an even better path which helps guide the magnetic flux to preferred locations in the air gap. This further increases the detent, holding and dynamic torque characteristics of the motor when compared with both the VR and PM types. This motor

type has some advantages such as very low inertia and a optimized magnetic flow path with no coupling between the two stator windings. These qualities are essential in some applications. When to Use a Stepper Motor: A stepper motor can be a good choice whenever controlled movement is required. They can be used to advantage in applications where you need to control rotation angle, speed, position and synchronism. Because of the inherent advantages listed previously, stepper motors have found their place in many different applications. The Rotating Magnetic Field: When a phase winding of a stepper motor is energized with current a magnetic flux is developed in the stator. The direction of this flux is determined by the Right Hand Rule which states: If the coil is grasped in the right hand with the fingers pointing in the direction of the current in the winding (the thumb is extended at a 90 angle to the fingers), then the thumb will point in the direction of the magnetic field. The below figure shows the magnetic flux path developed when phase B is energized with winding current in the direction shown. The rotor then aligns itself so that the flux opposition is minimized. In this case the motor would rotate clockwise so that its south pole aligns with the north pole of the stator B at position 2 and its north pole aligns with the south pole of stator B at position 6. To get the motor to rotate we can now see that we must provide a sequence of energizing the stator windings in such a fashion that provides a rotating magnetic flux field which the rotor follows due to magnetic attraction.

Torque Generation: The torque produced by a stepper motor depends on several factors. The step rate The drive current in the windings The drive design or type In a stepper motor, a torque will be developed when the magnetic fluxes of the rotor and stator are displaced from each other. The stator is made up of a high permeability magnetic material. The presence of this high permeability material causes the magnetic flux to be confined for the most part to the paths defined by the stator structure. This serves to concentrate the flux at the stator poles. The torque output produced by the motor is proportional to the intensity of the magnetic flux generated when the winding is energized.

The basic relationship which defines the intensity of the magnetic flux is defined by: H = (N * i) / l where N = The number of winding turns i = current

H = Magnetic field intensity l = Magnetic flux path length This relationship shows that the magnetic flux intensity and consequently the torque is proportional to the number of winding turns and the current and inversely proportional to the length of the magnetic flux path. Thus from this basic relationship it is concluded that the same frame size stepper motor could have very different torque output capabilities simply by changing the winding parameters. Step Angle Accuracy: The main reason that the stepper motor gained such popularity as a positioning device is for its accuracy and repeatability. Typically stepper motors will have a step angle accuracy of 3 5% of one step. This error is also non cumulative from step to step. The accuracy of the stepper motor is mainly a function of the mechanical precision of its parts and assembly.

Torque versus Speed Characteristics: The torque versus speed characteristics are the key to selecting the right motor and drive method for a specific application. These characteristics are dependent upon (change with) the motor, excitation mode and type of driver or drive method.

Single Step Response and Resonances: Stepper motors can often exhibit a phenomena referred to as resonance at certain step rates. This can be seen as a sudden loss or drop in torque at certain speeds which can result in missed steps or loss of synchronism. It occurs when the input step pulse rate coincides with the natural oscillation frequency of the rotor. Often there is a resonance area around the 100 200 pps region and also one in the high step pulse rate region. The resonance phenomena of a stepper motor comes from its basic construction and therefore it is not possible to eliminate it completely. It is also dependent upon the load conditions. It can be reduced by driving the motor in half or micro stepping modes.

Few Definitions related to stepper motor: 1. Step angle Step angle is associated with the internal construction of the motor, in particular the number of teeth on the stator and the rotor. The step angle is the minimum degree of rotation associated with a single step.

2. Steps per second and rpm relation The relation between rpm (revolutions per minute), steps per revolution and steps per second is as follows: Steps per second = (rpm*steps per revolution)/60 3. Motor speed: The motor speed, measured in steps per second (steps/sec) is a function of the switching rate. 4. Holding torque: The amount of torque, from an external source, required to break away the shaft from its holding position with the motor shaft standstill or zero rpm condition. Stepper motor interfacing with microcontroller:

Chapter 4 Firmware Implementation of the project design

This chapter briefly explains about the firmware implementation of the project. The required software tools are discussed in section 4.2. Section 4.3 shows the flow diagram of the project design. Section 4.4 presents the firmware implementation of the project design. 4.1 Software Tools Required

Keil v3, Proload are the two software tools used to program microcontroller. The working of each software tool is explained below in detail. 4.1.1 Programming Microcontroller A compiler for a high level language helps to reduce production time. To program the AT89S52 microcontroller the Keil v3 is used. The programming is done strictly in the embedded C language. Keil v3 is a suite of executable, open source software development tools for the microcontrollers hosted on the Windows platform. The compilation of the C program converts it into machine language file (.hex). This is the only language the microcontroller will understand, because it contains the original program code converted into a hexadecimal format. During this step there are some warnings about eventual errors in the program. This is shown in Fig 4.1. If there are no errors and warnings then run the program, the system performs all the required tasks and behaves as expected the software developed. If not, the whole procedure will have to be repeated again. Fig 4.2 shows expected outputs for given inputs when run compiled program. One of the difficulties of programming microcontrollers is the limited amount of resources the programmer has to deal with. In personal computers resources such as RAM and processing speed are basically limitless when compared to microcontrollers. In contrast, the code on microcontrollers should be as low on resources as possible.

Keil Compiler:
Keil compiler is software used where the machine language code is written and compiled. After compilation, the machine source code is converted into hex code which is to be dumped into the microcontroller for further processing. Keil compiler also supports C language code.

Proload:
Proload is software which accepts only hex files. Once the machine code is converted into hex code, that hex code has to be dumped into the microcontroller and this is done by the Proload. Proload is a programmer which itself contains a microcontroller in it other than the one which is to be programmed. This microcontroller has a program in it written in such a way that it accepts the hex file from the Keil compiler and dumps this hex file into the microcontroller which is to be programmed. As the Proload programmer kit requires power supply to be operated, this power supply is given from the power supply circuit designed above. It should be noted that this programmer kit contains a power supply section in the board itself but in order to switch on that power supply, a source is required. Thus this is accomplished from the power supply board with an output of 12volts.

Features

Supports major Atmel 89 series devices Auto Identify connected hardware and devices Error checking and verification in-built Lock of programs in chip supported to prevent program copying 20 and 40 pin ZIF socket on-board Auto Erase before writing and Auto Verify after writing Informative status bar and access to latest programmed file Simple and Easy to use Works on 57600 speed

Description It is simple to use and low cost, yet powerful flash microcontroller programmer for the Atmel 89 series. It will Program, Read and Verify Code Data, Write Lock Bits, Erase and Blank Check. All fuse and lock bits are programmable. This programmer has intelligent onboard firmware and connects to the serial port. It can be used with any type of computer and requires no special hardware. All that is needed is a serial communication ports which all computers have. All devices have signature bytes that the programmer reads to automatically identify the chip. No need to select the device type, just plug it in and go! All devices also have a number of lock bits to provide various levels of software and programming protection. These lock bits are fully programmable using this programmer. Lock bits are useful to protect the program to be read back from microcontroller only allowing erase to reprogram the microcontroller. The programmer connects to a host computer using a standard RS232 serial port. All the programming 'intelligence'

is built into the programmer so you do not need any special hardware to run it. Programmer comes with window based software for easy programming of the devices.

Programming Software Computer side software called 'Proload V4.1' is executed that accepts the Intel HEX format file generated from compiler to be sent to target microcontroller. It auto detects the hardware connected to the serial port. It also auto detects the chip inserted and bytes used. Software is developed in Delphi 7 and requires no overhead of any external DLL.

Chapter 5 Results and Discussions

5.1 Results Assemble the circuit on the PCB as shown in Fig 5.1. After assembling the circuit on the PCB, check it for proper connections before switching on the power supply.

5.2 Conclusion and Future Scope The implementation of Antenna position controlling using IR is done successfully. The communication is properly done without any interference between different modules in the design. Design is done to meet all the specifications and requirements. Software tools like Keil Uvision Simulator, Proload to dump the source code into the microcontroller, Orcad Lite for the schematic diagram have been used to develop the software code before realizing the hardware. The performance of the system is more efficient. Reading the data from the IR receiver and adjusting the position of the antenna by rotating the stepper motor with the help of ULN driver is the main job carried out by the microcontroller. The mechanism is controlled by the microcontroller. Circuit is implemented in Orcad and implemented on the microcontroller board. The performance has been verified both in software simulator and hardware design. The total circuit is completely verified functionally and is following the application software. It can be concluded that the design implemented in the present work provide portability, flexibility and the data transmission is also done with low power consumption.

Working Procedure: This project is useful in all applications where the antenna position is to be adjusted using simple and effective components. The project uses IR technology to implement this application. The user will be provided with an ordinary IR TV remote. The IR receiver will be arranged in the controlling unit. Thus, when the user presses any button in the TV remote, the IR transmitter present in the remote transmits these signals. The IR receiver, in the vicinity of the IR radiation, receives these signals and decodes the signal and passes this data to the microcontroller. The microcontroller, upon receiving the data from the IR receiver, performs the specified task for the button presses i.e., changes the position of the antenna. The microcontroller has a software program to change the direction of the antenna in a particular direction when the user presses a particular button in the remote. Thus, it performs the task as per the software program. Since this antenna is fixed to the stepper motor, the stepper motor is rotated by the microcontroller. The microcontroller cannot drive the stepper motor directly, thus ULN driver is used as an interface between the microcontroller and the stepper motor. The stepper motor receives the input from the microcontroller and the required current from the power supply through the ULN driver. Advantages Cost effective User friendly The IR receiver works perfectly even in uneven weather conditions. Applications This project can be used to change the direction of the antenna to obtain maximum radiations. This project can be used in military applications for surveillance and monitoring the secured premises. References:

1. www.wikipedia.com 2. www.8051projects.info 3. www.8052.com 4. http://www.ecse.rpi.edu/~schubert/Unused%20stuff/More%20reprints/2002%20Carruthers

%20%28Wiley%20Encyclopedia%29%20Wireless%20infrared%20communications.pdf
5. http://en.wikipedia.org/wiki/Infrared 6. http://www.windows.ucar.edu/tour/link=/physical_science/magnetism/em_infrared.html&e

du=mid
7. http://www.zntu.edu.ua/base/lection/rpf/lib/zhzh03/8051_tutorial.pdf 8. http://www.atmel.com/dyn/resources/prod_documents/doc1919.pdf 9. http://www.imagesco.com/articles/picstepper/02.html 10. http://www.solarbotics.net/library/pdflib/pdf/motorbas.pdf 11. http://www.st.com/stonline/products/literature/ds/5279/uln2003.pdf