Reg.,No. B.E/B.

TECH DEGREE EXAMINATION, MAY - 2010 Second Year- Fourth Semester 141403 COMPUTER ARCHITECTURE AND ORGANIZATION MODEL QUESTION PAPER - I Max Marks: 100 ANSWER ALL QUESTIONS PART -A (10 x 2 = 10 Marks) 1. Give an example each of zero, one, two and three address instructions. 2. Draw block diagram of a basic processor. 3. What is the address sequencing capabilities required in a control memory? 4. Explain structural hazard. 5. Define locality of reference and what are its types? 6. What are interrupt masks provided in any processor? 7. What is the necessity of an interface? 8. Distinguish between static and dynamic branch prediction approaches. 9. Differentiate direct and indirect addressing mode. 10. State the differences between hardwired and micro programmed control unit? PART-B ( 5 x 16 = 80 Marks) 1 (a) Write the basic performance equation and using this equation explain how the performance of a system can be improved? (16) (OR) (b) i) With a neat diagram explain Von Neumann computer architecture. ii) What are the major instruction design issues? (16) 2 (a) Describe the multiple bus organization and compare it with the single bus organization. (16) (OR) (b) Explain in detail about the hardwired control unit 3 (a) Explain the various pipelining hazards and their remedies in the processor (OR) (b) Explain the exception handling in detail. Explain the use of TLB. (OR) (b) Describe the working principle of RAM, ROM and cache memories. Compare them based on their speed, size and cost. (16) (16) (16) 4 (a) How does a virtual address gets translated into a physical address. Explain in detail with neat diagram. (16) (16) (12) (4)

Time: 3 Hrs.

KC TECH/Model Question. Paper/2012

5 (a) Draw the typical block diagram of a DMA controller and explain how it is use for direct data transfer between memory and peripherals (OR) (b) Explain in detail about standard I/O interfaces. (16) (16)

KC TECH/Model Question. Paper/2012

Reg.,No. B.E/B.TECH DEGREE EXAMINATION, MAY - 2010 Second Year- Fourth Semester 141403 COMPUTER ARCHITECTURE AND ORGANIZATION MODEL QUESTION PAPER - II Max Marks: 100 ANSWER ALL QUESTIONS PART -A (10 x 2 = 10 Marks) 1. Define underflow and overflow. 2. Differentiate direct and indirect addressing mode. 3. Discuss the principle of operation of a micro programmed control unit. 4. Define pipelining 5. What is the function of a TLB? 6. What is virtual memory and how is it implemented? 7. Why DMA does have priority over the CPU when both request a memory transfer? 8. What are tri- state gates? 9. List the conditions to overcome data hazard. 10. How does bus arbitration typically work?

Time: 3 Hrs.

PART-B ( 5 x 16 = 80 Marks) 1. (a) Explain briefly the various types of addressing modes with example (Or) (b) (i) Describe the functional units of a computer system. (16) (16)

2. (a)Explain micro programmed control unit. What are the advantages and disadvantages of it.(16) (Or) (b) Explain the execution of an instruction in detail with diagram. . (16) (16)

3. (a) Explain how the performance of the instruction pipeline can be improved. (Or)

(b) Explain the concept of pipelining. Discuss the various influences of pipelining hazards on instruction set (16)

KC TECH/Model Question. Paper/2012

4. (a) i) Describe the working principle of a typical magnetic disk. (6) ii) Discuss the address translation mechanism and the different page replacement policies used in a virtual memory system (10) (Or) (b) Discuss various mapping schemes used in cache design. Compare the schemes in terms of cost and performance (16) 5. (a) Explain in detail about interrupt handling (Or) (b) Describe the various mechanisms for accessing I/O devices. (16) (16)

KC TECH/Model Question. Paper/2012

Reg.,No. B.E/B.TECH DEGREE EXAMINATION, MAY - 2010 Second Year- Fourth Semester 141403 COMPUTER ARCHITECTURE AND ORGANIZATION MODEL QUESTION PAPER - III Max Marks: 100 ANSWER ALL QUESTIONS PART -A (10 x 2 = 10 Marks) 1. Why data bus is bidirectional and address bus is unidirectional in most of the microprocessors? 2. What is a bus? What are the different buses in CPU? 3. Write the sequence of control steps required for three bus structures for the following instruction: AddR4, R5, R6. 4. Discuss the principle of operation of a micro programmed control unit. 5. List the differences between static and dynamic RAM. 6. What are the types of memory? 7. What is DMA operation? State its advantages 8. What is the ideal speed up expected in a pipelined architecture with n stages? Justify your answer. 9. Define average access time for a computer system with two levels of cache. 10. Define pipelining. PART-B ( 5 x 16 = 80 Marks) 1. a) Explain in detail how to implement floating point operation (Or) b) Describe the full adder circuit and explain how it is used in the multiplication of two signed numbers (16) (16)

Time: 3 Hrs.

2. a) i)With a suitable diagram describe the sequence of micro operations involved in fetching and executing a typical instruction. (6) ii) Explain how the processor is interfaced with the memory with neat block diagram and explain how they communicate. (10) (Or) b) Explain in detail about the hardwired control unit. 3. a) i) Determine the average increase in the value of T1 and performance gain if a hit ratio hs of 94% in the secondary cache and secondary cache miss penalty is 5 clock cycles. 30% of instruction access data in memory with 95 % instruction hit rate and 80% data hit rate. Assume that cache miss penalty is 17 clock cycles. (10) ii) List out the types of hazards and explain about data hazard (6) (Or) b) Explain in detail about the hardwired control unit. (16)

KC TECH/Model Question. Paper/2012

4. a) i)Explain the basic concept of pipelining and comparing it with sequential processing. Draw needed diagrams. (8) ii) Highlight the solutions of instruction hazard (8) (Or) b) Describe the working principle of RAM, ROM and cache memories. Compare them based on their speed, size and cost. (16) 5. a) i)Explain the block diagram for typical serial interface in detail. ii) Explain about vectored interrupt with daisy chain arrangement (or) b) i)Briefly compare the characteristics of SCSI with PCI. ii) Describe the working principle of USB. (10) (6) (8) (8)

KC TECH/Model Question. Paper/2012