Simulation and Fabrication of MEMS based Remote Pressure Sensor

A Project Report

submitted by

HARSH NAIK
EE03B106

Under guidence of Dr.Nandita DasGupta in partial fullment of the requirements for the award of the degree of

BACHELOR OF TECHNOLOGY

DEPARTMENT OF ELECTRICAL ENGINEERING INDIAN INSTITUTE OF TECHNOLOGY, MADRAS. MAY 2007

THESIS CERTIFICATE

This is to certify that the thesis titled Simulation and Fabrication of MEMS based Remote Pressure Sensor, submitted by Harsh Naik, to the Indian Institute of Technology, Madras, for the award of the degree of Bachelor of Technology, is a bona de record of the research work done by him under our supervision. The contents of this thesis, in full or in parts, have not been submitted to any other Institute or University for the award of any degree or diploma.

Prof.Nandita DasGupta Research Guide Professor Dept. of Electrical Engineering IIT-Madras, 600 036

Place: Chennai Date: 10th May 2007

ACKNOWLEDGEMENTS
There are many people who contributed to this thesis that I would like to thank.I would rst like to convey my heartfelt gratitude and thanks to my research guide, Dr.Nandita DasGupta for her invaluable encouragement, support and assistance.Her patience and guidance have pulled me through the challenges of working on this project. I would also like to thank Hari Krishna for his constant help during the course of the project.Thanks to all those at Microelectronics Lab including Madhavi,Sharmaji,Uday,Hareesh,Sheeja, Sachin and Somshekhar Bhatt who have made working here,a truly enjoyable experience.I would also like to thank Amit Mittal who helped during the initial stages of the project. And last but not the least I would like to thank all my friends and seniors at Tapti Hostel who have made my stay here at IIT Madras truely a memorable one,an experience whose memories will be etched in my heart forever.

ABSTRACT
KEYWORDS: MEMS ; Pressure Sensors; Capacitive sensors; Piezoresistive Sensors:Micromaching.

Since the discovery of piezoresistivity in silicon in the mid 1950s, siliconbased pressure sensors have been widely produced. Micromachining technology has greatly beneted from the success of the integrated circuit industry, borrowing materials, processes, and toolsets. Because of this, microelectromechanical systems (MEMS) are now poised to capture large segments of existing sensor markets and to catalyse the development of new markets. Given the emerging importance of MEMS, it is instructive to review the history of micromachined pressure sensors, and to examine new developments in the eld. Pressure sensors,especially capacitive,will be the focus of this thesis. Micromachined pressure sensor typically uses a Silicon membrane as the sensing element and piezoresistors or capacitors for data retrieval.Remote sensing of data indicating variation in pressure allows inplementation of battery free devoces with indenite lifetime and is thus very attractive for bio-medical applications. In this research work capacitive pressure sensors have been simulated and fabricated.Due to pressure variation membrane deects and the value of capacitance changes which can be detected by an external circuit.First an optimum structure was proposed based on results from simulation and a process ow and masks were designed for fabrication of this structure.

ii

TABLE OF CONTENTS
ACKNOWLEDGEMENTS ABSTRACT LIST OF FIGURES 1 Introduction 1.1 1.2 1.3 2 Background and purpose of the research . . . . . . . . . . . . . Statement of the problem and objectives . . . . . . . . . . . . . Organization of the thesis . . . . . . . . . . . . . . . . . . . . . i ii vi 1 1 2 3 4 6 6 7 9 12 14 14 15 18 19 19 21 22 25

Processes for Micromachining 2.1 2.2 2.3 2.4 2.5 Epitaxy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oxidation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lithography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Etching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bonding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Capacitive Pressure Sensors 3.1 3.2 Capacitive Sensing Techniques . . . . . . . . . . . . . . . . . . Micromachined Pressure Sensors . . . . . . . . . . . . . . . . . 3.2.1 Materials . . . . . . . . . . . . . . . . . . . . . . . . . . .

Previous Work 4.1 4.2 4.3 Piezo-resistive Pressure sensor . . . . . . . . . . . . . . . . . . Capacitive Pressure sensor . . . . . . . . . . . . . . . . . . . . . Observations . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Results and Discussion

iii

5.1 5.2 5.3

Simulation Results and Discussion . . . . . . . . . . . . . . . . Mask and Process steps Design . . . . . . . . . . . . . . . . . . Fabrication steps . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.1 5.3.2 5.3.3 5.3.4 5.3.5 Wafer Cleaning . . . . . . . . . . . . . . . . . . . . . . . Oxidation . . . . . . . . . . . . . . . . . . . . . . . . . . Photolithography . . . . . . . . . . . . . . . . . . . . . . Etching . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bonding . . . . . . . . . . . . . . . . . . . . . . . . . . .

25 28 32 34 34 35 36 40 41 42

5.4 6

C-V Measurements . . . . . . . . . . . . . . . . . . . . . . . . .

Summary and Further work

LIST OF FIGURES
1.1 2.1 Concept of a Resonant Absolute Pressure Sensor . . . . . . . . Illustration of the basic process ow in micromachining: Layers are deposited; photo resist is lithographically patterned and then used as a mask to etch the underlying materials. The process is repeated until completion of the microstructure. . . . . . . . . An illustration of proximity and projection lithography. . . . . Double sided alignment scheme. . . . . . . . . . . . . . . . . . Etching proles for different types of etchants. . . . . . . . . . Illustration of the anisotropic etching of cavities in 100-oriented silicon: (a) cavities, self-limiting pyramidal and V-shaped pits, and thin membranes; and (b) etching from both sides o the wafer can yield a multitude of different shapes including hourglassshaped and oblique holes. . . . . . . . . . . . . . . . . . . . . . Illustration of a wafer bonding process. (a)The two wafers to be bonded.(b)Pressing Surfaces. (c)Binding Si-O bonds.(d)Binding Si-Si bonds. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Examples of simple capacitance displacement sensors: (a) moving plate, (b) variable area, and (c) moving dielectric. . . . . . A schematic cross section of a typical pressure sensor diaphragm. Dotted lines represent the undeected diaphragm. . . . . . . . A cross section schematic diagram of a bulk-micromachined, capacitive pressure sensor. . . . . . . . . . . . . . . . . . . . . . . 2

5 8 9 10

2.2 2.3 2.4 2.5

11

2.6

13

3.1 3.2 3.3 3.4 3.5

14 16 16

A cross section schematic diagram of a bulk-micromachined, contactmode pressure sensor. . . . . . . . . . . . . . . . . . . . . . . . 17 A comparison of deection shapes for uniform-thickness (left) and bossed (right) diaphragms. . . . . . . . . . . . . . . . . . . Structure Simulated in CoventerWare . . . . . . . . . . . . . . Circuit Equivalent of the Structure . . . . . . . . . . . . . . . . Results of the simulation of the structure in Figure 4.1 . . . . . Capacitors connected in Parallel . . . . . . . . . . . . . . . . . 17 20 21 22 22

4.1 4.2 4.3 4.4

5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9

A meshed model of the device before simulation . . . . . . . . Results of simulation showing (a)Sensitivity v/s Pressure and (b)Delta C v/s Pressure for different structures. . . . . . . . . . The structure simulated for further analysis. . . . . . . . . . . The nal meshed structure simulated with parallel capacitors. The displacement prole from mechanical analysis. . . . . . . Process ow designed for the fabrication of the pressure sensor. Anisotropic etching of < 100 > silicon. . . . . . . . . . . . . . . (a)The three layer mask.(b)Layer 1-Bottom wafer.(c)Layer 2-Top wafer.(d)Layer 3-Metallization mask. . . . . . . . . . . . . . . . Mask used for fabrication purpose. . . . . . . . . . . . . . . . .

26 27 29 30 30 31 32 33 34 38 39 40 41

5.10 (a)A two dimensional etching prole of the top wafer(b)X-prole of the etched windows showing the etch depth. . . . . . . . . . 5.11 (a)A two dimensional etching prole of the bottom wafer(b)Xprole of the etched windows showing the etch depth. . . . . 5.12 A three dimensional etching prole of the bottom wafer. . . . 5.13 C-V curve of the device at 1KHz. . . . . . . . . . . . . . . . . .

vi

CHAPTER 1

Introduction

1.1

Background and purpose of the research

Sensors can be considered the eyes and ears of any system that requires information about its environment. In many cases human beings take part in such a system. They can act as a sensor to provide a machine with data (entering visually observed date into a computer) or even control the response of a machine (driving a car)(Nandor, 1997). In other cases sensors are required to provide human beings with information they can not directly observe, like radiation. Pressure is a common parameter used in biomedical research as well as in clinical care ; these measurements are essential in many patient management situations, eg; intracranial pressure in neurosurgery, blood pressure in surgery and intensive care, air pressure in respiratory diseases, intrauterine pressure in obstetrics, abdominal and urinary pressure for diagnosis of respective disorders etc . Besides external and internal catheter tip measurements, it is frequently desirable to use implanted pressure measurement systems for long-term monitoring(Menon, 2006). Apart from the biomedical applications, the remote sensing of pressure also nds interesting applications in the automotive industry . Smart Vehicles are based on the extensive use of sensors and actuators. The pressure sensors play a vital role in the performance of these vehicles. A few examples for these are (1) Tyre pressure sensor (2) Exhaust gas differential pressure sensor (3) Fuel rail pressure sensor (4) Gasoline direct injection pressure sensor (5) Fuel tank evaporative fuel pressure sensor etc. Pressure sensor is a device which can be used to measure static pressure, or a pressure in moving uids . Here two types of pressure measurements are

of particular interest : (1) Absolute pressure and (2) Relative pressure (Singh et al., 2005). The absolute pressure is measured relative to perfect vacuum. The relative pressure is measured with respect to some reference pressure. A bulk micromachined pressure sensor typically uses a silicon membrane as the sensing element and piezoresistors or capacitors for data retrieval. When a pressure is applied, stress is developed in the Silicon membrane. This may cause variation in the resistance of the piezoresistors fabricated on top of the membrane (Piezoresistive effect) or alter the gap between the membrane and a xed plate (Capacitive effect). The variation in resistance or capacitance can be sensed as a function of the applied pressure.

1.2

Statement of the problem and objectives

One of the proposed systems for implantable miniaturized continuous pressure measuring sensor (Peterson et al., 2005) integrates a capacitor and inductor in one small chip, forming a resonant LC circuit. The inductor is a spiral micromachined coil made by removing selected portions of a material from a conductive sheet of Al, Au or Cu. The capacitive pressure sensing part consists of a thin deformable Si membrane that forms part of the rst wafer which is bonded to a second wafer that is already etched to form the gap of the capacitor.

Figure 1.1: Concept of a Resonant Absolute Pressure Sensor

In order to be bio-compatible, it is proposed to have the tank circuit on Sili2

con substrate. The pressure range of interest is 0.12 MPa - 0.15 MPa. Hence the pressure sensor should have a linear response in the range 0.1 MPa - 0.17 MPa. The sensor area is restricted to a size of 2mm 2mm. The objective of this project was to design an optimum structure for the pressure sensor operating within the specications mentioned. The approach used was to simulate different structures and pick the one which gives maximum sensitivity and then fabricate it and test it to validate the results from the simulations.

1.3

Organization of the thesis

This chapter presents in brief the relevance of pressure monitoring in biomedical and automotive applications along with a background and specications of the proposed system, a resonant pressure sensor.It also describes the main objective of the research work done. Chapter 2 describes the commonly used processes that are used in the fabrication of MEMS. In Chapter 3 the basic design of a Capacitive pressure sensor id discussed. Chapter 4 describes the previous work done on this project on which this research work is based. Chapter 5 describes the results of the simulation work done and also the process ow used to fabricate the pressure sensor and the results of fabrication. Chapter 6 presents the summary of the work done.

CHAPTER 2

Processes for Micromachining

This chapter presents methods used in the fabrication of MEMS. Many are borrowed from the integrated-circuit industry,in addition to others developed specically for silicon micromachining.There is no doubt that the use of process equipment and the corresponding portfolio of fabrication processes initially developed for the semiconductor industry has given the burgeoning MEMS industry the impetus it needs to overcome the massive infrastructure requirements. For example, lithographic tools used in micromachining are often times from previous generations of equipment designed for the fabrication of electronic integrated circuits. The equipments performance is sufcient to meet the requirements of micromachining, but its price is substantially discounted. A few specialized processes, such as anisotropic chemical wet etching, wafer bonding, deep reactive ion etching, sacricial etching, and critical-point drying, emerged over the years within the MEMS community and remain limited to micromachining in their application (Maluf, 1999). From a simplistic perspective, micromachining bears a similarity to conventional machining in the sense that the objective is to precisely dene arbitrary features in or on a block of material. There are, however, distinct differences. Micromachining is a parallel (batch) process in which dozens to tens of thousands of identical elements are fabricated simultaneously on the same wafer. Furthermore, in some processes,dozens of wafers are processed at the same time.Another key difference is the minimum feature dimension-on the order of one micrometerwhich is an order of magnitude smaller than what can be achieved using conventional machining. Silicon micromachining combines adding layers of material over as silicon wafer with etching(selectively removing material)precise patterns in these layers or in the underlying substrate. The implementation is based on a broad

portfolio of fabrication processes, including material deposition, patterning, and etching techniques. Lithography plays a signicant role in the delineation of accurate and precise patterns. These are the tools of MEMS (see Figure 2.1).

Figure 2.1: Illustration of the basic process ow in micromachining: Layers are deposited; photo resist is lithographically patterned and then used as a mask to etch the underlying materials. The process is repeated until completion of the microstructure.

Epitaxy, sputtering, evaporation, chemical-vapor deposition, and spin-on methods are common techniques used to deposit uniform layers of semiconductors, metals, insulators,and polymers.Lithography is a photographic process for printing images onto a layer of photosensitive polymer (photoresist) that is subsequently used as a protective mask against etching. Wet and dry etching, including deep reactive ion etching, form the essential process base to selectively remove material. The follow ing sections describe some of the fundamentals of the basic process tools relevant to this thesis.

2.1

Epitaxy

Epitaxy is a deposition method to grow a crystalline silicon layer over a silicon wafer, but with a differing dopant type and concentration. The epitaxial layer is typically 1 to 20m thick. It exhibits the same crystal orientation as the underlying crystalline substrate, except when grown over an amorphous material (e.g., a layer of silicon dioxide), it is polycrystalline. Epitaxy is a widely used step in the fabrication of CMOS circuits and has proven efcient informing wafer-scale p-n junctions for controlled electrochemical etching.The growth occurs in a vapor-phase chemical-deposition reactor from the dissociation or hydrogen reduction at high temperature (> 800C) of a silicon- containing source gas. Common source gases are silane (SiH4 ), dichlorosilane (SiH2Cl4 ), or silicon tetrachloride (SiCl4 ). Nominal growth rates are between 0.2 and 4m/min, depending on the source gas and the growth temperature. Impurity dopants are simultaneously incorporated during growth by the dissociation of a dopant source gas in the same reactor. Arsine (AsH3 ) and phosphine (PH3 ), two extremely toxic gases, are used for arsenic and phosphorous (n-type) doping, respectively; diborane (B2 H6 ) is used for boron (p-type) doping.

2.2

Oxidation

High-quality amorphous silicon dioxide is obtained by oxidizing silicon in either dry oxygen or in steam at elevated temperatures(850C1, 150C).Oxidation mechanisms have been extensively studied and are well understood. Charts showing nal oxide thickness as function of temperature, oxidizing environment, and time are widely available (S.M.Sze, 1988). Thermal oxidation of silicon generates compressive stress in the silicon dioxide lm. There are two reasons for the stress: Silicon dioxide molecules take more volume than silicon atoms,and there is a mismatch between the coefcients of thermal expansion of silicon and silicon dioxide. The compressive stress depends on the total thickness of the silicon dioxide layer and can reach 6

hundreds of MPa. As a result, thermally grown oxide lms cause bowing of the underlying substrate. Moreover, freestanding membranes and suspended cantilevers made of thermally grown silicon oxide tend to warp or curl due to stress variation through the thick ness of the lm.

2.3

Lithography

Lithography involves three sequential steps: Application of photoresist (or simply resist), which is a photosensitive emulsion layer; Optical exposure to print an image of the mask onto the resist; Immersion in an aqueous developer solution to dissolve the exposed resist and render visible the latent image.

The mask itself consists of a patterned opaque chromium (the most common), emulsion, or iron oxide layer on a transparent fused-quartz or soda-lime glass substrate. The pattern layout is generated using a computer-aided design (CAD) tool and transferred into the opaque layer at a specialized mask-making facility,often by electron-beam or laser-beam writing. A complete microfabrication process normally involves several lithographic operations with different masks. Positive photoresist is an organic resin material containing a sensitizer. It is spin-coated on the wafer with a typical thickness between 0.5mand10m. The sensitizer prevents the dissolution of unexposed resist during immersion in the developer solution. Exposure to light in the 200 to 450 nm range (ultraviolet to blue) breaks down the sensitizer, causing exposed regions to immediately dissolve in developer solution. The exact opposite process happens in negative resistsexposed areas remain and unexposed areas dissolve in the developer. Optical exposure can be accomplished in one of three different modes:contact, proximity, or projection. In contact lithography, the mask touches the wafer. This normally shortens the life of the mask and leaves undesired photoresist residue on the wafer and the mask.In proximity mode,the mask is brought to

within 25to50m of the resist surface.By contrast,projection lithography projects an image of the mask onto the wafer through complex optics (see Figure 2.2).

Figure 2.2: An illustration of proximity and projection lithography.

While resolution of most lithographic systems is not a limitation for MEMS, lithography can be challenging depending on the nature of the application; examples include exposure of thick resist, topographical height variations, front to back side pattern alignment, and large elds of view.

Double Sided Lithography

Often,lithographic patterns on both sides of a wafer need to be aligned with respect to each other with high accuracy. For example, the fabrication of a commercial pressure sensor entails forming on the front side of the wafer piezoresistive sense elements that are aligned to the edges of a cavity on the back side of the wafer. Different methods of front-to-back side alignment, also known as double-sided alignment,have been incorporated in commercially available tools.Wafers polished on both sides should be used to minimize light scattering during lithography.First, the alignment marks on the mechanically clamped mask are viewed from below by a set of dual objectives,and an image is elec8

tronically stored.The wafer is then loaded with the back side alignment marks facing the microscope objectives and positioned such that these marks are aligned to the electronically stored image. After alignment,exposure of the mask on to the front side of the wafer is completed in proximity or contact mode.

Figure 2.3: Double sided alignment scheme.

2.4

Etching

In etching,the objective is to selectively remove material using imaged photoresist as a masking template. The pattern can be etched directly into the silicon substrate or into a thin lm, which may in turn be used as a mask for subsequent etches. For a successful etch, there must be sufcient selectivity (etchrate ratio) between the material being etched and the masking material. Etch processes for MEMS fabrication deviate from traditional etch processes for the integrated circuit industry and remain to a large extent an art. Deep etching of silicon lies at the core of what is often termed bulk micromachining.No ideal silicon etch method exists,leaving process engineers with 9

techniques suitable for some applications but not others. Distinctions are made on the basis of isotropy, etch medium, and selectivity of the etch to other materials. Isotropic etchants etch uniformly in all directions, resulting in rounded crosssectional features. By contrast, anisotropic etchants etch in some directions preferentially over others, resulting in trenches or cavities delineated by at and well dened surfaces, which need not be perpendicular to the surface of the wafer (see Figure 2.4).The etch medium(wet versus dry)plays a role in selecting a suitable etch method. Wet etchants in aqueous solution offer the advantage of low-cost batch fabrication 25to50100-mm diameter wafers can be etched simultaneously and can be either of the isotropic or anisotropic type. Dry etching involves the use of reactant gases, usually in a low-pressure plasma, but nonplasma gas-phase etching is also used to a small degree. It can be isotropic or vertical.

Figure 2.4: Etching proles for different types of etchants.

Anisotropic Wet Etching

Anisotropic wet etchants are also known as orientation-dependent etchants (ODEs)because their etch rates depend on the crystallographic direction.The list of anisotropic wet etchants includes the hydroxides of alkali metals (e.g., 10

NaOH, KOH, CsOH), simple and quaternary ammonium hydroxides (e.g.,NH4 OH, N(CH3 )4 OH), and ethylenediamine mixed with pyrochatechol (EDP) in water. The solutions are typically heated to 70 100 C. KOH is by far the most common ODE. Etch rates are typically given in the (100) direction, corresponding to the etch front being the (100) plane. The (110) planes are etched in KOH about twice as rapidly as (100) planes, while (111) planes are etched at a rate about 100 times slower than for (100) planes (see Figure 2.5).The latter feature is routinely used to make V-shaped grooves and trenches in (100) silicon wafers, which are precisely delineated by (111) crystallographicplanes.The overall reaction consists of the oxidation of silicon followed by a reduction step: Si + 2OH Si(OH)++ + 4e (oxidation) 2 Si(OH)++ + 4e + 4H2 O Si(OH) + 2H2 (reduction) 2 6 (2.1) (2.2)

Figure 2.5: Illustration of the anisotropic etching of cavities in 100-oriented silicon: (a) cavities, self-limiting pyramidal and V-shaped pits, and thin membranes; and (b) etching from both sides o the wafer can yield a multitude of different shapes including hourglass-shaped and oblique holes.

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2.5

Bonding

Wafer- level bonding of a silicon wafer to another silicon substrate or to a glass wafer plays a key role in all the leading-edge Micro- Electro-Mechanical Systems (MEMS). When used along with the wet or dry etching techniques, the wafer bonding technique can be used to realize (1) membranes of thickness varying from couple of microns to several microns, suitable for pressure sensors over a wide range of pressures, (2) complicated three dimensional structures for accelerometers for sensing acceleration and (3) multilayered device structures such as micropump suitable for biomedical and microuidic applications, and (4) high aspect ratio structures which can compete with the LIGA process.The manufacturers of MEMS require wafer-level bonding of one silicon wafer to another silicon substrate or a glass wafer. This provides a rst level packaging solution that makes these processes economically viable. Silicon wafer bonding for MEMS (K.N.Bhat et al., 2007) is achieved by several different approaches such as (1) anodic bonding, (2) direct bonding and (3) intermediate layer bonding which includes eutectic and glass-frit bonds. Even though the process conditions used for all the three bonding techniques vary, the general process of the wafer bonding follow a three step sequence consisting of surface preparation, contacting and annealing

Fusion Bonding
The surfaces to be bonded have to be at and show an average roughness which is typically in the order of nanometers. The surfaces are then made hydrophylic and the bonding happens by relatively weak Van-der-Walls or Hydrogen Bridge bonding. Any kind of particle is detrimental to bonding and leads to unbonded areas or bubbles at the interface. The presence of particlerelated interface bubbles is a major obstacle in wafer bonding. This can be overcome by performing bonding process on a clean room of class 10 or 100.

12

Figure 2.6: Illustration of a wafer bonding process. (a)The two wafers to be bonded.(b)Pressing Surfaces. (c)Binding Si-O bonds.(d)Binding SiSi bonds.

13

CHAPTER 3

Capacitive Pressure Sensors

3.1

Capacitive Sensing Techniques

The physical structures of capacitive sensors are relatively simple. The technique nevertheless provides a precise way of sensing the movement of an object. Essentially the devices comprise a set of one (or more) xed electrode and one (or more) moving electrode.They are generally characterized by the inherent nonlinearity and temperature cross-sensitivity, but the ability to integrate signal conditioning circuitry close to the sensor allows highly sensitive, compensated devices to be produced.Figure 3.1 illustrates three congurations for a simple parallel plate capacitor structure (Beeby et al., 2004).

Figure 3.1: Examples of simple capacitance displacement sensors: (a) moving plate, (b) variable area, and (c) moving dielectric.

For a simple parallel plate capacitor structure, ignoring fringing elds, the capacitance is given by C= 0 r A d (3.1)

wheree 0 is the permittivity of free space,r is the relative permittivity of the material between the plates,A is the area of overlap between the electrodes,and

d is the separation between the electrodes.The equation shows that the capacitance can be varied by changing one or more of the other variables. Figure 3.1(a) shows the simple case where the lower electrode is xed and the upper electrode moves. In this case the separation, d, is changing and hence the capacitance varies in a nonlinear manner.Figure 3.1(b)depicts a device where the separation is xed and the area of overlap is varied. In this conguration, there is a linear relationship between the capacitance and area of overlap. Figure 3.1(c) shows a structure that has both a xed electrode distance and area of overlap. The movement is applied to a dielectric material (of permittivity r ) sandwiched between two electrodes. A common problem to all of these devices is that temperature will affect all three sensing parameters d, A, and r , resulting in changes in the signal output. This effect must be compensated for in some manner,whether by additional signal conditioning circuitry or, preferably, by geometric design. Capacitor structures are relatively straightforward to fabricate, and membrane type devices are often used as the basis for pressure sensors and microphones. More elaborate structures, such as interdigitated capacitors, are also used, and the effects of the fringing elds cannot always be ignored.With such devices,the simple parallel plate capacitor equation only provides a crude estimate of the expected capacitance change. Capacitive techniques are inherently less noisy than those based on piezoresistance owing to the lack of thermal (Johnson) noise. With micromachined devices, however, the values of capacitance are extremely small (in the range of femto to attofarads), and the additional noise from the interface electronic circuits often exceeds that of a resistance-based system.

3.2

Micromachined Pressure Sensors

Micromachined pressure sensors have found wide applications in areas such as automotive systems, industrial control, environmental monitoring and biomed-

15

ical diagnostics. Capacitive pressure sensor converts the pressure change into a capacitance variation, to provide higher sensitivity, lower which tends temperature coefcients, more robust structure and lower power consumption compared to piezoresistive devices(Zhou et al. (2002)). Most sensors for greater than atmospheric pressure share the common characteristic of deformable diaphragms. In diaphragm-based sensors, pressure is determined by the deection of the diaphragms due to applied pressure. Figure 3.2 illustrates a schematic cross section of a typical pressure sensor diaphragm(W.P.Eaton and J.H.Smith (1997)). The reference pressure can be a sealed chamber or a pressure port so that absolute or gauge pressures are measured, respectively. The shape of the diaphragm as viewed from the top is arbitrary, but generally takes the form of a square or circle.

Figure 3.2: A schematic cross section of a typical pressure sensor diaphragm. Dotted lines represent the undeected diaphragm.

A typical bulk-micromachined capacitive pressure sensor is shown in Figure 3.3.

Figure 3.3: A cross section schematic diagram of a bulk-micromachined, capacitive pressure sensor.

16

A capacitive sensor can be operated in contact mode to increase linearity (Figure 3.4). In contact mode, the capacitance is nearly proportional to the contact area, which in turn exhibits good linearity with respect to applied pressure (W.P.Eaton and J.H.Smith (1997)). This holds true over a wide range of pressures. However, this linearity comes at the expense of decreased sensitivity.

Figure 3.4: A cross section schematic diagram of a bulk-micromachined, contact-mode pressure sensor.

Another method for achieving a linear response is to use bossed diaphragms. Figure 3.5 illustrates this concept. On the left is a cut-away view of a uniformthickness diaphragm and its corresponding cross-sectional deected mode shape. A non-uniform, bossed diaphragm is on the right. The thicker centre portion (or boss) is much stiffer than the thinner tether portion on the outside. The centre boss contributes most of the capacitance of the structure and its shape does not distort appreciably under applied load. Hence the capacitancepressure characteristics wil be more linear.

Figure 3.5: A comparison of deection shapes for uniform-thickness (left) and bossed (right) diaphragms.

17

3.2.1

Materials

The quality and reproducibility of constituent materials play a critical role in the commercial viability of pressure sensors. The focus of this paper will be bulk and surface micromachining, where the desired mechanical structures are made from the substrate itself, or thin lms deposited on the substrate, respectively. In bulk micromachining one of the dominant materials is single-crystal silicon. The mechanical properties of single-crystal silicon are excellent, as reported in a landmark article by Petersen in 1982 (K.E.Petersen (1982)). It has high strength, high stiffness, high mechanical repeatability, high, and no mechanical hysteresis. Furthermore, single-crystal silicon is available in large quantities with high purity and low defect densities. Piezoresistive gauge factors in silicon are higher than in metal, but temperature coefcients of resistance (TCRs) are high. Because of high TCRs, silicon microsensors often require temperature compensation techniques.

18

CHAPTER 4

Previous Work

As stated in Chapter 1 the approach used to reach at an optimum structure was to simulate different structure conforming with the given specication and pick the best out of them.The initial simulations were done for both Piezoresistive and Capacitive sensors .This chapter presents the previous work done which was the starting point of this research work.

4.1

Piezo-resistive Pressure sensor

The piezo-resistive pressure sensor is designed in Coventorware software. The membrane model is created by using the process le and layout (which species dimensions of the membrane). All the sides of the membrane are made xed and pressure is applied at the top face. Memmech module is used for analysis. The pressure is varied from 0-0.17MPa. The piezo resistors are positioned on the membrane to get maximum sensitivity. For a single crystal silicon piezo resistors as the longitudinal gauge factor and transverse gauge factor are almost same and opposite in sign, the resistors are placed such that two of the resistors (which experience more longitudinal stress) in a Wheatstone bridge conguration increases and two resistors decreases (which experience more transverse stress) . The position of resistors on the membrane is shown in the Figure 4.1. To nd sensitivity the Gauge factor is given by G= R/R Strain (4.1)

Figure 4.1: Structure Simulated in CoventerWare

Piezo-resistive coefcient is given by = R/R Stress (4.2) (4.3)

R = l l + t t R where l is Longitudinal stress t is Transverse stress l is Longitudinal piezo-resistive coefcient t is Transverse piezo-resistive coefcient As Youngs modulus E = stress/strain = Therefore R Gl l + Gt t = R E Gl is Longitudinal Gauge factor Gl is Transverse Gauge factor E is the Youngs modulus The circuit equivalent for the structure simulated is given in Figure 4.2 G E

(4.4)

(4.5)

20

Figure 4.2: Circuit Equivalent of the Structure

V0 =

VIN VIN (R R) + (R + R) 2R 2R R V0 = VIN R

(4.6) (4.7)

Sensitivity is given by S= V0 /VIN P

R R .

(4.8)

where P is the pressure applied.Thus sensitivity is proportional to

Figure 4.3 shows the for 1500m 1500m 5m membrane for different pressures. The gure shows the linearity within the range and Sensitivity is the change in resistance at 1bar pressure.

4.2

Capacitive Pressure sensor

In capacitive pressure sensor the capacitance between two electrodes is obtained for the applied pressure. Maximum pressure of 0.17MPa is applied in all cases. This is modeled in Intellisuite software. First, capacitance is found for different dimensions of the membrane by applying pressure to one of the electrodes and zero voltage to both the electrodes. The Table 4.1 shown below gives the C (Difference between no load capacitance and max. load capacitance) for different dimensions of the membrane. The Table 4.2 shows the C for the capacitors connected in parallel. The gure 4.4 shows parallel capacitors 21

Figure 4.3: Results of the simulation of the structure in Figure 4.1

simulated in Intellisuite.The thickness of the membrane is 5m.

Figure 4.4: Capacitors connected in Parallel

4.3

Observations

Different structure were simulated at the maximum pressure of 0.17MPa.It can be observed from Table 4.1 that the rows marked in bold gave the best possible

22

Pressure Dimension Deection Gap Capacitance Capacitance C=C p C (MPa) ( m m) (m) (m) No load with load (pF) C(pF) C p (pF) 0.17 200 200 0.18 0.36 1.0212 1.262 0.2408 0.17 250 250 0.45 1 0.64645 0.7794 0.13295 0.17 300 300 0.886 2 0.4176 0.4944 0.07 0.17 350 350 1.6 2.6 0.4369 0.5676 0.1307 0.17 400 400 2.506 3.5 0.4284 0.604758 0.1764 0.17 450 450 3.57 4.6 0.41512 0.627 0.2118 0.17 500 500 4.7 5.7 0.4148 0.67076 0.256 0.17 200 400 0.356 0.8 1.26083 1.72215 0.46132 0.17 250 500 0.83 2 0.5883 0.7 0.1117 0.17 300 600 1.68 2.7 0.6507 0.934 0.2833 0.17 350 700 2.77 3.8 0.6326 1.024 0.3914 0.17 400 800 4 5 0.6654 1.3214 0.656 0.17 500 1000 6.5 Table 4.1: Table showing sensitivity for different sizes of capacitors.

Parallel Dimension Deection Gap Capacitors ( m m) (m) (m) 2 3 4 2 3 4 2 3 4 2 3 4 2 3 4 200 200 0.18 0.36

200 400

0.356

0.8

300 600

1.75

350 700

2.8

400 800

Capacitance Capacitance C=C p C No load with load (pF) C(pF) C p (pF) 1.99 2.462 0.472 2.987 3.696 0.709 3.981 4.863 0.882 1.806 2.221 0.415 2.707 3.297 0.59 3.612 4.398 0.786 1.104 1.466 0.362 1.661 2.203 0.542 2.212 2.907 0.695 1.131 1.713 0.582 1.7 2.559 0.859 2.269 3.295 1.026 1.183 2.091 0.908 1.78 3.142 1.362 2.373 4.152 1.779

Table 4.2: Table showing sensitivity for different sizes of capacitors connected in parallel with applied pressure of 0.17MPa and the spacing between the capacitors of 50m.

23

sensitivities and those structures should be explored further.Also theory shows that connecting capacitors in parallel increases the capacitance.Hence optimum structures from Table 4.1 were simulated with capacitors in parallel considering the space constraints.The results are shown in Table 4.2.However these were done at maximum pressure of 0.17MPa.Hence linearity still needed to be veried.Simulations were carried out the check these structure for linearity.The following section discusses the results of simulation.

24

CHAPTER 5

Results and Discussion

This chapter presents with the simulation and fabrication work done based on the observations made in the previous chapter.

5.1

Simulation Results and Discussion

The structures in Table 4.2 were simulated for the pressure range 0.1 to 0.17MPa to check for linearity of sensitivity with pressure.The simulation was done using Thermo Electro Mechanical (TEM) module of Intellisuite .The procedure used for simulating in Intellisuite is described below. The device consists of two parallel plates of Silicon. The spacing d between them based on the work by Menon (2006) is xed depending on the value of dmax .Where dmax is the deection of a single plate at maximum pressure. If dmax < 1 m then d = 2 dmax and if dmax > 1 m then d = dmax + 1 m. The lower plate is xed while the upper plate is deformable.Zero voltage is applied to both the plates. Different values of pressure is applied and capacitance value is studied.The steps followed for this analysis are listed below : Create a model of the capacitive pressure sensor using the 3D builder. Save it in the Thermo Electro Mechanical module of Intellisuite Set the simulation setting as Thermo Electro Mechanical Relaxation Analysis Dene material properties for the structure ( in this case that of (100) Si ) Apply loading zero volts to both plates and the pressure on the top surface of the upper plate and appropriate boundary conditions. The four edges of the membrane are xed. Mesh the device.

 Run static analysis. After the analysis note down the value of capacitance. Figure 5.1 shows an example structure simulated.

Figure 5.1: A meshed model of the device before simulation

Several structures were simulated and the results are summarized in the Figure 5.2.The thickness of the membrane is 5m. A couple of observation can be made from the graph above. The sensitivity increases on increasing the membrane size. However the response also becomes nonlinear on increasing the membrane size. Thus,the structure having a linear response and maximum sensitivity is 350 700m with 6 capacitors in parallel.Hence this structure was chosen for further analysis. Now analysis was done on this structure to optimize the bonding area of the structure to minimize the stray capacitances due to the supports for the membrane.Hence an actual structure to be fabricated,taking in to consideration the 26

Figure 5.2: Results of simulation showing (a)Sensitivity v/s Pressure and (b)Delta C v/s Pressure for different structures.

27

bonding area for the two wafers, was simulated.Figure 5.3 shows the structure simulated.In the structure the layer II contributes to the bonding area. Figure 5.4 shows the nal structure simulated with the bonding area width being 500m,which effectively is also the gap between the adjacent capacitors. However the structure was too large and hence only mechanical analysis could be done,simulations didnt converge for electromechanical analysis.Hence capacitance information could not be extracted.The results of mechanical analysis is shown in Figure 5.5. To validate the reason for non-convergence being the large structure, simulations were done with smaller structures,and gradually increased.Simulations were started with a single capacitor and it was found that simulations converged until 4 capacitors in parallel.It was also found that capacitance for 2 and 4 capacitors in parallel was roughly 2 and 4 times the capacitance of a single capacitor respectively.Hence it was decided to do simulation for a single capacitor and multiply the capacitance by 6 to get the results for the required structure.However,due to unsatisfactory results from simulation it was decided to start with the fabrication work by designing a mask with bonding area width as 1500m,based on previous results on bonding in the laboratory.

5.2

Mask and Process steps Design

This section describes the process ow designed for the fabrication of the pressure sensor.It also presents with the design of a mask which was made for testing the results from simulation.Figure 5.6 gives a schematic of the process steps involved in the fabrication of the pressure sensor. As seen from Figure 5.6 Step 3 Lithography requires a mask to selectively etch the oxide and get a pattern on the wafer.Thus masks were designed to get the required pattern after etching. We want a rectangular cavity of 350 700m.Thus the width of the mask

28

Figure 5.3: The structure simulated for further analysis.

29

Figure 5.4: The nal meshed structure simulated with parallel capacitors.

Figure 5.5: The displacement prole from mechanical analysis.

30

Figure 5.6: Process ow designed for the fabrication of the pressure sensor.

31

opening wm is determined from etch depth z,width of the bottom cavity w0 and the angle = 54.74 which is the angle between the < 100 > and < 111 > planes (J.Madou, 2002).

Figure 5.7: Anisotropic etching of < 100 > silicon.

wm = w0 + 2z cot

(5.1)

Using Equation 5.1 the masks were designed for the patterning of the bottom and the top wafer using the etch depths z as 4 and 275m respectively.A mask was also designed for the metallization step which will be done after bonding to provide the contacts.Thus,a three layer mask was designed using the IntelliMask module of the Intellisuite software.The masks designed are shown below in Figure 5.8. However,due to some constraints in the lab the mask couldnt be written and a different mask shown in Figure 5.9 was used for both the top and bottom wafers.

5.3

Fabrication steps

This section describes the process steps carried out to fabricate the capacitive pressure sensor for testing purposes.Let us go through each processes, step by step and describe the procedure followed for each steps.

32

Figure 5.8: (a)The three layer mask.(b)Layer 1-Bottom wafer.(c)Layer 2-Top wafer.(d)Layer 3-Metallization mask. 33

Figure 5.9: Mask used for fabrication purpose.

5.3.1

Wafer Cleaning

Semiconductor wafers are subjected to physical handling during the process. This leads to molecular contamination ( S.M.Sze (1988)). Removal of these contaminants is called cleaning. Two p-type < 100 > Double Side Polished (DSP) quarter wafers were taken.The wafer thickness was measured to be 307m.The cleaning steps are: 1. The wafer is boiled in hot organic solvent trichloro ethylene (TCE) for about 2 minutes till bubbles start to form to remove the organic impurities such as grease. 2. The wafer is then boiled in acetone for about 2 minutes till the start of bubble formation which removes the TCE, followed by rinsing in deionised water and drying by blowing nitrogen with air gun. 3. To remove the inorganic impurities such as chromium and gold, the wafer is boiled in HNO3 for 10 minutes, rinsed with DI water and then dried with air gun. All these steps carried out for 10 to 20 minutes at 75 85C. Finally the wafer is dipped in dilute HF(HF:H2 O::1:10) to remove the native oxide. Now the wafer is ready for dilute oxidation.

5.3.2

Oxidation

Oxide growth is carried out in a quartz diffusion tube in which the silicon wafer is o kept at a temperature of 1050C. High-density ceramic liner is used to serve 34

as a diffusion barrier to sodium, which is present in furnace heating elements (Sorab.K.Gandhi (1983)). In the early stages of growth, oxide thickness varies linearly with time. In later stages the reaction is diffusion limited and oxide thickness is proportional to the square root of time. The oxidation rate increases with temperature and pressure. Thick layers are grown by wet oxidation method, which gives high oxidation rate. To get good quality of oxide, oxidation is carried out by alternative dry-wet-dry oxidation methods. Steps followed during the oxidation 1. The thermal oxidation furnace is switched on and the temperature is set to 1050C. 2. The well cleaned p-type Silicon wafers are loaded into oxidation furnace. 3. The furnace is kept in dry oxidation mode and oxygen at 20lts/hr is passed for 15 minute. 4. The furnace is changed to wet oxidation mode, where oxygen bubbled through water at 98C, is introduced into the furnace at the rate of 2lts/hr for a time of 4 hours for the top wafer and for 15 minutes for the bottom wafer. 5. Furnace is again switched to dry oxidation mode and oxygen is passed at the rate of 20 lts/hr for 15 minute. 6. Annealing is carried out in nitrogen ambient at 20lts/hr for 30 minutes. This process is carried to reduce the xed oxide charges. 7. Loading and unloading of wafers are carried out in nitrogen ambient; slow push and pull rates are employed to reduce the steepness of thermal gradients.

The above procedure gave an oxide thickness of about 0.99m(measured from ellipsometry measurements).

5.3.3

Photolithography

Photolithography was used to open the windows in the oxide on both the wafers.The steps used in lithography are listed below. 35

1. The wafer is kept in post bake furnace for 5 minute to remove any moisture present. 2. The wafer is spun at 1000 rpm for 30 sec. after a small quantity of pre ltered PPR has been coated on it. 3. The wafer is pre baked for 20 minute at 80 90C. 4. The mask is placed over the wafer and is exposed to UV light for 30 sec. 5. The wafer is rinsed in developer (sol. of 50 ml DI water and 3 pellets of KOH) followed by rinsing in DI water. This removes the exposed PPR. 6. The wafer is post baked at 120C for 30 minute.

5.3.4

Etching

Oxide Etching 1. Before etching the back oxide is protected by coating thick PPR on back side of wafer. 2. The oxide in the exposed windows is etched by dipping the wafer in BHF solution for 12 minutes for top wafer and 2 minutes for bottom wafer followed by DI water rinse. 3. After etching, the wafer is rinsed in acetone followed by cleaning in H2 SO4 + H2 O2 (3 : 1) solution and then DI water rinse to remove unexposed and back coated PPR.

Now the wafer is ready for wet etching.

Wet Si Etching To realize the membrane structure, wet etching is carried out using 40% KOH solution. 80 gm of KOH (in pellets) is taken with 200 ml of DI water and mixed proper manner to make perfect solution. This beaker is placed in water bath and its temperature is raised to 80C using temperature controller. After the required temperature is achieved, the wafer is placed in the beaker after giving a dip in dilute HF(HF:H2 O::1:10)solution for 1 minute.The beaker is then covered with lid.

36

After etching for 3 hours and 20 minutes it was found that the oxide mask for the wet etching was also etched.Etch rate from this was calculated to be around 58m/hour.It was concluded that the temperature of etching was high and was reduced to 76C for subsequent etching steps.It was decided to do etching rst only for 3 hours and then again do oxidation,photolithography and nally etch down to required thickness. Thus,another wafer was taken and was subjected to the following steps. 1. 4 hours of wet oxidation. 2. Lithography as described in Section 5.4.3. 3. Etching for 3 hours at 76C.Etch depth was calculated to be 170m,thus etch rate was calculated to be 56.66m. 4. RCA I (NH4 OH:H2 O2 :DI H2 O::1:1:5 solution for 20minutes at 80C) and RCA II clean(HCl:H2 O2 :DI H2 O::1:1:5 solution for 20minutes at 80C). 5. Wet oxidation for 4 hours. 6. Lithography 7. Etching for 2 hours and 15 minutes based on etch rate calculated in step 3.The etch depth was found to be 298m.

The bottom wafer was also subjected to same etching conditions for 8 minutes and the etch depth was found to be 8m.The etching proles for both the wafers observed using the surface proler is shown Figure 5.10 and Figure 5.11. As seen from the 2-D prole the etch depth for the top wafer is not uniform.Possible reason suggested for this is that during second lithography mask pattern was not aligned exactly over the pattern after rst etching. Figure 5.12 also shows the 3-D etching pattern of the bottom wafer. After etching both the wafers,top wafer was etched in BHF solution for about 5 minutes to remove any oxide left after the KOH etching.

37

Figure 5.10: (a)A two dimensional etching prole of the top wafer(b)X-prole of the etched windows showing the etch depth.

38

Figure 5.11: (a)A two dimensional etching prole of the bottom wafer(b)Xprole of the etched windows showing the etch depth.

39

Figure 5.12: A three dimensional etching prole of the bottom wafer.

5.3.5

Bonding

Once the etching was complete for both the wafers they were bonded.The bonding procedure is outlined below. 1. RCA I and RCA II cleaning 2. Make the wafers hydrophillic by cleaning with DI water before loading the wafers. 3. Contact the wafers. 4. Increase the temperature to 450C. 5. Make a vacuum of 2 105 mbar. 6. Apply tool pressure of 200mbar. 7. Decrease the temperature to 250C. 8. Unload the sample.

After following the above procedure the two wafers were successfully bonded.

40

5.4

C-V Measurements

Once the wafer was bonded the C-V measurements were carried out on the device.Figure 5.13 shows the C-V curve.It can be inferred that the pull in occurs for positive voltage after approximately 10V.However,pull-in is not observed for negative voltage.Also,the dissipation factor of the device was found to be high,indicating poor quality of oxide. Also from the maximum and minimum

Figure 5.13: C-V curve of the device at 1KHz.

value of the capacitance the maximum deection can be calculated from the equation below. d1 d0 = 1 Cmin 1 Cmax 0 A (5.2)

where Cmin = 2.7pF , Cmax = 1.98nF, A = 1.5 1.5mm2 .Substituting these values we get maximum deection as 7.4m,which is close to etch depth of 8m as seen from Figure 5.11.

41

CHAPTER 6

Summary and Further work

Based on the simulation work it was concluded that the membrane structure with dimensions 350 700m with six capacitors in parallel has the maximum sensitivity and a linear response.It was also observed that when membrane dimensions reach 400m non-linearity creeps in.It is suggested that simulations be carried out with different bonding areas to determine the optimum bonding area. Fabrication was carried out with a mask with 3mm 3mm as the bonding area,and it was found to be sufcient as the bonding procedure was successful. C-V measurements were done on the bonded device.More characterization of the device can be done and relate voltage deections with pressure.However,it is suggested that fabrication be carried out with the mask in Figure 5.8 to validate the results from simulation.

REFERENCES
1. Beeby, S. P., G. Ensel, and M. Kraft, MEMS Mechanical Sensors. Artech House Publishers, 2004. 2. J.Madou, M., Fundamentals of Microfabrication: The Science of Miniaturization. CRC; 2 edition, 2002. 3. K.E.Petersen (1982). Silicon as a mechanical material. IEEE Proceedings, 70, 420457. 4. K.N.Bhat, A.DasGupta, P. Rao, N.DasGupta, E.Bhattacharya, K.Sivakumar, V. Kumar, L. Anitha, J.D.Joseph, S.P.Madhavi, and K.Natarajan (2007). Wafer bonding a powerful tool for mems. Indian Journal of Pure and Applied Physics, 45. 5. Maluf, N., An Introduction to Microelectromechanical Systems Engineering. Artech House Publishers, 1999. 6. Menon, P. (2006). Design of Pressure Sensors for Remote Sensing of Pressure, Department of Electrical Engineering, IIT-Madras, Chennai. 7. Nandor, F. (1997). A design methodology for low-cost, high-performance capacitive sensors, Delft University of Technology, Netherlands. 8. Peterson, K., G. T.A.Kovacs, T. G.Ryan, L. G.Partamian, and D. A.Lee, Implantable continuous intraocular pressure sensor. United States Patent 6939299, 2005. 9. Singh, R., L. L. Ngo, H. S. Seng, and F. N. C. Mok, A silicon piezoresistive pressure sensor. In DELTA 02: Proceedings of the The First IEEE International Workshop on Electronic Design, Test and Applications (DELTA 02). IEEE Computer Society, Washington, DC, USA, 2005. ISBN 0-7695-1453-7. 10. S.M.Sze, VLSI Technology. John Wiley, Second Edition, 1988. 11. Sorab.K.Gandhi, VLSI FABRICATION PRINCILES Silicon and Gallium Arsenide. John Wiley, 1983. 12. W.P.Eaton and J.H.Smith (1997). Micromachined pressure sensors : review and recent developments. Smart materials and structures (Smart mater. struc.) ISSN 0964-1726, 6(5), 530539. 13. Zhou, M. X., Q. A. Huang, and M. Qin, A capacitive pressure sensor with a novel multi-layered composite membrane structure fabricated by a three-mask process. In The 13th International Conference on Solid-state Sensors, Actuators and Microsystems, Seoul, Korea. Key Laboratory of MEMS of Ministry of Education, Southeast University, Nanjing,China, 2002. 43