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DOC/LP/00/08.12.

09 LESSON PLAN Sub Code & Name: CS2253-Computer organization and Architecture
Branch : CS Semester : B.E-IV LP-CS 2253 LP: Rev. No: 00 Date:10:12:09 Page 1 of 6

UNIT-I BASIC STRUCTURE OF COMPUTERS

Syllabus Functional Units-Basic Operational Units-Bus StructuresPerformance and metrics and Instructions and Instruction SequencingHardware-Software Interface-Instruction Set Architecture-Addressing modes-RISC-CISC-ALU Design-Fixed point and Floating point Operations.

Objectives: To understand the Functions and design of various units of digital computers to store and process the informations. Session no 1 2 3 4 5 6 7 8 9 Topics to be covered Functional Units, Basic Operational Units Bus Structures, Performance and metrics and Instructions and Instruction Sequencing Hardware,Software Interface Instruction Set Architecture, Addressing modes RISC,CISC ALU Design Fixed point Operations Floating point Operations Time in min. 50 50 50 50 50 50 50 50 50 Ref. T1 T1 T1 R2 T1 R2,R3 R2,R3 R2,R3 R2,R3 Teaching method BB BB BB BB BB BB BB BB BB

DOC/LP/00/08.12.09 LESSON PLAN Sub Code & Name: CS2253-Computer organization and Architecture
Branch : CS Semester : B.E-IV LP-CS 2253 LP: Rev. No: 00 Date:10:12:09 Page 2 of 6

UNIT II - BASIC PROCESSING UNIT

Syllabus: Fundamental concepts Execution of a complete instruction Multiple bus organization Hardwired control Micro programmed control Nano programming. Objectives: To study the Fundamental concepts of various processing units. Session no. 10. 11. 12. 13. 14. 15. 16. 17. 18. Topics to be Covered Fundamental concepts Execution of a complete instruction Multiple bus organization Introduction about control units Hardwired control Micro programmed control Nano programming Revision for CAT I CAT - I Time in min. 50 50 50 50 50 50 50 50 Ref. T1 T1 T1 T1 T1 T1 R2 Teaching Method BB BB BB BB BB BB BB

DOC/LP/00/08.12.09 LESSON PLAN Sub Code & Name: CS2253-Computer organization and Architecture
Branch : CS Semester : B.E-IV LP-CS 2253 LP: Rev. No: 00 Date:10:12:09 Page 3 of 6

UNIT III - PIPELINING

Syllabus: Basic concepts Data hazards Instruction hazards Influence on instruction sets Data path and control considerations Performance considerations Exception handling. Objectives: To know and understand the various types of hazards and Exception handling concepts.. Session no. 22. 23. 24. 25. 26. 27. 28. 29. Basic concepts Data hazards Instruction hazards Influence on instruction sets Data path control considerations Performance considerations Exception handling. Topics to be covered Time in min. 25 50 50 25 50 50 50 50 T1 T1 T1 T1 T1 T1 T1 R2 Ref. Teaching Method BB BB BB BB BB BB BB BB

LESSON PLAN Sub Code & Name: CS2253-Computer organization and Architecture
Branch : CS Semester : B.E-IV

LP-CS 2253 LP: Rev. No: 00 Date:10:12:09 Page 4 of 6

DOC/LP/00/08.12.09

UNIT IV - MEMORY SYSTEM

Syllabus: Basic concepts Semiconductor RAM ROM Speed Size and cost Cache memories Improving cache performance Virtual memory Memory management requirements Associative memories Secondary storage devices. Objectives: To study and understand the concepts of various memory system. Session no. 30. 31. 32. 33. 34. 35. 36. 37. 38. 39 40 Basic concepts Semiconductor RAM ROM, Speed , Size and cost Cache memories Improving cache performance Virtual memory Memory management requirements Associative memories Secondary storage devices Revision for CAT II CAT - II Topics to be covered Time in min. 50 50 50 50 50 50 50 50 50 50 T1 T1 T1 T1 T1 T1 Ref. Teaching method BB BB BB BB BB BB PP BB BB

LP-CS 2253

LESSON PLAN Sub Code & Name: CS2253-Computer organization and Architecture
Branch : CS Semester : B.E-IV

LP: Rev. No: 00 Date:10:12:09 Page 5 of 6

DOC/LP/00/08.12.09

UNIT V- I/O ORGANIZATION

Syllabus: Accessing I/O devices Programmed Input/Output -Interrupts Direct Memory Access Buses Interface circuits Standard I/O Interfaces (PCI, SCSI, USB), I/O devices and processors. Objectives: To know the services and functions of the various Interfaces and Interrupts. Session no. 41. 42. 43. 44. 45. 46. 47. 48. 48. 49. Topics to be covered Accessing I/O devices Programmed Input/Output Interrupts Direct Memory Access Buses Interface circuits Standard I/O Interfaces (PCI, SCSI, USB) I/O devices and processors. Review for CAT III CAT III Time in min. 50 50 50 50 50 50 50 50 50 90 Ref. T1 R2 T1 T1 T1 T1 T1 R2 Teaching method BB BB BB BB BB BB BB BB

LESSON PLAN Sub Code & Name: CS2253-Computer organization and Architecture
Branch : CS Semester : B.E-IV

LP-CS 2253 LP: Rev. No: 00 Date:10:12:09 Page 6 of 6

DOC/LP/00/08.12.09 Course Delivery Plan

Wee k

1 I II

2 I II 1 1 1

3 I II 2 2

4 I II 2 2

5 I II 2 2

6 I II 3 3

7 I II 3 3

8 I II 4 4

9 I II 4 4

10 I II 4 4

11 I II 5 5

12 I II 5 5

Unit 1 s

BOOKS FOR REFERENCE: TEXT BOOKS 1. Carl Hamacher, Zvonko Vranesic and Safwat Zaky, Computer Organization, Fifth Edition, Tata McGraw Hill, 2002. REFERENCE 1. David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software interface, Third Edition, Elsevier, 2005. 2. William Stallings, Computer Organization and Architecture Designing for Performance, Sixth Edition, Pearson Education, 2003. 3. John P. Hayes, Computer Architecture and Organization, Third Edition, Tata McGraw Hill, 1998. 4. V.P. Heuring, H.F. Jordan, Computer Systems Design and Architecture, Second Edition, Pearson Education, 2004.

Prepared by Signature Name Designation Date Miss.P.Vinothiyalakshmi, Miss.J.Buvana Lecturer 10:12:2009

Approved by Dr.Susan Elias Hod,Dept. of CSE 10:12:2009

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