GARY SAILER ST. Helens, Oregon 503-396-2233 sailer.g@comcast.net SUMMARY Sr.

Electrical Design Engineer with Project Management experience in industrial semiconductor equipment design. Extensive experience in the entire product development process from initial conceptual design through final product release. Strong analytical and problem solving skills. Resourceful with a proven record of successfully delivering new designs for new markets, Record of saving troubled projects, surpassing goals and expectations. Master at developing final systems and circuits from Marketing and System requirements. Extremely self motivated. Works well independently and as a team member. Successful in multidisciplinary, multicultural teams. Ability to form consensus between key stakeholders. * * * * * * * * * EMI - EMC compliant PCB designs Engineering Project Management Analog and digital circuit design and verification Specify and qualify Printed Circuit Board layouts Embedded systems programming Design for manufacturing practices SEMI-S2 and CE Marking experience Cadence ORCAD CIS Schematic entry and simulation NI Labview Programmming

PROFESSIONAL EXPERIENCE FEI Company, Hillsboro, Oregon 2010-2012 Sr. Customer Support Engineer Transmission Electron Microscopes Installation, support and preventative maintenance of Transmission Electron microscopes for research projects. Hardware and Software debug of TEM systems installed at DOE labs and University research labs. LightSpeed Aviation, Lake Oswego, Oregon 2010 Electronics Design Engineer Debug of Active Noise Reduction headset circuitry. Participate in design reviews of in house PCBA layouts. Test equipment used: Audio Precision ATS-2 and AudioFire 12. Design entry in Altium Designer IDE , Simulations using LT Spice. KLA-TENCOR CORPORATION, Milpitas, California 2007-2009 Project Manager /Sr. Electronics Design Engineer KLA - Tencor Electron Beam Review Division Electrical Engineering Technical Lead and Project Manager for crossfunctional team of consulting and internal engineers implementing a next generation scanning electron beam metrology system.

* Designed from concept next generation image acquisition system for latest product line of Scanning Electron Microscope based metrology systems. Produced an imaging subsystem for use across different product lines and removed the need for long term sustaining engineering required by previous implementations. Programming in HDL for Xilinx FPGA, Altera CPLDs. C and assembly language programming for embedded processors. Analog and Mixed signal circuit design for imaging circuits as well as subsystem architecture development. * Guided team to successful project completion of new Image acquisition system while overcoming increasing budget and staffing constraints exceeding management expectations. * Completed additional unplanned design assignments of - wafer transfer interlock circuit and firmware for current generation system and flexible printed circuits for other teams on short time lines from concept to prototype release. Done quickly and accurately with minimal impact to primary assignment. * Proposed to management and received approval to identify and deliver team-building activities/courses for team members. Resulted in improved individual performance and more efficient collaboration between team members. Sr. Electronics Design Engineer K-T LABS Division 2005-2007 Provided key vendors with proprietary circuits and engineering support for prototype equipment from several divisions of KLA-Tencor including procedures, installation, supervision of experiment setup for vendors and off-site project supervision of contractors. * Developed electron gun feasibility test system using National Instruments PXI Bus equipment and LabView development environment that allowed prototypes of new assemblies to be tested without the use of custom designed electronics. Support for contractors to meet their schedule objectives. * Completed concept and circuit design of bench top Scanning Electron Microscopes. Embedded programming of Analog Devices Blackfin programming in C and assembly language. Sr. Customer Support Engineer Intel Strategic Business Unit 2001 2005 Supported multiple Electron Beam and scanning Laser based products. Partnered with key customer, Intel, and internal divisions to solve inspection system usage and reliability problems. Electronics Design Engineer WIG Division Sr. Engineering Technician Advanced Development Division EDUCATION BSEE, Santa Clara University, Santa Clara, California, Graduated Magna Cum Laude AE, Electronic Engineering Technology, Oregon Institute of Technology, Klamath Falls, Oregon. Professional Development - last 5 years. 1998-2001 1987-1998

Project Management, International Institute for Learning. Blackfin Programming, Analog Devices, Boston MA. Situational Leadership, Ken Blanchard Companies. High Speed Digital Design Seminar,Americom Seminars, Inc. EMI/EMC for Engineers, Americom Seminars, Inc. Engineering Statistics and data analysis using JMP Software,Thomas A Little Consulting. National Instruments LabView I and II Programming - National Instruments. Maximizing Customer relationships, K-T Corporate Learning Center. TECHNICAL SKILLS Electronics designs, maintenance, manfacturing and production lead for Semiconductor Capital Equipment Widely used design tools include Cadence Orcad CIS, pSpice, Altera Quartus and Xilinx Foundation. PCB and System designs including Image processing, mixed signal and High speed digital communications. Programming in HDL\VHDL. Programming in C and Assembly language for embedded processors. Programming in National Instruments LabView environment. DFT. DFM. CE and SEMI-S2 design qualification and compliance experience for Semiconductor Capital equipment. MatLab and JMP7 training.