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ISO124

ISO 124

ISO

124

SBOS074C SEPTEMBER 1997 REVISED SEPTEMBER 2005

Precision Lowest-Cost ISOLATION AMPLIFIER


FEATURES
q 100% TESTED FOR HIGH-VOLTAGE BREAKDOWN q RATED 1500Vrms q HIGH IMR: 140dB at 60Hz q 0.010% max NONLINEARITY q BIPOLAR OPERATION: VO = 10V q DIP-16 AND SO-28 q EASE OF USE: Fixed Unity Gain Configuration q 4.5V to 18V SUPPLY RANGE

APPLICATIONS
q INDUSTRIAL PROCESS CONTROL: Transducer Isolator, Isolator for Thermocouples, RTDs, Pressure Bridges, and Flow Meters, 4-20mA Loop Isolation q GROUND LOOP ELIMINATION q MOTOR AND SCR CONTROL q POWER MONITORING q PC-BASED DATA ACQUISITION q TEST EQUIPMENT

DESCRIPTION
The ISO124 is a precision isolation amplifier incorporating a novel duty cycle modulation-demodulation technique. The signal is transmitted digitally across a 2pF differential capacitive barrier. With digital modulation, the barrier characteristics do not affect signal integrity, resulting in excellent reliability and good high-frequency transient immunity across the barrier. Both barrier capacitors are imbedded in the plastic body of the package. The ISO124 is easy to use. No external components are required for operation. The key specifications are 0.010% max nonlinearity, 50kHz signal bandwidth, and 200V/C VOS drift. A power supply range of 4.5V to 18V and quiescent currents of 5.0mA on VS1 and 5.5mA on VS2 make these amplifiers ideal for a wide range of applications. The ISO124 is available in DIP-16 and SO-28 plastic surface mount packages.

VIN

VOUT

VS2 Gnd 2 +VS2 VS1 Gnd 1 +VS1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1997-2005, Texas Instruments Incorporated

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ABSOLUTE MAXIMUM RATINGS(1)


Supply Voltage ................................................................................... 18V VIN ......................................................................................................100V Continuous Isolation Voltage ..................................................... 1500Vrms Junction Temperature .................................................................... +150C Storage Temperature ..................................................................... +125C Output Short to Common ......................................................... Continuous NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability.

ELECTROSTATIC DISCHARGE SENSITIVITY


This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGE/ORDERING INFORMATION(1)
PACKAGE DESIGNATOR NVF DVA SPECIFIED TEMPERATURE RANGE 25C to +85C 25C to +85C PACKAGE MARKING ISO124P ISO124U ISO124U ORDERING NUMBER ISO124P ISO124U ISO124U/1K TRANSPORT MEDIA, QUANTITY Rails, 50 Rails, 28 Tape and Reel, 1000

PRODUCT ISO124P ISO124U

PACKAGE-LEAD Plastic DIP-16 Plastic SO-28

"

"

"

"

NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.

PIN CONFIGURATIONS
Top View DIP Top View SO

+VS1 VS1

1 2

16 15

Gnd 1 VIN

+VS1 VS1

1 2

28 27

Gnd 1 VIN

VOUT Gnd 2

7 8

10 9

VS2 +VS2

VOUT Gnd 2

13 14

16 15

VS2 +VS2

ISO124
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SBOS074C

ELECTRICAL CHARACTERISTICS
At TA = +25C , VS1 = VS2 = 15V, and RL = 2k, unless otherwise noted. ISO124P, U PARAMETER ISOLATION Rated Voltage, continuous ac 60Hz 100% Test (1) Isolation Mode Rejection Barrier Impedance Leakage Current at 60Hz GAIN Nominal Gain Gain Error Gain vs Temperature Nonlinearity(2) INPUT OFFSET VOLTAGE Initial Offset vs Temperature vs Supply Noise INPUT Voltage Range Resistance OUTPUT Voltage Range Current Drive Capacitive Load Drive Ripple Voltage(3) FREQUENCY RESPONSE Small-Signal Bandwidth Slew Rate Settling Time 0.1% 0.01% Overload Recovery Time POWER SUPPLIES Rated Voltage Voltage Range Quiescent Current: VS1 VS2 TEMPERATURE RANGE Specification Operating Storage Thermal Resistance, JA JC 10 CONDITIONS MIN 1500 2400 140 1014 || 2 0.18 1 0.05 10 0.005 20 200 2 4 12.5 200 12.5 15 0.1 20 50 2 VO = 10V 50 350 150 15 5.0 5.5 TYP MAX UNITS Vac Vac dB || pF Arms V/V %FSR ppm/C %FSR mV V/C mV/V V/Hz V k V mA F mVp-p kHz V/s s s s V V mA mA C C C C/W C/W

1s, 5pc PD 60Hz VISO = 240Vrms VO = 10V

0.5

0.50 0.010 50

10 5

4.5

18 7.0 7.0 +85 +85 +125

25 25 40 100 65

NOTES: (1) Tested at 1.6 X rated, fail on 5pC partial discharge. (2) Nonlinearity is the peak deviation of the output voltage from the best-fit straight line. It is expressed as the ratio of deviation to FSR. (3) Ripple frequency is at carrier frequency (500kHz).

ISO124
SBOS074C

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TYPICAL CHARACTERISTICS
At TA = +25C, and VS = 15V, unless otherwise noted.

SINE RESPONSE (f = 2kHz)

SINE RESPONSE (f = 20kHz)

Output Voltage (V)

Output Voltage (V)

+10

+10

10

10

500 Time (s)

1000

50 Time (s)

100

STEP RESPONSE

STEP RESPONSE

Output Voltage (V)

Output Voltage (V)

+10

+10

10

10

500 Time (s)

1000

50 Time (s)

100

ISOLATION VOLTAGE vs FREQUENCY


160

IMR vs FREQUENCY

Max DC Rating 2.1k


140 120

Peak Isolation Voltage

1k

IMR (dB)

Degraded Performance 100 Typical Performance 0 100 1k 10k 100k Frequency (Hz) 1M 10M 100M

100 80 60 40 1 10 100 1k 10k 100k 1M

Frequency (Hz)

ISO124
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SBOS074C

TYPICAL CHARACTERISTICS (Cont.)


At TA = +25C, and VS = 15V, unless otherwise noted.

PSRR vs FREQUENCY 60 54 10mA


Leakage Current (rms)

ISOLATION LEAKAGE CURRENT vs FREQUENCY 100mA

PSRR (dB)

40 +VS1, +VS2 VS1, VS2 20

1mA 1500Vrms 100A 10A 240Vrms 1A

0 1 10 100 1k Frequency (Hz) 10k 100k 1M

0.1A 1 10 100 1k Frequency (Hz) 10k 100k 1M

SIGNAL RESPONSE TO INPUTS GREATER THAN 250kHz VOUT/VIN 0 100kHz Frequency Out 250 200 150 100 50

VOUT/VIN (dBm)

10 20 30 40

500k

1M

1.5M

Input Frequency (Hz) (NOTE: Shaded area shows aliasing frequencies that cannot be removed by a low-pass filter at the output.)

ISO124
SBOS074C

Frequency Out

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THEORY OF OPERATION
The ISO124 isolation amplifier uses an input and an output section galvanically isolated by matched 1pF isolating capacitors built into the plastic package. The input is duty-cycle modulated and transmitted digitally across the barrier. The output section receives the modulated signal, converts it back to an analog voltage and removes the ripple component inherent in the demodulation. Input and output sections are fabricated, then laser trimmed for exceptional circuitry matching common to both input and output sections. The sections are then mounted on opposite ends of the package with the isolating capacitors mounted between the two sections. The transistor count of the ISO124 is 250 transistors.

modulated current against the feedback current through the 200k feedback resistor, resulting in an average value at the VOUT pin equal to VIN. The sample-and-hold amplifiers in the output feedback loop serve to remove undesired ripple voltages inherent in the demodulation process.

BASIC OPERATION
SIGNAL AND SUPPLY CONNECTIONS
Each power-supply pin should be bypassed with 1F tantalum capacitors located as close to the amplifier as possible. The internal frequency of the modulator/demodulator is set at 500kHz by an internal oscillator. Therefore, if it is desired to minimize any feedthrough noise (beat frequencies) from a DC/DC converter, use a filter on the supplies (see Figure 4). The ISO124 output has a 500kHz ripple of 20mV, which can be removed with a simple 2-pole low-pass filter with a 100kHz cutoff using a low-cost op amp (see Figure 4). The input to the modulator is a current (set by the 200k integrator input resistor) that makes it possible to have an input voltage greater than the input supplies, as long as the output supply is at least 15V. It is therefore possible, when using an unregulated DC/DC converter, to minimize PSR related output errors with 5V voltage regulators on the isolated side and still get the full 10V input and output swing. See Figure 9 for an example of this application.

MODULATOR
An input amplifier (A1, as shown in Figure 1) integrates the difference between the input current (VIN/200k) and a switched 100A current source. This current source is implemented by a switchable 200A source and a fixed 100A current sink. To understand the basic operation of the modulator, assume that VIN = 0.0V. The integrator will ramp in one direction until the comparator threshold is exceeded. The comparator and sense amp will force the current source to switch; the resultant signal is a triangular waveform with a 50% duty cycle. The internal oscillator forces the current source to switch at 500kHz. The resultant capacitor drive is a complementary duty-cycle modulation square wave.

CARRIER FREQUENCY CONSIDERATIONS DEMODULATOR


The sense amplifier detects the signal transitions across the capacitive barrier and drives a switched current source into integrator A2. The output stage balances the duty-cycle The ISO124 amplifier transmits the signal across the isolation barrier by a 500kHz duty-cycle modulation technique. For input signals having frequencies below 250kHz, this system works like any linear amplifier. But for frequencies

Isolation Barrier 200A 1pF 1pF

200A

1pF Sense 100A 200k VIN VOUT A2 A1 S/H G=1 Osc S/H G=6 150pF 1pF Sense 100A 150pF 200k

+VS1

Gnd 1

VS1

+VS2

Gnd 2

VS2

FIGURE 1. Block Diagram.

ISO124
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SBOS074C

above 250kHz, the behavior is similar to that of a sampling amplifier. The typical characteristic Signal Response to Inputs Greater Than 250kHz shows this behavior graphically; at input frequencies above 250kHz, the device generates an output signal component of reduced magnitude at a frequency below 250kHz. This is the aliasing effect of sampling at frequencies less than 2 times the signal frequency (the Nyquist frequency). Note that at the carrier frequency and its harmonics, both the frequency and amplitude of the aliasing go to zero.

HIGH VOLTAGE TESTING


Texas Instruments has adopted a partial discharge test criterion that conforms to the German VDE0884 Optocoupler Standards. This method requires the measurement of minute current pulses (< 5pC) while applying 2400Vrms, 60Hz highvoltage stress across every ISO124 isolation barrier. No partial discharge may be initiated to pass this test. This criterion confirms transient overvoltage (1.6 x 1500Vrms) protection without damage to the ISO124. Lifetest results verify the absence of failure under continuous rated voltage and maximum temperature. This new test method represents the state-of-the art for non-destructive high-voltage reliability testing. It is based on the effects of non-uniform fields that exist in heterogeneous dielectric material during barrier degradation. In the case of void non-uniformities, electric field stress begins to ionize the void region before bridging the entire high-voltage barrier. The transient conduction of charge during and after the ionization can be detected externally as a burst of 0.01-0.1s current pulses that repeat on each ac voltage cycle. The minimum ac barrier voltage that initiates partial discharge is defined as the inception voltage. Decreasing the barrier voltage to a lower level is required before partial discharge ceases and is defined as the extinction voltage. We have characterized and developed the package insulation processes to yield an inception voltage in excess of 2400Vrms so that transient overvoltages below this level will not damage the ISO124. The extinction voltage is above 1500Vrms so that even overvoltage induced partial discharge will cease once the barrier voltage is reduced to the 1500Vrms (rated) level. Older high-voltage test methods relied on applying a large enough overvoltage (above rating) to break down marginal parts, but not so high as to damage good ones. Our new partial discharge testing gives us more confidence in barrier reliability than breakdown/no breakdown criteria.

ISOLATION MODE VOLTAGE INDUCED ERRORS


IMV can induce errors at the output as indicated by the plots of IMV vs Frequency. It should be noted that if the IMV frequency exceeds 250kHz, the output also will display spurious outputs (aliasing) in a manner similar to that for VIN > 250kHz and the amplifier response will be identical to that shown in the Signal Response to Inputs Greater Than 250kHz typical characteristic. This occurs because IMV-induced errors behave like input-referred error signals. To predict the total error, divide the isolation voltage by the IMR shown in the IMR versus Frequency typical performance curve and compute the amplifier response to this input-referred error signal from the data given in the Signal Response to Inputs Greater Than 250kHz typical characteristic. For example, if a 800kHz 1000Vrms IMR is present, then a total of [(60dB) + (30dB)] x (1000V) = 32mV error signal at 200kHz plus a 1V, 800kHz error signal will be present at the output.

HIGH IMV dV/dt ERRORS


As the IMV frequency increases and the dV/dt exceeds 1000V/s, the sense amp may start to false trigger, and the output will display spurious errors. The common-mode current being sent across the barrier by the high slew rate is the cause of the false triggering of the sense amplifier. Lowering the power-supply voltages below 15V may decrease the dV/dt to 500V/s for typical performance.

Isolation Barrier
ISO150 A0 A1

VIN Gnd

ISO124 Gnd +VS2 VS1 +VS1 VS1 1F 1F 1F

VS2

VOUT

+15V 15V 1 2 6 VIN 1 2 15 ISO124

+15V 15V

9 10 8 7 VOUT

VS2 1F

15 7 PGA102 8 5 4 3

16

FIGURE 2. Basic Signal and Power Connections.

FIGURE 3. Programmable-Gain Isolation Channel with Gains of 1, 10, and 100.

ISO124
SBOS074C

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C2 1000pF Isolation Barrier

R1 4.75k VIN ISO124 VS2 +VS2 Gnd1 VS1 +VS1 10H 1F 1F 1F 1F 10H VS1 10H 1F 1F 1F 1F 10H VS2 Gnd2

R2 9.76k

OPA237

VOUT = VIN

C1 220pF

FIGURE 4. Optional Filter to Minimize Power-Supply Feedthrough Noise; Output Filter to Remove 500kHz Carrier Ripple. For more information concerning output filters refer to Application Notes SBOA012 and SBFA001.

This Section Repeated 49 Times. ISO124 10k e1 = 12V 10k 15 10 e2 = 12V 16 2 V +V 1 9 7 8 V= e1 2

Charge/Discharge Control

Multiplexer

Control Section

ISO124 +V 15 1 9 e50 = 12V 10k 10 2 10k 16 V 3 1 25k 7 8 2 25k

+V V 7 INA105 25k 5 4

e49 = 12V

6 25k V= e50 2

FIGURE 5. Battery Monitor for a 600V Battery Power System. (Derives input power from the battery.)

ISO124
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SBOS074C

+15V

2 10.0V Thermocouple R1 27k R4 +15V 6 REF102 4 +15V 15V +15V 15V

Isothermal Block with 1N4148(1) RG 1M R2

2 7 +In 1 8 INA114 or INA128 In 4 3 R3 100 R5 50 15V R6 100 Zero Adj ISA TYPE E 6 5 15

1 2 9 10 8 16 7 VOUT ISO124

MATERIAL Chromel Constantan Iron Constantan Chromel Alumel Copper Constantan

SEEBACK COEFFICIENT (V/C) 58.5 50.2 39.4 38.0

R2 (R3 = 100) 3.48k 4.12k 5.23k 5.49k

R4 (R5 + R6 = 100) 56.2k 64.9k 80.6k 84.5k

Ground Loop Through Conduit NOTE: (1) 2.1mV/C at 2.00A.

J K T

FIGURE 6. Thermocouple Amplifier with Ground Loop Elimination, Cold Junction Compensation, and Up-scale Burn-out.

13 0.8mA 0.8mA RG 4 2 RTD (PT100) RZ(1) RCM 1k 3

14

10 0.01F 7

4-20mA +VS = 15V on PWS740 16 3 15 14 15 1 ISO124 +V 9 7 8 10 2 16 V Gnd VS = 15V on PWS740

XTR105

2 RCV420 5, 13 10 4 11 12

VOUT 0V - 5V

1.6mA

NOTE: (1) RZ = RTD resistance at minimum measured temperature.

FIGURE 7. Isolated 4-20mA Instrument Loop. (RTD shown.)

ISO124
SBOS074C

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FIGURE 8. Isolated Power Line Monitor.

10
RS VL Load IL 2k 10k RD1 V+ RD2 2 2k 3 OPA237 6 (V1) IL = 16 0.01F 9 15 ISO124 8 V+ 10 2 1 9 0.47F 7 0.47F 8 10 16 2 1 V 1 2 5 6 7 X MPY634 0.47F DCP011515DB or DCV011515D Y 0.47F 0.47F XY 10 (V2) PL = 15 ISO124 V 7 V1 10RS V2 (RD1 + RD2) RS RD2 5 6 7 (V3) DCP011515DB or DCV011515D VL = V3 (RD1 + RD2) RD2

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0.47F

ISO124

SBOS074C

+15V

VIN, up to 10V Swing ISO124

9 7 8 10 2 1 16 15V VOUT

+5V Regulator MC78L05 2

0.1F 0.1F 1 1 3

5V Regulator MC79L05

0.47F 3 2

0.47F 0.47F

5 DCP011515DB or DCV011515D

NOTE: The input supplies can be subregulated to 5V to reduce PSR related errors without reducing the 10V input range.

FIGURE 9. Improved PSR Using External Regulator.


VS1 (+15V) 7 VS (V) 20+ 15 12 INPUT RANGE (V)(1) 2 to +10 2 to +5 2 to +2 2 R1 R2 6 15 INA105 Difference Amp 5 10k 1 In ISO124 Gnd 16 4 Reference IN4689 5.1V 2 VS1 VS2 (15V) 10 8 Com 2 9 7 VOUT = VIN +VS2 (+15V)

Signal Source VIN + RS

R3

R4

RC(1)

NOTE: (1) Select to match RS .

NOTE: Since the amplifier is unity gain, the input range is also the output range. The output can go to 2V since the output section of the ISO amp operates from dual supplies.

FIGURE 10. Single-Supply Operation of the ISO124 Isolation Amplifier. For additional information refer to Application Note SBOA004.

ISO124
SBOS074C

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11

2 DCP011515DB or DCV011515D

0.47F

0.47F 0.47F

VIN Input Gnd

15V, 20mA

+15V, 20mA 16 15 10 V 9 V+ Auxiliary Isolated Power Output Gnd VIN

Input Section

ISO124

Output Section

V+ 1 +15V 15V

V 2

VO 7

Gnd 8 Output Gnd VO

FIGURE 11. Input-Side Powered ISO Amp.

+15V Gnd

1 DCP011515DB or DCV011515D

2 DCP011515DB or DCV011515D

7 0.47F

5 0.47F 0.47F

1 0.47F 0.47F 15V, 20mA +15V, 20mA

VIN Input Gnd 16 15 10 V 9 V+

Gnd VIN

Auxiliary Isolated Power Output

Input Section Auxiliary Isolated Power Output +15V, 20mA 15V, 20mA

ISO124

Output Section

V+ 1

V 2

VO 7

Gnd 8 Output Gnd VO

FIGURE 12. Powered ISO Amp with Three-Port Isolation.

12

ISO124
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SBOS074C

PACKAGE OPTION ADDENDUM


www.ti.com 26-Feb-2010

PACKAGING INFORMATION
Orderable Device ISO124P ISO124U ISO124U/1K ISO124U/1KE4 ISO124UE4
(1)

Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE

Package Type PDIP SOIC SOIC SOIC SOIC

Package Drawing NVF DVA DVA DVA DVA

Pins Package Eco Plan (2) Qty 8 8 8 8 8 25 20 Pb-Free (RoHS) Green (RoHS & no Sb/Br)

Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU

MSL Peak Temp (3) N / A for Pkg Type Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR

1000 Green (RoHS & no Sb/Br) 1000 Green (RoHS & no Sb/Br) 20 Green (RoHS & no Sb/Br)

The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION


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TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins Type Drawing SOIC DVA 8

SPQ

Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 24.4 10.9

B0 (mm) 18.3

K0 (mm) 3.2

P1 (mm) 12.0

W Pin1 (mm) Quadrant 24.0 Q1

ISO124U/1K

1000

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION


www.ti.com 25-Feb-2010

*All dimensions are nominal

Device ISO124U/1K

Package Type SOIC

Package Drawing DVA

Pins 8

SPQ 1000

Length (mm) 346.0

Width (mm) 346.0

Height (mm) 41.0

Pack Materials-Page 2

MECHANICAL DATA
MPDI072 AUGUST 2001

NVF (R-PDIP-T8/16)
0.775 (21,34) 0.735 (18,67) 16 D

PLASTIC DUAL-IN-LINE

0.280 (7,11) 0.240 (6,10)

Index Area

0.195 (4,95) 0.115 (2,92) 0.045 (1,14) 0.030 (0,76) 0.070 (1,78) 0.045 (1,14) 0.210 (5,33) MAX 0.325 (8,26) 0.300 (7,62)

C Base Plane Seating Plane E 0.005 (0,13) MIN 4 PL D 1/2 Lead 0.100 (2,54) 0.022 (0,56) 0.014 (0,36) 0.010 (0,25) M C 0.015 (0,38) MIN 0.150 (3,81) 0.115 (2,92) 0.300 (7,63) 0.014 (0,36) 0.008 (0,20) 0.060 (1,52) 0.000 (0,00) F 0.430 (10,92) MAX F 4202501/A 08/01 A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001-BB with the exception of lead count. D. Dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 (0,25). E. Dimensions measured with the leads constrained to be perpendicular to Datum C. F. Dimensions are measured at the lead tips with the leads unconstrained. G. A visual index feature must be located within the cross-hatched area.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

MECHANICAL DATA
MPDS105 AUGUST 2001

DVA (R-PDSO-G8/28)
C 18,10 17,70 28 15 B A

PLASTIC SMALL-OUTLINE

0,25 M B M

7,60 7,40 D Index Area 1 14

10,65 10,01

2,65 2,35

0,75 0,25 x 45

Seating Plane 1,27 0,51 0,33 0,30 0,10 0,10 0,32 0,23

0,25 M C A M B S

08 F 1,27 0,40

4202103/B 08/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body length dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, and gate burrs shall not exceed 0,15 mm per side. D. Body width dimension does not include inter-lead flash or portrusions. Inter-lead flash and protrusions shall not exceed 0,25 mm per side. E. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the cross-hatched area. F. Lead dimension is the length of terminal for soldering to a substrate. G. Lead width, as measured 0,36 mm or greater above the seating plane, shall not exceed a maximum value of 0,61 mm. H. Lead-to-lead coplanarity shall be less than 0,10 mm from seating plane. I. Falls within JEDEC MS-013-AE with the exception of the number of leads.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

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