Synchronous counters

Why synchronous rather than asynchronous? all flip-flops receive the same clock they therefore change state at exactly the same time no wrong states or glitches as in asynchronous counters Design a synchronous binary counter by guesswork gives a straightforward structure for each stage, slightly more complicated than an asynchronous counter Systematic design of a synchronous counter using JK flip-flops based on a state transition table this is a general approach, which can be extended to more general state machines, which step through an arbitrary sequence Repeat using D flip-flops overall design simpler and elegant but logic more complicated can also handle control inputs, but we shant do this

Synchronous counters
All flip-flops are triggered from the same clock. Look at a 3-bit binary counter with negative edge triggered JKs again. ? J

Q C

? J

Q C

? J

Q C

? K clock

? K

? K

same clock for all flip-flops What must be connected to the J and K inputs of the flip-flops? First design this by guesswork, then develop a systematic procedure. Remember that a JK flip-flop holds when J = K = 0 and toggles when J = K = 1.

Compare synchronous and asynchronous counters

clock 0 1 2 3 4 5 6 7 0

Asynchronous (ripple) counter successive outputs get later

QA QB QC

tpd

Synchronous counter outputs all change simultaneously

QA QB QC

tpd

Timing around a clock transition

To design synchronous logic, it is essential to understand the timing of events around a clock transition. clock transition (negative edge triggering) Q output of flip-flop present state of flip-flop

tpd
next state of flip-flop

The flip-flops read their inputs at the clock transition. At this point, the outputs are sitting stably in their present states, Qn. They do not change to their next states Qn+1 until after a propagation delay tpd. By this time the flip-flops are no longer interested in their inputs. Thus the inputs always depend on the present states of the flip-flops, not the next states.

Synchronous counter what inputs are needed?

clock 0 1 2 3 4 5 6 7 0

QA QB QC

tpd

the flip-flops read their inputs at the clock transition all outputs change at the same time, following the clock transition by the propagation delay tpd QA changes state at every clock transition, so JA = KA = 1 QB changes state only when QA = 1 at the clock transition, so JB = KB = QA QC changes state only when both QA = QB = 1 at the clock transition (not just QB!), so JC = KC = QA QB

Logical expressions for inputs

These results should be obvious from straightforward binary counting each bit changes only when all the less significant bits are 1. Look at the table for 4 bits. Remember that a JK flip-flop holds when J = K = 0 and toggles when J = K = 1. Use this to design a 4-bit counter D 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 C 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

JA = KA = 1 toggles at every transition JB = KB = QA toggles whenever QA = 1 JC = KC = QA QB JD = KD = QA QB QC = (QA QB) QC

These follow a simple pattern, previous

4-bit synchronous counter using JK flip-flops JB = K B = QA

1 1
J C K Q Q J C K Q Q

JC = K C = QA QB
J C K Q Q

JD = K D = (QA QB) QC
J C K Q Q

Clearly this can be extended to more stages if needed. The sequence of AND gates forms a carry chain. This function is so widely used that it can be bought as a ready-made integrated circuit (IC), such as the 163 4-bit synchronous counter. A systematic approach is needed for more complicated functions.

Systematic design of 3-bit counter with JK flip-flops

The main step is to find the logic needed for the inputs to the flip-flops This can be done with a state transition table, which has three sets of columns: - present state, label and binary value of flip-flops - next state after clock transition, label and binary value of flip-flops - inputs needed to flip-flops to give the transition required Carry this out for a simple 3-bit up counter (again) - first use JK flip-flops (as in laboratory, for the last time) - repeat with D flip-flops (use from now on)

State transition table for 3-bit counter with JK flip-flops

1. Fill in columns for present state. next state A 0 1 0 1 0 1 0 1 label C B A inputs needed JC KC JB KB JA KA

present state label 0 1 2 3 4 5 6 7 C 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1

Usually the binary value for each label must be chosen with care (as in a dice for instance), but this is straightforward for a simple counter.

State transition table for 3-bit counter with JK flip-flops

2. Fill in columns for next state. present state label 0 1 2 3 4 5 6 7 C 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 A 0 1 0 1 0 1 0 1 label 1 2 3 4 5 6 7 0 next state C 0 0 0 1 1 1 1 0 B 0 1 1 0 0 1 1 0 A 1 0 1 0 1 0 1 0 inputs needed JC KC JB KB JA KA

The crucial part is the relation between the labels for the present state and next state in each row: determines the behaviour of the system. Remember to include the roll over for 7 0 at the end.

State transition table for 3-bit counter with JK flip-flops

3. Fill in inputs needed to produce next state the main task. present state label 0 1 2 3 4 5 6 7 C 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 A 0 1 0 1 0 1 0 1 label 1 2 3 4 5 6 7 0 next state C 0 0 0 1 1 1 1 0 B 0 1 1 0 0 1 1 0 A 1 0 1 0 1 0 1 0 inputs needed JC KC JB KB JA ? KA ?

Look at flip-flop A in first row. QA = 0 in the present state, which must change to QA = 1 in the next state. What inputs JA and KA are needed to induce this transition? Go back to the transition table for a JK flip-flop.

Transition table for JK flip-flop ordered by inputs J

0 0 0 0 1 1 1 1

K
0 0 1 1 0 0 1 1

Qn
0 1 0 1 0 1 0 1

Qn+1
0 1 0 0 1 1 1 0

description hold

clear

set

toggle

There are two ways of getting each transition, such as 0 1, between given values of Qn and Qn+1. Order the table by these transitions instead of the inputs.

Transition table for JK flip-flop ordered by transitions J

0 0 1 1 0 1 0 1

K
0 1 0 1 1 1 0 0

Qn
0 0 0 0 1 1 1 1

Qn+1
0 0 1 1 0 0 1 1

Each pair of J and K values that give the same transition can be grouped simply. For example, 0 1 can be done with J = 1 and K = 0 or J = 1 and K = 1. Write this as J = 1 and K = x, dont care. Concise table transition Qn Qn+1 0 0 1 0 1 0 1 1 inputs

J
0 1 x x

K
x x 1 0

This can be used to complete the transition tables for state machines using JK flip-flops.

State transition table for 3-bit counter with JK flip-flops

3. Fill in inputs needed to produce next state. present state label 0 C 0 B 0 A 0 label 1 next state C 0 B 0 A 1 inputs needed JC KC JB KB JA 0 x 0 x 1 KA x

QA changes 0 1 so JA = 1 and KA = x QB stays 0 0 so JB = 0 and KB = x QC stays 0 0 so JC = 0 and KC = x Complete all rows of table in same way. Remember that x really does mean dont care the behaviour of the system will be the same, whatever values are chosen for the x entries. transition Qn Qn+1 0 0 1 1 0 1 0 1 inputs

J
0 1 x x

K
x x 1 0

State transition table for 3-bit counter with JK flip-flops

4. Completed table. present state label 0 1 2 3 4 5 6 7 C 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 A 0 1 0 1 0 1 0 1 label 1 2 3 4 5 6 7 0 next state C 0 0 0 1 1 1 1 0 B 0 1 1 0 0 1 1 0 A 1 0 1 0 1 0 1 0 inputs needed JC KC JB KB JA 0 0 0 1 x x x x x x x x 0 0 0 1 0 1 x x 0 1 x x x x 0 1 x x 0 1 1 x 1 x 1 x 1 x KA x 1 x 1 x 1 x 1

The next step is to design logic to provide the J and K inputs from the values of the present state. The usual tools, such as K-maps, are used.

Construction of K-maps from transition table

You have to be careful with the order of the entries dont just fill across and down in the obvious order.

BA 00 01 11 10 C 0 1 0 4 1 5 3 7 2 6

0 1 2 3 4 5 6 7

C 0 0 0 0 1 1 1 1

B 0 0 1 1 0 0 1 1

A 0 1 0 1 0 1 0 1

The table shows the values of CBA to make the order of entries clear.

K-maps for 3-bit counter with JK flip-flops

BA

JC
C 0 1

00 01 11 10 0 0 1 0

expressions for both J=K C

BA

KC
0 1

00 01 11 10 x1 x 00 00 1 00 BA 00 01 11 10 x x 1 0 1 x x 1 0 1 BA 0 0 x x

x0 x0 x1 x0 BA 00 01 11 10 0 0 BA 1 1 x x 1 0 x x 1 0

AB

JB
C 0 1

KB
C 0 1

JA
C 0 1

00 01 11 10 1 1 x x 1 1 1 x x 1 1 1 C

KA
0 1

00 01 11 10 x 1 1 x 1 1 1 1 x 1 x 1

Ones are grouped take full advantage of x for dont care, which can be chosen as 0 or 1 to simplify the maps

4-bit synchronous counter using JK flip-flops (repeat) JB = K B = QA

1 1
J C K Q Q J C K Q Q

JC = K C = QA QB
J C K Q Q

JD = K D = QA QB QC
J C K Q Q

The systematic approach leads to the same circuit as guesswork. Other circuits would result if you chose different values for the x entries in the K-maps zeros for example but this is the simplest. Build it in the laboratory! Well now repeat the procedure using D flip-flops.

Review exercises
What is the difference between the clock in synchronous and asynchronous counters? How can you tell the difference between synchronous and asynchronous counters by looking at the outputs on an oscilloscope? Do synchronous counters suffer from propagation delay? What are the three groups of columns in a state transition table? What is the most important part of a state transition table the part that tells you the behaviour of the system? What do the x entries mean in a state transition table? How does the behaviour depend on their value? Write out the label columns of the present state and next state of the state transition table for a down counter. Can you repeat the hand-waving argument to design a down counter?