Secure Wireless Data Transmission

A PROJECT REPORT
Submitted in partial fulfillment for award of the degree of BACHELOR OF TECHNOLOGY (2008 2012) In Electronics & Communication Engineering

Guided By: Mr. Ronak Shrimal

Lecturer

Submitted By: Patel Kunjan (09EGIEC206) Zala Bhagirath

(09EGIEC213)

Soni Bhavin
(09EGIEC211)

Panday Viral
(09EGIEC205)

Department of Electronics & Communication Engineering GEETANJ ALI INSTITUTE OF TECHNICAL STUDIES
(Affiliated to Rajasthan Technical University, Kota, Rajasthan)

UDAIPUR, RAJASTHAN

April 2012

SYNOPSIS
In todays ever changing world, data security and secured transmission of confidential information is of paramount importance. Secured transmission of data can be achieved by means of encryption. Encryption is the process of transforming information (referred to as plaintext) to make it unreadable to anyone except those possessing special knowledge, usually referred to as a key. The result of the process is encrypted information (in cryptography, referred to as cipher text). In many contexts, the word encryption also implicitly refers to the reverse process, decryption (e.g. "software for encryption" can typically also perform decryption), to make the encrypted information readable again (i.e. to make it unencrypted). The original information is known as plaintext, and the encrypted form as cipher text. The cipher text message contains all the information of the plaintext message, but is not in a format readable by a human or computer without the proper mechanism to decrypt it; it should resemble random gibberish to those not intended to read it. PRESENT PRACTICES AND THEORY Presently the practice involved for acquiring the information regarding to do encryption and decryption of data includes 1. RSA Algorithm RSA is a public key algorithm invented by Rivest, Shamir and Adleman. In our project we are going to use the RSA algorithm which is we used for encryption and decryption purpose. Here we used the transmitter to encrypt the data using the public key. Similarly on receiver side the data received is decrypted using private key.

2. KEIL software. We are going to use KIEL software to write the programs.

3. PROTEUS software: We are going to use CorelDraw software to make hardware design.

PROPOSED WORK In our project, we are used two blocks of transmitter and receiver. Each of these blocks includes a processing unit and unit to encrypt and decrypt the data. The transmitter section includes a processor which gets the data from the 4X4 keypad interfaced to it. The controller stores this data and displays it on LCD. Then it performs the encryption of that data and displays it on LCD. Encrypted data is given to the transmitter module which passes the data towards the antenna for transmission. Thus encrypted data is then transmitted through channel towards receiver. The receiver section includes a processor where the data is decoded. The data is received by the receiver antenna. It is given to receiver module HT12-D and then to microcontroller. Here the decryption of data takes place. Now the original data is available which is displayed on LCD. The block diagram of project is as shown in fig.

Figure 1 The Block Diagram of Secured Data Transmission

89S52 MICROCONTROLLER The main part of our project is microcontroller, here we used Atmel 89S52 chip. It is used to connect between RFID Reader and Library server. This is 40 pin microcontroller used to interface LCD for display purpose and to receive the data coming from RFID reader on its serial input pins. We are do the programming in microcontroller by using Kiel software. RFID is used in our project because it has following advantages: RFID provides a quick, flexible, and reliable electronic means to detect, identify, track, and manage a variety of items. The technology is well-suited for many operations in all types of industries - provided that users develop new business processes to take advantage of RFIDs special abilities. By proposing this project we can overcome the disadvantages over the old practices and following are its merits:

a. Less man power. b. High efficiency. c. High accuracy. d. Less time consumption. e. Digital read out.

ACKNOWLEDGMENTS

The height of success does not depend only on the wings of hard work and dedication but also needs great support. Our deep sense of gratitude and respect to our guide Mr. Ronak Shrimal for extending us all the help and guidance in completing our project successfully. We would also like to express our sincere thanks to the principal, the staff members and also the nonteaching staff members. For their co-operation and technical guidance for the completion of our project.

GEET ANJ ALI INSTITUTE OF TECHNICAL STUDIES

(Affiliated to Rajasthan Technical University, Rajasthan)

UDAIPUR, RAJASTHAN

CERTIFICATE
Certified that the project work entitled ... carried out by Mr./Ms. ..., bonafied student(s) of Geetanjali Institute of Technical Studies, Dabok, Udaipur, in partial fulfillment for the award of Bachelor of Technology in Electronics & Communication Engineering of the Rajasthan Technical University, Kota during the year 2008-12. The project report has been approved as it satisfies the academic requirements in respect of Project work.

Rajeev Mathur
Associate Prof. & Head Department Of Electronics & Comm. Engg.

Ravinder Desuja
Lecturer/Asstt Prof.

Examiners 1 Signature: __________ Name: _____________

Examiners 2 Signature__________ Name: ____________

TABLE OF CONTENTS
CHAPTER NO. I. II. III. IV. 1. List Of Tables List Of Figures List Of Symbols List Of Abbreviation And Nomenclature Introduction To Cryptography 1.1. 1.2. 1.3. 2. Introduction The Purpose of cryptography Types of Cryptography 1 1 2 3 4 4 5 5 6 8 9 14 14 15 16 5 5 5 6 6 6 6 7 8 TITLE PAGE NO.

Organization of Project Work 2.1. Organization Of Project Work

3.

System Design 3.1. 3.2. 3.3. 3.4. Methodology Encryption Decryption RSA Algorithm

4.

Hardware Design 4.1. 4.2. 4.3. Circuit Diagram Layout Of Circuit Diagram List Of Components

5.

Software Design 5.1. 5.2. Encryption Algorithm Decryption Algorithm

6.

System Implementation And System Operation 6.1. 6.2. 6.3. System Implementation System Operation System Flowcharts

7. 8.

Advantages Application

CHAPTER NO. 9. 10. 11. Future Scope Conclusion Appendix

TITLE

PAGE NO. 9 10 11

LIST OF TABLES
SR.NO. 1. TITLE Table of Interrupts in 89s52 (39) PAGE NO. 4

LIST OF FIGURES
FIGURE NO. TITLE PAGE NO.

1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26.

The Block Diagram of Secured Data Transmission Block Diagram of Project Block Diagram of Encryption Block Diagram of Decryption Circuit Diagram Layout of Transmitter circuit Diagram Layout of Receiver circuit Diagram Layout of Keyboard circuit Diagram Diagram of LCD Display Diagram of Keypad Diagram of Transmitter Module Flow Chart of HT12E Circuit Diagram of Transmitter Diagram of Receiver Module Circuit Diagram of Receiver Flow Chart of HT12D Pin Out Diagram of 89S52 Flow Chart of Encryption Algorithm Flow Chart of Decryption Algorithm Picture of Transmitter Kit Picture of Receiver Kit Flow Chart of Transmitter Flow Chart of Receiver Flow Chart of Encryption Flow Chart of Decryption Circuit Diagram of Secured Data Transmission 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 1 2 3 4

NOMENCLATURE
Symbol N E D AES DES FIPS NBS NIST PKC SKC Name and Unit Modulus The Public Exponent OR Encryption Exponent The Secret exponent or decryption exponent Advanced Encryption Standard Data Encryption Standard Federal Information Processing Standards National Bureau of Standards National Institute for Standards and Technology Public Key Cryptography Secret Key Cryptography PAGE NO. 1 2 3 4 5 6 7 8 9 10

CHAPTER-1
INTRODUCTION TO CRYPTOGRAPHY

1.1 Introduction
Does increased security provide comfort to paranoid people? Or does security provide some very basic protections that we are naive to believe that we don't need? During this time when the Internet provides essential communication between tens of millions of people and is being increasingly used as a tool for commerce, security becomes a tremendously important issue to deal with. There are many aspects to security and many applications, ranging from secure commerce and payments to private communications and protecting passwords. One essential aspect for secure communications is that of cryptography, which the focus of this chapter is. But it is important to note that while cryptography is necessary for secure communications, it is not by itself sufficient. The reader is advised, then, that the topics covered in this chapter only describe the first of many steps necessary for better security in any number of situations. This chapter has two major purposes. The first is to define some of the terms and concepts behind basic cryptographic methods, and to offer a way to compare the myriad cryptographic schemes in use today. The second is to provide some real examples of cryptography in use today. I would like to say at the outset that this paper is very focused on terms, concepts, and schemes in current use and is not a treatise of the whole field. No mention is made here about pre-computerized crypto schemes, the difference between a substitution and transposition cipher, cryptanalysis, or other history. Interested readers should check out some of the books in the bibliography below for this detailed and interesting! background information.

1.2 The Purpose of cryptography

Cryptography is the science of writing in secret code and is an ancient art; the first documented use of cryptography in writing dates back to circa 1900 B.C. when an Egyptian scribe used non-standard hieroglyphs in an inscription. Some experts argue that cryptography appeared spontaneously sometime after writing was invented, with applications ranging from diplomatic missives to war-time battle plans. It is no surprise, then, that new forms of cryptography came soon after the widespread development of computer communications. In data and telecommunications, cryptography is necessary when communicating over any untrusted medium, which includes just about any network, particularly the Internet. Within the context of any application-to-application communication, there are some specific security requirements, including:

Authentication: The process of proving one's identity. (The primary forms of host-to-host authentication on the Internet today are name-based or address-based, both of which are notoriously weak.)

Privacy/confidentiality: Ensuring that no one can read the message except the intended receiver.

Integrity: Assuring the receiver that the received message has not been altered in any way from the original.

Non-repudiation: A mechanism to prove that the sender really sent this message.

Cryptography, then, not only protects data from theft or alteration, but can also be used for user authentication. There are, in general, three types of cryptographic schemes typically used to accomplish these goals: secret key (or symmetric) cryptography, public-key (or asymmetric) cryptography, and hash functions, each of which is described below. In all cases, the initial unencrypted data is referred to as plaintext. It is encrypted into cipher text, which will in turn (usually) be decrypted into usable plaintext. In many of the descriptions below, two communicating parties will be referred to as Alice and Bob; this is the common nomenclature in the crypto field and literature to make it easier to identify the communicating parties. If there is a third or fourth party to the communication,

they will be referred to as Carol and Dave. Mallory is a malicious party, Eve is an eavesdropper, and Trent is a trusted third party.

1.3 The Purpose of cryptography

There are several ways of classifying cryptographic algorithms. For purposes of this paper, they will be categorized based on the number of keys that are employed for encryption and decryption, and further defined by their application and use. The three types of algorithms that will be discussed are:

Secret Key Cryptography (SKC): Uses a single key for both encryption and decryption Public Key Cryptography (PKC): Uses one key for encryption and another for decryption.

Hash Functions: Uses a mathematical transformation to irreversibly "encrypt" information.

1.3.1 Secret Key Cryptography

With secret key cryptography, a single key is used for both encryption and decryption. As shown in Figure 1A, the sender uses the key (or some set of rules) to encrypt the plaintext and sends the cipher text to the receiver. The receiver applies the same key (or rule set) to decrypt the message and recover the plaintext. Because a single key is used for both functions, secret key cryptography is also called symmetric encryption. With this form of cryptography, it is obvious that the key must be known to both the sender and the receiver; that, in fact, is the secret. The biggest difficulty with this approach, of course, is the distribution of the key. Secret key cryptography schemes are generally categorized as being either stream ciphers or block ciphers. Stream ciphers operate on a single bit (byte or computer word) at a time and implement some form of feedback mechanism so that the key is constantly changing. A block cipher is so-called because the scheme encrypts one block of data at a time using the same key on each block. In general, the same plaintext block will always encrypt to the same cipher text when using the same key in a block cipher whereas the same plaintext will encrypt to different cipher text in a stream cipher.

Stream ciphers come in several flavors but two are worth mentioning here. Selfsynchronizing stream ciphers calculate each bit in the key stream as a function of the previous n bits in the key stream. It is termed "self-synchronizing" because the decryption process can stay synchronized with the encryption process merely by knowing how far into the n-bit key stream it is. One problem is error propagation; a garbled bit in transmission will result in n garbled bits at the receiving side. Synchronous stream ciphers generate the key stream in a fashion independent of the message stream but by using the same key stream generation function at sender and receiver. While stream ciphers do not propagate transmission errors, they are, by their nature, periodic so that the key stream will eventually repeat. Secret key cryptography algorithms that are in use today include:

Data Encryption Standard (DES): The most common SKC scheme used today, DES was designed by IBM in the 1970s and adopted by the National Bureau of Standards (NBS) [now the National Institute for Standards and Technology (NIST)] in 1977 for commercial and unclassified government applications. DES is a block-cipher employing a 56-bit key that operates on 64-bit blocks. DES has a complex set of rules and transformations that were designed specifically to yield fast hardware implementations and slow software implementations, although this latter point is becoming less significant today since the speed of computer processors is several orders of magnitude faster today than twenty years ago. IBM also proposed a 112-bit key for DES, which was rejected at the time by the government; the use of 112-bit keys was considered in the 1990s, however, conversion was never seriously considered.

DES is defined in American National Standard X3.92 and three Federal Information Processing Standards (FIPS):

FIPS 46-3: DES FIPS 74: Guidelines for Implementing and Using the NBS Data Encryption Standard FIPS 81: DES Modes of Operation

Information about vulnerabilities of DES can be obtained from the Electronic Frontier Foundation.

Advanced Encryption Standard (AES): In 1997, NIST initiated a very public, 4-1/2 year process to develop a new secure cryptosystem for U.S. government applications. The result, the Advanced Encryption Standard, became the official successor to DES in December 2001. AES uses an SKC scheme called Rijndael, a block cipher designed by Belgian cryptographers Joan Daemen and Vincent Rijmen. The algorithm can use a variable block length and key length; the latest specification allowed any combination of keys lengths of 128, 192, or 256 bits and blocks of length 128, 192, or 256 bits. NIST initially selected Rijndael in October 2000 and formal adoption as the AES standard came in December 2001. FIPS PUB 197 describes a 128-bit block cipher employing a 128-, 192-, or 256-bit key. The AES process and Rijndael algorithm are described in more detail below in Section 5.9. Rivest Ciphers (aka Ron's Code): Named for Ron Rivest, a series of SKC algorithms. RC1: Designed on paper but never implemented. RC2: A 64-bit block cipher using variable-sized keys designed to replace DES. It's code has not been made public although many companies have licensed RC2 for use in their products. Described in RFC 2268. RC3: Found to be breakable during development. RC4: A stream cipher using variable-sized keys; it is widely used in commercial cryptography products, although it can only be exported using keys that are 40 bits or less in length. RC5: A block-cipher supporting a variety of block sizes, key sizes, and number of encryption passes over the data. Described in RFC 2040. RC6: An improvement over RC5, RC6 was one of the AES Round 2 algorithms.

1.3.2 Public Key Cryptography

Public-key cryptography has been said to be the most significant new development in cryptography in the last 300-400 years. Modern PKC was first described publicly by Stanford University professor Martin Hellman and graduate student Whitfield Diffie in 1976. Their paper described a two-key crypto system in which two parties could engage in a secure communication over a non-secure communications channel without having to share a secret key.

Generic PKC employs two keys that are mathematically related although knowledge of one key does not allow someone to easily determine the other key. One key is used to encrypt the plaintext and the other key is used to decrypt the cipher text. The important point here is that it does not matter which key is applied first, but that both keys are required for the process to work. Because a pair of keys is required, this approach is also called asymmetric cryptography. In PKC, one of the keys is designated the public key and may be advertised as widely as the owner wants. The other key is designated the private key and is never revealed to another party. It is straight forward to send messages under this scheme. Public-key cryptography algorithms that are in use today for key exchange or digital signatures include:

RSA: The first, and still most common, PKC implementation, named for the three MIT mathematicians who developed it Ronald Rivest, Adi Shamir, and Leonard Adleman. RSA today is used in hundreds of software products and can be used for key exchange, digital signatures, or encryption of small blocks of data. RSA uses a variable size encryption block and a variable size key. The key-pair is derived from a very large number, n, that is the product of two prime numbers chosen according to special rules; these primes may be 100 or more digits in length each, yielding an n with roughly twice as many digits as the prime factors. The public key information includes n and a derivative of one of the factors of n; an attacker cannot determine the prime factors of n (and, therefore, the private key) from this information alone and that is what makes the RSA algorithm so secure. (Some descriptions of PKC erroneously state that RSA's safety is due to the difficulty in factoring large prime numbers. In fact, large prime numbers, like small prime numbers, only have two factors!) The ability for computers to factor large numbers, and therefore attack schemes such as RSA, is rapidly improving and systems today can find the prime factors of numbers with more than 200 digits. Nevertheless, if a large number is created from two prime factors that are roughly the same size, there is no known factorization algorithm that will solve the problem in a reasonable amount of time; a 2005 test to factor a 200-digit number took 1.5 years and over 50 years of compute time

1.3.3 Hash Functions

Hash functions, also called message digests and one-way encryption, and are algorithms that, in some sense, use no key (Figure 1C). Instead, a fixed-length hash value is computed based upon the plaintext that makes it impossible for either the contents or length of the plaintext to be recovered. Hash algorithms are typically used to provide a digital fingerprint of a file's contents often used to ensure that the file has not been altered by an intruder or virus. Hash functions are also commonly employed by many operating systems to encrypt passwords. Hash functions, then, provide a measure of the integrity of a file. Hash algorithms that are in common use today include:

Message Digest (MD) algorithms: A series of byte-oriented algorithms that produce a 128-bit hash value from an arbitrary-length message.

CHAPTER-2
ORGANIZATION OF PROJECT WORK 2.1 Organization of Project Work
The project work was organized in four steps. PCB making As per the block diagram we designed the circuit diagram and prepared two separate PCBS. One PCB working as transmitter and other as receiver. The two PCBs are of glass epoxy material. They are double sided PCBs.

PCB Mounting The transmitter PCB consists of microcontroller 89S52, buffer 74LS145, LCD 16X2, LED, keypad 16X16, transmitter module HT12-E and antenna. The receiver consists of microcontroller 89S52, buffer 74LS145, LCD 16X2, receiver module HT12-D and antenna. All these components are mounted on PCB.

RSA algorithm software This is the RSA algorithm which we are using for encryption and decryption. We have written the programs in KIEL software. Here the transmitter encrypts the data using the public key. Similarly on receiver side the data received is decrypted using private key.

Synchronization of transmitter and receiver The microcontroller was programmed using RSA algorithm software. The data was entered from the transmitter using the keypad by pressing any of the keys and then encrypted. The encrypted data is transmitted by transmitter module. The receiver receives the data from transmitter and performs the decryption of that. The synchronization of transmitter and receiver was done to transmit and receive data at the same time without any delay. Thus both simultaneously get ready to transmit new data and receive.

CHAPTER-3
SYSTEM DESIGN 3.1 METHODOLOGY
3.1.1 BLOCK DIAGRAM

Figure 2 Block Diagram of Project

3.1.2 DESCRIPTION
There two blocks transmitter and receiver. Each of these blocks includes a processing unit and unit to encrypt and decrypt the data. The transmitter section includes a processor which gets the data from the 4X4 keypad interfaced to it. The controller stores this data and displays it on LCD. Then it performs the encryption of that data and displays it on LCD. Encrypted data is given to the transmitter module which passes the data towards the antenna for transmission. Thus encrypted data is then transmitted through channel towards receiver. The receiver section includes a processor where the data is decoded. The data is received by the receiver antenna. It is given to receiver module HT12-D and then to microcontroller. Here the decryption of data takes place. Now the original data is available which is displayed on LCD.

3.2 ENCRYPTION
The basic idea of cryptography is to hide information from prying eyes. On the Internet this can be your credit card numbers, bank account information, health/social security information, or personal correspondence with someone else. In todays ever changing world, data security and secured transmission of confidential information is of paramount importance. Secured transmission of data can be achieved by means of encryption. Encryption renders the data useless, if by any means it falls into the hands of a person, who should not know anything about the data. The various applications of encryption include certain military and commercial applications. The scope of application includes point to point and device to device communication. This can be implemented using simple, inexpensive and common hardware. Encryption is the science of changing data so that it is unrecognizable and useless to an unauthorized person. The most secure techniques use a mathematical algorithm and a variable value known as a 'key'. The selected key (often any random character string) is input on encryption and is integral to the changing of the data. The EXACT same key MUST be input to enable decryption of the data. This is the basis of the protection.... if the key (sometimes called a password) is only known by authorized individual(s), the data cannot be

exposed to other parties. Only those who know the key can decrypt it. This is known as 'private key' cryptography, which is the most well known form. The process of encryption begins by converting the text to a pre hash code. This code is generated using a mathematical formula. This pre hash code is encrypted by the software using the senders private key. The private key would be generated using the algorithm used by the software. The encrypted pre hash code and the message are encrypted again using the sender's private key. The next step is for the sender of the message to retrieve the public key of the person this information is intended for. The sender encrypts the secret key with the recipient's public key, so only the recipient can decrypt it with his/her private key, thus concluding the encryption process.

Figure 3 Block Diagram of Encryption A few decades ago, only governments and diplomats used encryption to secure sensitive information. Today, secure encryption on the Internet is the key to confidence for people wanting to protect their privacy, or doing business online. E-Commerce, secure messaging, and virtual private networks are just some of the applications that rely on encryption to ensure the safety of data. In many companies that have proprietary or sensitive information, field personnel are required to encrypt their entire laptops fearing that in the wrong hands this information could cause millions of dollars in damage

Depending upon the application importance, the cost of hardware and encryption software may vary. For day to day applications we can have a simple and cheap encryption system and for more important purposes the complexity and cost may rise. The transmission of encrypted data can be achieved by using wireless or wired channel. Again having a wireless based encryption system makes the system more complex and at the same time raising the cost. The wide range of applications and the need of secured data transmission make the technology indispensable in this modern world.

3.3 DECRYPTION

Figure 4 Block Diagram of Decryption After the data is encrypted it should be decrypted at the receiver. Hence decryption algorithm is introduced at receiver. The receiver holds a private key which is very secret key and is known to a particular receiver for which the data is sent by dedicated transmitter. Firstly the private key is taken if it correct then the next decryption is done. The original data is obtained which is sent by transmitter.

3.4 RSA ALGORITHM

RSA is a public key algorithm invented by Rivest, Shamir and Adleman. The key used for encryption is different from (but related to) the key used for decryption. The algorithm is based on modular exponentiation. Numbers e, d and N are chosen with the property that if A is a number less than N, then (A^e mod N) d mod N = A.

This means that you can encrypt A with e and decrypt using d. Conversely you can encrypt using d and decrypt using e (though doing it this way round is usually referred to as signing and verification).

The pair of numbers (e, N) is known as the public key and can be published. The pair of numbers (d, N) is known as the private key and must be kept secret.

The number e is known as the public exponent, the number d is known as the private exponent, and N is known as the modulus. When talking of key lengths in connection with RSA, what is meant is the modulus length. An algorithm that uses different keys for encryption and decryption is said to be asymmetric. Anybody knowing the public key can use it to create encrypted messages, but only the owner of the secret key can decrypt them. Conversely the owner of the secret key can encrypt messages that can be decrypted by anybody with the public key. Anybody successfully decrypting such messages can be sure that only the owner of the secret key could have encrypted them. This fact is the basis of the digital signature technique. Without going into detail about how e, d and N are related, d can be deduced from e and N if the factors of N can be determined. Therefore the security of RSA depends on the difficulty of factorizing N. Because factorization is believed to be a hard problem, the longer N is, the more secure the cryptosystem. Given the power of modern computers, a length of 768 bits is considered reasonably safe, but for serious commercial use 1024 bits is recommended. KEY LENGTH The key length for a secure RSA transmission is typically 1024 bits. 512 bits is now no longer considered secure. For more security or if you are paranoid, use 2048 or even 4096 bits. With the faster computers available today, the time taken to encrypt and decrypt even with a 4096-bit modulus really isn't an issue anymore. In practice, it is still effectively impossible for you or I to crack a message encrypted with a 512-bit key. An organization like the NSA who has the latest supercomputers can probably crack it by brute force in a reasonable time, if they choose to put their resources to work on it. The longer your information is needed to be kept secure, the longer the key you should use. Keep up to date with the latest recommendations in the security journals.

No one is going to criticizes you for using a key that is too long provided your software still performs adequately. However, in our opinion, the biggest danger in using a key that is too large is the false sense of security it provides to the implementers and users. "Oh, we have 4096-bit security in our system" may sound impressive in a marketing blurb, but the fact that your private key is not adequately protected or your random number generator is not random may mean that the total security is next to useless. If we are encrypting the plaintext with a conventional symmetrical algorithm like DES, our session key is going to be 64 bits long. Triple DES will need 192 bits, and AES will need up to 256 bits. That gives us lots of security. Unlike our simple examples above where we had to deal with a series of integers, to encrypt a 256-bit key with a 1024-bit RSA modulus means we only need a single representative message integer. In fact, you need to pad the 256 bits to ensure that we have a large enough integer before we encrypt it with RSA. 1024 bits is 128 bytes long, so we have quite a handful of data to deal with. Key Generation Algorithm Generate two large random primes, P and Q, of approximately equal size such that their product n = pq is of the required bit length, e.g. 1024 bits. [See note 1]. Compute N = PQ and () phi = (P-1) (Q-1). Choose an integer E, 1 < E < phi, such that gcd (E, phi) = 1. [See note 2]. Compute the secret exponent d, 1 < D < phi, such that

ED 1 (mod phi). [See note 3]. The public key is (N, E) and the private key is (N, D). The values of P, Q, and phi should also be kept secret. N is known as the modulus. E is known as the public exponent or encryption exponent. D is known as the secret exponent or decryption exponent.

Encryption Sender A does the following:Obtains the recipient B's public key (N, E). Represents the plaintext message as a positive integer T [see note 4]. Computes the cipher text C = T^E mod N. Sends the cipher text c to B.

Decryption Recipient B does the following:Uses his private key (N, D) to compute T = T^E mod N. Extracts the plaintext from the integer representative T

An example of RSA algorithm: P = 61 Q = 53 <- first prime number (destroy this after computing E and D) <- second prime number (destroy this after computing E and D)

PQ = N=3233 <- modulus (give this to others) E = 17 <- public exponent (give this to others)

D = 2753 <- private exponent (keep this secret!) Your public key is (E, PQ). Your private key is D. The encryption function is: Encrypt (T) = (T^E) mod PQ = (T^17) mod 3233

The decryption function is: Decrypt(C) = (C^D) mod PQ = (C^2753) mod 3233 To encrypt the plaintext value 123, do this: Encrypt (123) = (123^17) mod 3233 = 337587917446653715596592958817679803 mod 3233 = 855 To decrypt the cipher text value 855, do this: Decrypt (855) = (855^2753) mod 3233 = 123

CHAPTER-4
HARDWARE DESIGN 4.1 CIRCUIT DIAGRAM

Figure 5 circuit Diagram

4.2 LAYOUT OF CIRCUIT DIAGRAM

Figure 6 Layout of Transmitter circuit Diagram

Figure 7 Layout of Receiver circuit Diagram

Figure 8 Layout of Keyboard circuit Diagram

4.3 LIST OF COMPONENTS

POWER SUPPLY We have designed a power supply of 5V for both transmitter and receiver section. LCD DISPLAY

Figure 9 diagram of LCD display Here we used LCD to display the message transmitted and received. We are using 16 x 2 bit type of LCD. The display module reset itself to an initial state when the power is applied, which continuously the display has blanked off, so that even if character are entered, they cannot be seen. It is therefore necessary to issue a command at this point, to switch the display on.

KEYPAD

Figure 10 diagram of keypad We have used 4x4 keypad for entering the message which is interfaced with microcontroller. Each key contains a specific message which will be transmitted. for each key particular message is given. TRANSMITTER MODULE The idea is to use off-the-shelf RF TX/RX modules. These modules, once a rare commodity, are now widely and cheaply available. In this particular discussion, we shall be using ASK (Amplitude Shift Keying) based TX/RX pair operating at 433 MHz. The transmitter module accepts serial data at a maximum of XX baud rate. They can be directly interfaced to a microcontroller or can be used in remote control applications with the help of encoder/decoder ICs. The encoder IC takes in parallel data at the TX side, packages it into serial format and then transmits it with the help of a RF transmitter module. At the RX end, the decoder IC receives the signal via the RF receiver module, decodes the serial data and reproduces the original data in the parallel format.

Figure 11 diagram of transmitter module HT12E

Figure 12 flow chart of HT12E

General Description
The 212 encoders are a series of CMOS LSI for remote control system applications. They are capable of encoding information which consists of N address bits and 12_N data bits. Each address/ data input can be set to one of the two logic states. The programmed addresses/data

are transmitted together with the header bits via an RF or an infrared transmission medium upon receipt of a trigger signal. The capability to select a TE trigger on the HT12E or a DATA trigger on the HT12A further enhances the application flexibility of the 212 series of encoders. The HT12A additionally provides a 38 kHz carrier for infrared systems.

Figure 13 circuit diagram of transmitter

RECEIVER MODULE

Figure 14 diagram of receiver module

Figure 15 circuit diagram of receiver They can be directly interfaced to a microcontroller or can be used in remote control applications with the help of encoder/decoder ICs. The encoder IC takes in parallel data at the TX side packages it into serial format and then transmits it with the help of a RF transmitter module. At the RX end, the decoder IC receives the signal via the RF receiver module, decodes the serial data and reproduces the original data in the parallel format.

HT12D

Figure 16 flow chart of HT12D

89S52 MICROCONTROLLER The main part of our project is microcontroller, here we used Atmel 89S52 chip. It is used to connect between RFID Reader and Library server. This is 40 pin microcontroller used to interface LCD for display purpose and to receive the data coming from RFID reader on its serial input pins. PIN OUT OF 89S52

Figure17 pin out diagram of 89S52 INTERRUPTS The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timers interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown in Figure 10.

Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once. Note that Table 5 shows that bit position IE.6 is unimplemented. In the AT89S52, bit position IE.5 is also unimplemented. User software should not write 1s to these bit positions, since they may be used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software. The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.

Table: Table of Interrupts in 89S52

CHAPTER-5
SOFTWARE DESIGN 5.1 ENCRYPTION ALGORITHM
START

RECEIVE DATA ON KEY PRESS & STORE AS 2 CALL ENCRYPTION ALGORITHM

GET 2 PRIME NOS: 3, 11 CACULATE: N=3*11

GET THE PUBLIC KEY-3

CALCULATE: ENCRYPT= (2^3) MOD 33 DISPLAY ENCRYPTED DATA 8ON LCD TRANSMIT ENCRYPTED DATA BY ANTENNA

STOP

Figure 18 Flow Chart of Encryption Algorithm

5.2 DECRYPTION ALGORITHM

START

RECEIVE ENCRYPTED DATA 8& STORE AS B CALL DECRYPTION ALGORITHM

GET 2 PRIME NOS: 3, 11 CACULATE: N=3*11

GET THE PRIVATE KEY7

CALCULATE: DECRYPT= (8^7) MOD 33 333333 DISPLAY DECRYPTED DATA 2ON LCD

STOP

Figure 19 Flow Chart of Decryption Algorithm

CHAPTER-6
SYSTEM IMPLEMENTATION AND SYSTEM OPERATION 6.1 SYSTEM IMPLEMENTATION

Figure 20 Picture of Transmitter Kit

Figure 21 Picture of Receiver Kit

6.2 SYSTEM OPERATION

The system works on the principle of encryption and decryption. We have used two separate circuits for transmission of encrypted data and receiver for decryption of data. The system communicates on wireless basis. The two circuits work as following. Transmitter The power supply of 5V is made ON which supplies power to all subunits. LCD is interfaced at port0, keypad is interfaced at port1 and transmitter module at port2 (higher nibble). The microcontroller 89S52 begins functioning by initializing the LCD and keypad. The microcontroller waits for an interrupt from keypad by scanning the lines where every key is assigned with separate data. When the key is pressed interrupt is generated at port3 (pin 3.2). On occurrence of interrupt the address of pressed key is detected and the data on that key is taken in and displayed on LCD. The encryption of the data takes place here as explained below:

P = first prime number Q = second prime number PQ = N E = public key D =private key Public Key is (E, PQ). Private Key is D. The encryption function is: Encrypt (T) = (T^E) mod PQ The encrypted data is displayed on LCD. This data is divided into lower and higher nibble since only 4 lines are available for transmission. This is done by masking and shifting the data. First the lower nibble is sent on 4 lines which then forward the data to antenna and then towards the receiver. Similarly the higher nibble is sent. The controller now again goes to initial condition and checks for new key to be pressed.

Receiver The receiver is made on by switching the power supply. The microcontroller initiates itself and the LCD at port0. Here the receiver antenna receives lower nibble first an then the higher nibble as transmitted by the transmitter. These two received data bits are combined together by adding the two nibbles. This is the encrypted data. Now the decryption algorithm takes place as follows:

Private Key is D. The decryption function is: Decrypt(C) = (C^D) mod PQ This decrypted data is our original data which is displayed on the LCD. The receiver now waits to receive the next data from transmitter.

6.3 SYSTEM FLOWCHARTS

HARDWARE FLOWCHART

START

INITIALIZE LCD

INITIALIZE KEYPAD

IS KEY PRESSED?

STORE THE DATA AND DISPLAY ON IT LCD ENCRYPT THE DATA AND DISPLAY ON LCD TRANSMIT ENCRYPTED DATA BY ANTENNA WAIT TILL DATA IS TRANSMITED

STOP

Figure 22 flow chart of transmitter

Figure 23 flow chart of receiver

SOFTWARE FLOWCHART

START

RECEIVE DATA ON KEY PRESS & STORE AS A CALL ENCRYPTION ALGORITHM

GET 2 PRIME NOS: P, Q CACULATE: N=P*Q

GET THE PUBLIC KEY-E

CALCULATE: ENCRYPT= (A^E) MOD N DISPLAY ENCRYPTED DATA ON LCD TRANSMIT ENCRYPTED DATA BY ANTENNA

STOP

Figure 24 Flow Chart of Encryption

START

RECEIVE ENCRYPTED DATA & STORE AS B CALL DECRYPTION ALGORITHM

GET 2 PRIME NOS: P, Q CACULATE: N=P*Q

GET THE PRIVATE KEYD

CALCULATE: DECRYPT= (B^D) MOD N DISPLAY DECRYPTED DATA ON LCD

STOP

Figure 25 Flow Chart of Decryption

RESULT

Figure 26 Circuit Diagram of Secured Data Transmission

KEY NO. 1. 2. 3. 4. ORIGINAL DATA Blue Pink Gray Cyan ENCRYPTED DATA #8p% +z=2 5?m@ w$6x DECRYPTED DATA Blue Pink Gray Cyan

ADVANTAGES

Secured data transmission can be used for military purposes. Even if the enemy intercepts the information, he will be unable to extract the required data as he will be unable to extract the required data as he will not be having the required decoding logic.

It flexibly uses a wide array of enciphering and deciphering algorithms within the signal processing circuit.

Also provides at low cost flexible features such as compression and decompression of communication signals and forward error correction of these signals.

.As encryption technique is used the bandwidth is reduced. The circuitry is simple and effective

APPLICATION

Encryption has long been used by militaries and governments to facilitate secret communication. Encryption is now used in protecting information within many kinds of civilian systems, such as computers, networks (e.g. Internet e-commerce),mobile telephones and bank automatic teller machines.

Encryption is also used in digital rights management to restrict the use of copyrighted material and in software copy protection to protect against reverse engineering and software piracy.

Ciphers have been the choice for several communication standards, like IEEE and Bluetooth.

FUTURE SCOPE

The present system uses RF module for data transfer. This system can be implemented using any advanced technique of data transmission. We can implement this system for the voice transmission as well as for video information.

It might be desirable to find other examples, to provide alternative implementations should the security of our system turn out someday to be inadequate. There are surely also many new applications to be discovered for these functions.

CONCLUSION
We proposed a method for implementing a public-key cryptosystem whose security rests in part on the difficulty of factoring large numbers. If the security of method proves to be adequate, it permits secure communications to be established without the use of couriers to carry keys, and it also permits one to sign" digitized documents. The security of this system needs to be examined in more detail. In particular, the difficulty of factoring large numbers should be examined very closely.

APPENDIX DATASHEET
1. 89S52 MICROCONTROLLER
1.1. FEATURES Compatible with MCS-51 Products 8K Bytes of In-System Programmable (ISP) Flash Memory Endurance: 1000 Write/Erase Cycles 4.0V to 5.5V Operating Range Fully Static Operation: 0 Hz to 33 MHz Three-level Program Memory Lock 256 x 8-bit Internal RAM 32 Programmable I/O Lines Three 16-bit Timer/Counters Eight Interrupt Sources Full Duplex UART Serial Channel Low-power Idle and Power-down Modes Interrupt Recovery from Power-down Mode Watchdog Timer Power-off Flag

1.2. DESCRIPTION The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K Bytes of in-system programmable Flash memory. The device is manufactured using Atmels highdensity nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and costeffective solution to many embedded control applications.

The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a sixvector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.

PIN DESCRIPTION VCC Supply voltage. GND Ground Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 can also be configured to be the multiplexed low order Address/data bus during

accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pull-ups are required during program verification. Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter trigger input (P1.1/T2EX), respectively .Port 1 also receives the low-order address bytes during Flash programming and verification. Port 2 Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high order address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 also serves the functions of various special features of the AT89S52, as shown in the following table. Port 3 also receives some control signals for Flash programming and verification.

RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 96 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled. ALE/PROG Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable has no effect if the microcontroller is in external execution mode. PSEN Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/VPP External Access Enable EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2 Output from the inverting oscillator amplifier MEMORY ORGANIZATION MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed. Program Memory If the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory. Data Memory The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access of the SFR space. MOV 0A0H, #data Instructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H). Timer 0 and 1 Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the AT89C51 and AT89C52. Timer 2 Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator.

The modes are selected by bits in T2CON. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.

2. 74LS245
The 74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input (DR) controls transmission of Data from bus A to bus B or bus B to bus a depending upon its logic level. The Enable input (E) can be used to isolate the buses. Hysteresis Inputs to Improve Noise Immunity 2-Way Asynchronous Data Bus Communication Input Diodes Limit High-Speed Termination Effects ESD > 3500 Volts

Logic and Connection Diagrams Dip

3. HT12E
3.1. Features Operating voltage 2.4V~5V for the HT12A 2.4V~12V for the HT12E

Low power and high noise immunity CMOS technology Low standby current: 0.1A (type.) at VDD=5V HT12A with a 38kHz carrier for infrared transmission medium Minimum transmission word Four words for the HT12E Built-in oscillator needs only 5% resistor

3.2. Block Diagram

3.3. General Description The 212 encoders are a series of CMOS LSIs for remote control system applications. They are capable of encoding information which consists of N address bits and 12_N data bits. Each address/ data input can be set to one of the two logic states. The programmed addresses/data are transmitted together with the header bits via an RF or an infrared transmission medium upon receipt of a trigger signal. The capability to select a TE trigger on the HT12E or a DATA trigger on the HT12A further enhances the application flexibility of the 212 series of encoders. The HT12A additionally provides a 38 kHz carrier for infrared systems.

3.4. Pin description

Absolute Maximum Ratings Supply Voltage (HT12E) ..............._0.3V to 13V Storage Temperature................._50_C to 125_C

3.5. Application circuit

4. HT12D
4.1. Features Operating voltage: 2.4V~12V Low power and high noise immunity CMOS technology Low standby current Capable of decoding 12 bits of information

Binary address setting Received codes are checked 3 times Address/Data number combination HT12D: 8 address bits and 4 data bits Built-in oscillator needs only 5% resistor Valid transmission indicator Easy interface with an RF or an infrared transmission medium.

4.2. Block Diagram

4.3. Functional Description 4.3.1. Operation The 2^12 series of decoders provides various combinations of addresses and data pins in different packages so as to pair with the 2 ^12 series of encoders. The decoders receive data that are transmitted by an encoder and interpret the first N bits of code period as addresses and the last 12_N bits as data, where N is the address code number. A signal on the DIN pin activates the oscillator which in turn decodes the incoming address and data. The decoders will then check the received address three times continuously. If the received address codes all match the contents of the decoders local address, the 12_N bits of data are decoded to activate the output pins and the VT pin is set high to indicate a valid transmission. This will

last unless the address code is incorrect or no signal is received. The output of the VT pin is high only when the transmission is valid. Otherwise it is always low.

4.3.2. Output type The 2^12 series of decoders, the HT12F has no data output pin but its VT pin can be used as a momentary data output. The HT12D, on the other hand, provides 4 latch type data pins whose data remain unchanged until new data are received.

5. 433 MHz RF Receiver STR-433

5.1. Overview The STR-433 is ideal for short-range remote control applications where cost is a primary concern. The receiver module requires no external RF components Except for the antenna. It generates virtually no emissions, making FCC and ETSI approvals easy. The super-regenerative design exhibits exceptional Sensitivity at a very low cost. The manufacturing-friendly SIP style package and low-cost make the STR-433 suitable for high volume applications. 5.2. Features Low Cost 5V operation 3.5mA current drain No External Parts are required Receiver Frequency: 433.92 MHZ Typical sensitivity: -105dBm IF Frequency: 1MHz

5.3. Applications

Car security system Sensor reporting Automation system Remote Keyless Entry (RKE) Remote Lighting Controls On-Site Paging Asset Tracking Wireless Alarm and Security Systems Long Range RFID Automated Resource Management

5.4. Pin Outs

5.5. Specification

5.6. Operation 5.6.1. Super-Regenerative AM Detection The STR-433 uses a super-regenerative AM detector to demodulate the incoming AM carrier. A super regenerative detector is a gain stage with positive feedback greater than unity so that it oscillates. An RC-time constant is included in the gain stage so that when the gain stage oscillates, the gain will be lowered over time proportional to the RC time constant until the oscillation eventually dies. When the oscillation dies, the current draw of the gain stage decreases, charging the RC circuit, increasing the gain, and ultimately the oscillation starts again. In this way, the oscillation of the gain stage is turned on and off at a rate set by the RC time constant. This rate is chosen to be super-audible but much lower than the main oscillation rate. Detection is by measuring the emitter current of the gain stage. Any RF input signal at the frequency of the main oscillation will aid the main oscillation in restarting. If the amplitude of the RF input increases, the main oscillation will stay on for a longer period of time, and the emitter current will be higher. Therefore, we can detect the original base-band signal by simply low-pass filtering the emitter current. The average emitter current is not very linear as a function of the RF input level. It exhibits a 1/ln response because of the exponentially rising nature of oscillator start-up. The steep slope of a logarithm near zero results in high sensitivity to small input signals. 5.6.2. Data Slicer

The data slicer converts the base-band analog signal from the super-regenerative detector to a CMOS/TTL compatible output. Because the data slicer is AC coupled to the audio output, there is a Minimum data rate. AC coupling also limits the minimum and maximum pulse width. Typically, data is encoded on the transmit side using pulse-width modulation (PWM) or non-return-to-zero (NRZ). The most common source for NRZ data is from a UART embedded in a micro-controller. Applications that use NRZ data encoding typically involve microcontrollers. The most common source for PWM data is from a remote control IC such as the HC-12E from Holtek or ST14 CODEC from Sunrom Technologies. Data is sent as a constant rate square-wave. The duty cycle of that square wave will generally be either 33% (a zero) or 66% (a one). The data slicer on the STR-433 is optimized for use with PWM encoded data, though it will work with NRZ data if certain encoding rules are followed. 5.6.3. Power Supply The STR-433 is designed to operate from a 5V power supply. It is crucial that this power supply be very quiet. The power supply should be bypassed using a 0.1uF low-ESR ceramic capacitor and a 4.7uF tantalum capacitor. These capacitors should be placed as close to the power pins as possible. The STR-433 is designed for continuous duty operation. From the time power is applied, it can take up to 750mSec for the data output to become valid. 5.6.4. Antenna Input It will support most antenna types, including printed antennas integrated directly onto the PCB and Simple single core wire of about 17cm. The performance of the different antennas varies. Any time a Trace is longer than 1/8th the wavelength of the frequency it is carrying; it should be a 50 ohm micro strip.

6. Liquid Crystal Display (LCD)

We used LCD as a dot matrix liquid crystal display that displays alphanumeric characters and symbols. It has built in controller. The 16x2 display and its pin configuration is shown in fig and table respectively.

Figure LCD (Liquid Crystal Display) unit

6.1. Pin Function of LCD Display Pin No 1 2 3 4 5 6 7 8 9 Symbol GND Vcc Vo RS R/W E D0 to D7 VB1 VB0 Ground Supply Voltage+5V Contrast adjustment Register select Read/ Write 0->Control input, Enable Data Backlight +5V Backlight ground Table no 1 Pin Function of LCD units 6.2. Feature Easy interface with 4 bit or 8 bit MPU or mc Built in LCD controller with font 5X7 or 5X10 dots Internal automatic reset circuit at power on Display data RAM for 80 char.(80*8 bits) 1-> Data input Details

7. KEYPAD
7.1. Introduction Scanning a 4x4 Keyboard matrix usually found in both consumer and industrial applications for numeric data entry. In this application, a 4x4 matrix keypad requiring eight Input/output ports for interfacing is used as an example. Rows are connected to Peripheral Input/output (PIO) pins configured as output. Columns are connected to PIO pins configured as input with interrupts. In this configuration, four pull-up resistors must be added in order to apply a high level on the corresponding input pins as shown in Figure 1. The corresponding hexadecimal value of the pressed key is sent on four LEDs.

7.2. I/O configuration Rows are connected to four PIO pins configured as outputs. Columns are connected to four PIO pins configured as inputs with interrupts. The idle state of these pins is high level due to four pull-up resistors. PIO interrupt is generated by a low level applied to these pins (caused by a key pressed). Four additional PIO pins are configured as outputs to send the value of the pressed key to LEDS. 7.3. Timer Counter Configuration

The Timer Counter is configured in waveform operating mode with RC compare interrupt. The Timer Counter is initialized to be incremented on internal clock cycles. The debouncing time is programmable by initializing the RC compare register value according to the clock source selected. A software trigger is used to reset the timer counter and start the counter clock.

7.4 Interrupt When a key is pressed, a low level is applied to the pin corresponding to the column associated to the key (pins configured as inputs with interrupts). A falling edge applied to a column pin creates a PIO interrupt. Then, the processor executes the PIO interrupt subroutine (debouncing) and comes back to its previous state (in the main program). After debouncing time, a RC compare timer interrupt occurs and the processor then executes the timer interrupt subroutine (decoding the pressed key) and comes back to its previous state (in the main program).

7.5. Keyboard Scan The Keyboard used is a 4x4 matrixes Keyboard. Columns are connected to pins configured as inputs and having the input change interrupt enabled. The initial state of these pins is high level due to four external pull-up resistors. The state machine is initialized to start with fast scan which outputs zeroes to all rows and detects all keys at the same time. When a key is pressed, a low level is applied to the corresponding column and causes a PIO interrupt to detect the first edge. Once any key is detected, debouncing is started. The attempt to press a key on a physical keypad and have this activity detected can fail as a result of several noise sources, glitches, spikes, etc., to mention some of the possible causes of debounce problems. The timer is used to eliminate all noise of less than a few milliseconds. Normally this is dependent on the mechanical characteristics of the keys. In this application example, a 20ms programmable debouncing time is used. After debouncing is completed, a detailed scan is executed. A second fast scan is done to assure that any detection made during the first fast scan stage was not just noise. (Refer to Figure 2 below.) Then, rows are configured as inputs. When a key is pressed a high level is applied in the corresponding row. .

REFERENCES
1) http://www.rsa.com/ 2) http://www.sunrom.com 3) http://www.webopedia.com/ 4) http://www.alldatasheet.com/ 5) http://www.cs.colostate.edu/