UTTAM BHAT

20 Via Lucca #D110 Irvine CA 92612 uttam.bhat@asu.edu www.public.asu.edu/~ubhat 480-252-5766/949-325-5833

OBJECTIVE ___________________________________________________________________________________ To obtain a Systems Design Signal Processing Engineer position to utilize my knowledge in communication systems and signal processing algorithms to solve challenging issues. SUMMARY ___________________________________________________________________________________ Strong understanding of communication systems Experience in understanding wireless protocols and developing protocol compliant simulation models Strong mathematical background

EDUCATION __________________________________________________________________________________ Ph.D., Electrical Engineering, Arizona State University, GPA: 4.00/4.00 Master of Science (obtained in passing with Ph.D. qualifying exam), Electrical Engineering, Arizona State University, GPA: 3.75/4.00 Bachelor of Engineering, Electronics & Communications, Sri Jayachamarajendra College of Engineering, Visvesvaraya Technological University (India) October 2011 May 2008 June 2004

PROFESSIONAL EXPERIENCE _________________________________________________________________ Wireless Systems Engineer, Mindspeed Technologies Inc., Newport Beach, California, USA LTE Modem Development (System on Chip) FDD Design and development of optimal decoding algorithms for Uplink Control Information (UCI) mapped on PUCCH and PUSCH Algorithm development and analysis Fixed pt. C-code development and optimization for CEVA X1641 Forward Error Correction (FEC) module analysis and propose optimal schemes to improve system wide performance TDD Simulation model (fixed and floating point) to address unique TDD features both at the mobile (UE) and base-station (eNodeB) Verification of the implementation of test bench developed by the VLSI systems team System level : Real-time debugging, Fixed point quantization, MIPS analysis and optimization ideas both on ARM and CEVA Associate Software Engineer, EmSyS, Larsen and Toubro Ltd., Mysore, INDIA Implemented various filtering algorithms for signal tracking and image enhancement using DSP TMS320C6414 for Ultrasound medical device Graduate Intern, Indian Institute of Science, Bangalore, INDIA Simulated an IEEE 802.11a OFDM based communication system using MATLAB and analyzed its performance at different transmission rates Sept 2011 - Mar 2012

July 2004 -July 2005

February May 2004

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Uttam Bhat
Engineering Intern, ISRO-ISTRAC, Bangalore, INDIA Analyzed the modes of operations carried out at the ground station during the telemetry, tracking and command operations for various satellite missions carried out by ISRO. June 2003

RESEARCH/ACADEMIC EXPERIENCE _________________________________________________________ Simulated channel codes such as turbo codes, with different decoding strategies for multi-rate superposition schemes over wireless broadcast channels for cellular and satellite applications Implemented various signal processing algorithms such as real time image enhancement techniques, music equalizer using equiripple FIR filter and real time spectrum analyzer using TMS320VC5510 and DSP56858EVM kit Analyzed the performance of space-time block codes such as Alamouti scheme, and space-time trellis codes using Viterbi algorithm for modulation schemes such as BPSK, QPSK and 8-PSK for MIMO communications using MATLAB Implemented various detection schemes for layered space-time codes such as zero-forcing (ZF) and minimum mean squared error (MMSE) detection criterions for MIMO communications Developed decoding strategies for low-density parity-check (LDPC) codes over wireless interference channels Developed decoding strategies using equalization for physical-layer network coding schemes over two-way wireless relay channels with inter symbol interference (ISI) or frequency-selective fading

COMPUTER SKILLS ____________________________________________________________________________ Simulation Tools: MATLAB, CODE COMPOSER STUDIO 2.2, LabVIEW, PSPICE, CADENCE, SmartNcode Computer Languages: C, C++ DSP Processors: TMS320C6414, TMS320VC5510, Motorola DSP56858, CEVA X1641, CEVA XC323

KEY ACADEMIC COURSES______________________________________________________________________ Digital Communication, Wireless Communication, Information Theory, Error Control Coding, Detection and Estimation, MIMO communication, Real-time DSP, Random Signal Theory, Convex Optimization OTHER ACTIVITIES/ACHIEVEMENTS__________________________________________________________ Author/Co-author of IEEE journal and conference papers Awarded as exemplary reviewer for IEEE Communication letters Peer reviewer for various IEEE journal and conference papers Involved in submission of proposals for research grant Volunteered as technical consultant for UCP-SARnet (ASU community project supervised by Dr. Marek Wosinski)

REFERENCES_________________________________________________________________________________ Available upon request

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