Case3:10-cv-05449-RS Document92-1 Filed06/01/12 Page1 of 8

Appendix A

Case3:10-cv-05449-RS Document92-1 Filed06/01/12 Page2 of 8

APPENDIX A
No. Claim Term, Claims1 Phrase, or Clause 1. address information 281: 45, 46 Rambuss Preliminary Proposed Construction one or more bits that indicate a storage location Defendants Preliminary Proposed Construction Ordinary, plain meaning; no construction required. Alternatively: information used to specify any part of a storage location Ordinary, plain meaning; no construction required.

2. array of memory cells 3. binary code

916: 15 a plurality of memory cells that are 281: 36, 38-40, arranged in rows and columns 42 916: 25 one or more bits representing a value Ordinary, plain meaning; no 020: 13 construction required.

4. block size value

997:1, 19, 31

value that specifies the total amount of data that is to be transferred on the bus in response to a read request, write request, or operation code

Alternatively: one or more bits representing information information that specifies the total amount of data that is to be transferred on the bus in response to a read request, write request, or operation code

This column lists the claims in the set of 35 claims of the Farmwald/Horowitz patents currently being litigated that contains the term in question, with the patents identified by the last three digits of the patent number. Claim numbers in bold indicate claims that are not in the set of 35 claims, but from which one or more of the 35 claims depend.

-117600507.1

Case3:10-cv-05449-RS Document92-1 Filed06/01/12 Page3 of 8

No.

Claim Term, Phrase, or Clause 5. clock cycle

Claims1 097:6 937: 5, 23, 24 281:43 020: 14, 49 037: 25, 33 997: 22

Rambuss Preliminary Proposed Construction an amount of time equal to one clock period

Defendants Preliminary Proposed Construction Ordinary, plain meaning; no construction required.

6. clock signal

7. controller/controller 937: 18, 23, device 24, 29 916: 15 020: 1, 2, 13, 14 997: 1, 3, 19, 313 8. external clock 918: 1 signal 195: 23 097: 1, 6 937: 1, 5, 18, 23, 24, 29 916: 15 281: 43, 45 020: 14, 49

a periodic signal, i.e. one that is continuously present and repeats at regular intervals, to provide timing information an integrated circuit device that includes circuitry to direct the actions of one or more memory devices

a periodic signal that is continuously present and repeats at regular intervals to provide timing information a device that controls one or more devices

a periodic signal, i.e. one that is continuously present and repeats at regular intervals, from a source external to the device to provide timing information

a periodic signal that is continuously present and repeats at regular intervals to provide timing information from a source external to the device

2 3

See also external clock signal. See also integrated circuit controller device.

-217600507.1

Case3:10-cv-05449-RS Document92-1 Filed06/01/12 Page4 of 8

No.

Claim Term, Phrase, or Clause 9. in response to

Claims1 918: 1 195: 23, 24 097: 1, 5 937: 1, 4, 5, 18, 23, 24 916: 15, 20 281: 36, 42, 43 037: 25 020: 2, 38 997: 1, 19 020: 38, 49

Rambuss Preliminary Proposed Construction as a result of

Defendants Preliminary Proposed Construction Ordinary, plain meaning; no construction required.

10. integrated circuit controller device

11. memory device

997: 1, 194

an integrated circuit device that includes circuitry to direct the actions of one or more memory devices an integrated circuit device in which information can be stored and retrieved electronically, not including a memory controller

a device constructed of one or more integrated circuits that controls the actions of one or more devices a device in which data can be stored and retrieved electronically

See also synchronous dynamic random access memory device and synchronous memory device.

-317600507.1

Case3:10-cv-05449-RS Document92-1 Filed06/01/12 Page5 of 8

No.

Claim Term, Phrase, or Clause 12. operation code

Claims1

13. precharged automatically 14. precharge information

937: 1, 4, 5, 18, 23, 24, 29 916: 15, 19, 20, 23 281: 36, 38-40, 42, 43, 46 037: 25, 27, 28 020: 2, 38 997: 1, 2, 3, 19, 31 281: 36, 40 precharged without an additional command 037: 27 one or more bits indicating whether 997: 1, 19 the sense amplifiers and/or bit lines (or a portion of the sense amplifiers and/or bit lines) should be precharged

Rambuss Preliminary Proposed Construction one or more bits to specify a type of action

Defendants Preliminary Proposed Construction one or more control bits to specify a type of action

precharged without additional instruction Ordinary, plain meaning; no construction required. Alternatively, information denoting whether the sense amplifiers and/or bit lines (or a portion of the sense amplifiers and/or bit lines) should be precharged Ordinary, plain meaning; no construction required. Alternatively, a register whose contents can be programmed

15. programmable register

916:19

a register whose contents can be modified based on information received from an external source

-417600507.1

Case3:10-cv-05449-RS Document92-1 Filed06/01/12 Page6 of 8

No.

Claim Term, Phrase, or Clause 16. read operation

Claims1 916:15 020: 2, 38 997: 1, 19 918:8 195: 23, 24, 32 937: 4 281:43 997: 1, 195 918: 8 195: 23 097: 6 937: 5, 24 916: 15 281: 43 037: 28 097: 1 937: 1, 18, 23 037: 25 020: 14, 49 997: 1, 19

Rambuss Preliminary Proposed Construction reading data from the memory array as specified in the operation code a data storage element or group of data storage elements not part of a memory array that can store one or more bits of information indicates

Defendants Preliminary Proposed Construction Ordinary, plain meaning; no construction required a storage element that can store information

17. register

18. representative of

Ordinary, plain meaning; no construction required.

19. sample(s)/sampled/ sampling

obtain(s) at one or more discrete points in time/obtained at one or more discrete points in time/obtaining at one or more discrete points in time

capture(s) / captured / capturing

See also programmable register.

-517600507.1

Case3:10-cv-05449-RS Document92-1 Filed06/01/12 Page7 of 8

No.

Claim Term, Phrase, or Clause 20. synchronous dynamic random access memory device

Claims1 020: 1, 2, 38, 49

21. synchronous memory device

22. synchronously with respect to

918: 1, 8 195: 23, 24 097: 1, 5, 6 937: 1, 4, 5, 18, 23, 24 916: 15, 19, 20, 23 281: 36, 38, 39, 40, 42, 43, 45, 46 037: 25, 27, 28, 33 918: 1 195: 23 097: 1 937: 1, 18, 29 281: 45 037: 25, 33 997: 2

Rambuss Preliminary Proposed Construction an integrated circuit device in which information can be stored and retrieved electronically, not including a memory controller, that receives an external clock signal which governs the timing of the response to a read request, write request, or operation code and includes one or more arrays of DRAM cells an integrated circuit device in which information can be stored and retrieved electronically, not including a memory controller, that receives an external clock signal which governs the timing of the response to a read request, write request, or operation code

Defendants Preliminary Proposed Construction a dynamic random access memory device in which an external clock signal is used to regulate the timing of device operations

a memory device in which an external clock signal is used to regulate the timing of device operations

having a known timing relationship with respect to

operating in step (or in phase) with respect to

-617600507.1

Case3:10-cv-05449-RS Document92-1 Filed06/01/12 Page8 of 8

No.

Claim Term, Phrase, or Clause 23. write operation

Claims1 037: 25, 27

Rambuss Preliminary Proposed Construction writing data to the memory array as specified in the operation code

Defendants Preliminary Proposed Construction Ordinary, plain meaning; no construction required

-717600507.1