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COURSE PLAN
SUBJECT CODE SUBJECTNAME ACADEMIC YEAR SEMESTER CLASS FACULTY : : : : : : CA5104 Computer Organization and Architecture AUGUST 2011 to NOVEMBER 2011 I I MCA P. Arockiaraj Andrew
1.
T1 Carl Hamacher, Zvonko Vranesic and Safwat Zaky, Computer Organization, Fifth Edition, Tata McGraw Hill, 2002. 2. R2 David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware / Software interface, Fourth Edition, Morgan Kaufman, 2004. 3. R3 William Stallings, Computer Organization and Architecture Designing for Performance, Seventh Edition, Pearson Education, 2006. 4. R4 John P. Hayes, Computer Architecture and Organization, Third Edition, Tata McGraw Hill, 1998. 5. R5 V.P. Heuring, H.F. Jordan, Computer System Design and Architecture, Second Edition, Addison Wesley,2004.
UNIT I
S.No 1 2 3 4 5
PARTICULARS Functional units Basic operational concepts Bus structures Performance and Metrics Instruction and instruction sequencing- Hardware Software Interface Addressing modes Instruction Set RISC CISC ALU design Fixed point and floating point operation
OBJECTIVE
TEXT BOOKS T1 T1
HOURS/ PERIODS 1 2 2 2 2
CUMM. HOURS 1 3 5 7 11
T1 T1 T1
S.No 1 2 3 4 5 6
PARTICULARS Fundamental Concepts Execution of a complete instruction Hard wired control Micro programmed control Nano Programming Multi cycle Implementation UNIT II
OBJECTIVE
HOURS/ PERIODS 1 1 2 2 2 2
CUMM. HOURS 10 11 13 15 17 19
UNIT III
PIPELINING
S.No 1 2 3 4 5 6
PARTICULARS Basic concepts Data hazards Instruction Hazards Influence on Instruction Sets Data Path and control consideration Super scalar Operation Performance Consideration Exception Handling
OBJECTIVE
HOURS/ PERIODS 2 2 2 2 2 2
CUMM. HOURS 21 23 25 27 29 31
PIPELINING
UNIT IV
MEMORY SYSTEM
S.No 1 2 3 4 5 6 7 8
PARTICULARS Basic concepts Semiconductor RAM ROM Speed Size and cost Cache memories Performance consideration Virtual memory Memory Management requirements Secondary Storage.
OBJECTIVE
HOURS/ PERIODS 1 2 2 2 1 1 1 1
CUMM. HOURS 32 34 36 38 39 40 41 42
MEMORY SYSTEM
UNIT V
I/O ORGANIZATION
S.No 1 2
OBJECTIVE
I/O ORGANIZATION
HOURS/ PERIODS 2 1
CUMM. HOURS 44 45
3 4 5
Direct Memory Access Buses Interface circuits Standard I/O Interfaces (PCI, SCSI, USB) ASSIGNMENT PLAN
2 2 2
47 49 51
ASSIGNMENT TOPIC
TEST PLAN S.No 1 2 3 PARTICULARS I Cycle Test II Cycle Test Model Exam
Staff In-Charge
HOD
DEAN