Part A 1) CMOS devices consumes less power than bipolar counterpart and running at faster speed.

2)

3) Substrate Bias Effect. The body effect describes the changes in the threshold voltage by the change in the source-bulk voltage. Part 2 1) a. When there is no gate voltage, the transistor is off. b. When a positive voltage is applied on the gate, an electric field causes the holes to be repelled from the interface, creating a depletion region containing immobile negatively charged acceptor ions. This means that the transistor is turned on. c.The MOSFET operates like a resistor. This means that the transistor is in linear regions. d. The switch is turned on, and a channel has been created, which allows current to flow between the drain and source. Since the drain voltage is higher than the gate voltage, the electrons spread out, and conduction is not through a narrow channel but through a broader current distribution extending away from the interface and deeper in the substrate. The transistor is in saturation regions. Part 3 1)

Cut-Off Region In this region the gate voltage is less than the pinch-off voltage Vp and therefore very little current flows. Linear Region In this mode the device is operating below pinch-off and is effectively a variable resistor. R OUT is ~ linear but only over a small range of VDS. Saturation Region The drain voltage has to be greater than the gate voltage less the pinch-off voltage this sets the minimum supply voltage. The curves in the saturation region can be extrapolated to a point 1/, where is known as the Channel length modulation parameter. 2)Unified MOS Current Source Model ID = kW/L[(VGS - VT)Vmin - Vmin2/2](1+VDS) with, Vmin = (VGS-VT, VDS, VDSAT) if Vmin = VGS - VT , transistor is in saturation region if Vmin = VDS , transistor is linear if Vmin = VDSAT , transistor is in velocity saturation Note : For PMOS, the min function should be changed to max function. Part 4 1) a. Deposit thin layer of SiO2 on entire wafer by exposing it to a high purity of oxygen and hydrogen at 1000oC. b. c. Besides SiO2, other materials to be deposited include polysilicon, aluminium, copper. d. Is used to remove selected portions of the material deposited on the entire wafer. e. The process of adding impurity atoms to the semiconductor. f. Used to determine the worst-case hot-carrier stress conditions in the device. g. Dopants are introduced as ions into the materials by a sweeping a beam of purified ions over the surface. h. Heats the wafer and allow it to cool slowly, in order to remove internal stresses and toughen it. 2) a. Electrons b. Electrons c. Electrons d. Holes e. Holes

Part 5 1) The power consumption is lower as the scaling is done. The gate capacitances strongly changes upon scaling. Charging time changes according to (a 2t). As a consequence, scaled integrated circuits can operate at higher frequencies. Leakage current also increases. 2) The short-channel effects are attributed to two physical phenomena: a. the limitation imposed on electron drift characteristics in the channel, b. the modification of the threshold voltage due to the shortening channel length. In particular five different short-channel effects can be distinguished: i) drain-induced barrier lowering and punchthrough ii) surface scattering iii) velocity saturation iv) impact ionization v) hot electrons Part 6 1)More energy-efficient . 2) a. TTL inverter - Refers to the technology for designing and fabricating digital integrated circuits that employ logic gates consisting primarily of bipolar transistors. It overcomes the main problem associated with DTL, i.e., lack of speed.

b. CMOS inverter - Contains a PMOS and NMOS connected at the drain and gate terminal. When Vin is Low, the NMOS is OFF while the PMOS stays ON, instantly charging Vout to logic high. When Vin is high, NMOS is ON while PMOS is ON, draining the voltage at Vout to logic Low.

References http://www.odyseus.nildram.co.uk/RFIC_Theory_Files/MOS_Transistor.pdf http://en.wikipedia.org/wiki/Threshold_voltage http://en.wikipedia.org/wiki/MOSFET#CMOS_circuits http://www.ittc.ku.edu/~jstiles/312/handouts/The%20Body%20Effect.pdf http://www.ptable.com/ http://www.ecse.rpi.edu/~schubert/Course-ECSE-6290%20SDM-2/1%20MOSFET-5%20Scaling.pdf http://courseware.ee.calpoly.edu/~dbraun/courses/ee307/F02/02_Sales/section02_bruce_sales.html