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Fred Kuhns
(fredk@arl.wustl.edu, http://www.arl.wustl.edu/~fredk)
Washington
WASHINGTON UNIVERSITY IN ST LOUIS
Recall the Von Neumann Architecture
Arithmetic-Logical Unit
(ALU) Control Unit
Device Controller
Primary Memory Device Controller
Device
Device Controller
Device
Device Controller
Device
Device
Executable
Cache Memory
<10MB
Memory 1-2 Clock cycles
Secondary
Optical Memory < 15GB (per device)
Storage 25 usec – 1 sec
3 2
Address
Fred Kuhns (01/17/09) Cs422 – Operating Systems Organization 7
Cache Design
• Write policy
– hit: write-through versus write-back
– miss: write-allocate versus no-write-allocate
• Replacement algorithm
– determines which block to replace (LRU)
• Block size
– data unit exchanged between cache and main
memory
Initialized Data
Unitialized Data
Process
Address space Heap (Dynamic)
stack (dynamic)
proc struct
8M 2M
process 1 4M
process 1
6M
8M
Unused
8M
8M
8M
8M
12 M
New
Processes
New
Processes
Process 2 224 K
896 K
576 K
352 K
64 K 64 K 64 K
Operating Operating
System System
320 K Process 2 224 k
96 K
Process 4 128 K Process 4 128 K
96 K 96 K
64 K 64 K
8K 8K
6K 6K
Allocated block
14K Free block 14K
Next Fit
36K
20K
Before After
Fred Kuhns (01/17/09) Cs422 – Operating Systems Organization 25
Addresses
• Logical Address
– reference to a memory location independent of
the current assignment of data to memory
– translation from logical physical address
• Relative Address (type of logical address)
– address expressed as a location relative to
some known point
• Physical Address
– the absolute address or actual location
Process Control
Base Register Block
Adder Program
Absolute
Bounds Register Comparator address
Data
Interrupt to
operating system
Stack
Process image in
main memory