DR.

Yusnita Rahayu Universiti Malaysia Pahang

CONSIST OF HARDWARE AND SOFWARE

INSIDE THE COMPUTER CONSIST FOR MAIN MODULE

REGISTER: A Set of memory that stores temporary data during CPU operation. ARITHMETIC LOGIC UNIT (ALU) : A place where the CPU operation is perfomed. Such as addition, subtraction and etc. (8bit,16bit, 32bit, etc) CONTROL UNIT : Control the flow of information in CPU, memory and I/O device.

SEMI CONDUCTOR

Random Access Memory(RAM): voletile, read and write. Read Only Memory(ROM) : Nonvoletile,can only be read.
Disk,Tape. CD-ROM

MAGNETIC MEMORY

OPTICAL

Communicate the CPU with the real world(I/O device) Mouse, keyboard,monitor, tape, printer disk drive and etc.

It heart of the system in large system. It required external device to perform their task. Usually perform various task with different types of programs. Many type of microprocesser such as Intels Pentium or Motorolla 68K family.

Consist of the CPU,ROM , RAM, I/O Port and timer embedded together in a single chip. Take less space and cost.

MICROCONTROLLER

MICROPROCESSER

High integration with small space for PCB

Cheaper Special architecture and features

High performance
Flexible and can easily upgraded Large size of memory

Low power consumption

More reliable due to less connection Simplicity Less connection (internal design)

Unlimited number of I/O

MACHINE LANGUAGE : A sequence of binary digit.

The only language understand by the computer Differ for each processor Hard to understand for human being Complex programing and need to understand system configuration

@ ASSEMBLY LANGUAGE * Much easier to write a program * effient compare to high level language (machine code operation) * An assembler required to translate the language to object code

HIGH LEVEL LANGUAGE

Most widely use in writing program Solve all problem without much attention to CPU and configuration Easy to write a program even involves floating calculation Difficult to control the hardware Compiler is required to convert to machine code Example language: C++, pascal, basic. Example: while (1) { for (i=0; i<=5; i++) { printf HELLO} }

Machine language
101011101110111100000111111000001101

Assembly language
CLRA LDAB #$26 ROLB

High level language

while (1) {

for (i=0; i=9; i++) { printf hello} }

Cost I/O Power Data Processing Memory Software

Is a family of 8 bit microcontroller There are software compatible but differ in some of their hardware feature such as the size of ROM and RAM Have a variety version to allow the end user to choose the best microcontroller for the application

SITI HATIJAH KAMALUDIN ZALIKHA JAAFAR

Based on M6900 family Internal register similar to M6802 with additional of register index Y and accumulator D. Used in barcode readers, hotel card key writers, amateur robotics and etc.

Series version A D E F C L P K M&N

Descriptions Original version i.e 68HC11A1 Low cost version with limited I/O, no ADC and internal EEPROM New version of A series with various size of memories i.e 68HC11E1 High speed expended system i.e 68HC11E1 Memory expended up to 256kbytes with 2 PWM and 4 ADC E version type with more ROM and I/O lines Low power with PLL and 3 SCI Large memory size K version for larger memory size and with 16-bit co-processor

Bootstrap Special test Single-chip Expendedmultiplexed

To place a program into RAM or internal EEPROM To test the chip in factory

Using internal memories and I/O lines

To expand memory & I/O lines using the port B and port C as an address & data buses

Mode of Operation

MODA
0 0 1

MODB
0 1 0 Special Bootstrap Single Chip Special Test

1
Port

1
Port A

Expended Multiplexed
Functions i/o port, Input Capture, Output Compare

Port B
Port C

Output port, Upper address Bus

Input port, Output port, Data Bus(DO-D7), Address Bus(A0A7) I/O port, Serial Peripheral Interface (SPI), Serial Communication Interface (SCI) Input Port, Analog-to- Digital Converter

Port D

Port E

ACCA&ACCB [Accumulators 8-bit]

Temporary data storage

ACCD [Accumulator 16-bit]

Combination of ACCA& ACCB

IX& IY [Index Register]

SP [Stack Pointer]
Address of stack

PC [Program Counter]
Content of the next address of instruction

CCR [Control Code Register]

Information of result due to execution of instruction

IR [Instruction Register]
Hold instruction & operand address.(invisible)

Flag Carry(C) Overflow (V) Zero (Z) Negative (N) Interrupt (I) Half-Carry (H) XIRQ Interrupt Mask (X) Stop Disable (S)

Operation Set when produces carry or borrow For sign magnitude operation. Set when result produces zero Set if result produces negative value Disable of incoming maskable interrupt Set if carry from bit 3 to bit 4 Disable incoming XIRQ interrupt For Stop instruction

5.Relativ e

1. Inherent

2. Immediat e

ADDRESSING MODE 3. Direct 4.Indexe d

4.Extende d

The fastest and the shortest mode of an operations as no additional information is required. Normally the process of instruction takes place in the CPU. Its a byte operation EXPECT the instruction involves index register IY and ACCD.

Assembly Language

Machine Languange

CLRA NOP INCB DEX DEY

; ; ; ; ;

clear accumulator A no operation increment accumulator B decrement IX decrement IY

4F 01 5C 09 18 09

The simple addressing mode that place data in the internal register of CPU. Normally the operation may require 2,3 or 4 bytes depending on the size of data and the register. The operand begins with special character # to indicate the mode.

Assembly Language

Machine Languange

LDAA

#$20

; ; ; ;

Load ACCA with $20 Load ACCB with $FF Load IX with $1000 Load IY with 100

86 20 C6 FF CE 10 00 18 CE 00 64

LDAB #-1 LDX #$1000 LDY # 100

One of method to access data in memory. The address is only 8-bit in size, thus can only be used to access the location range of $0000$00FF. Normally used to access the internal RAM location. Address of data is a part of the instruction.

Assembly Language

Machine Languange

LDAA $20 LDAB $FF

; Fill ACCA from $20 ; Store ACCA to $FF

96 20 97 FF

Same like direct mode used to access data in memory. The size of the address is extended to 16-bit (the whole location in HC11) Address of data in the part of instruction. Normally it is a three bytes operations unless IY is used.

Assembly Language

Machine Languange

LDAA $2000 STAA $103F

; Fill ACCA from $2000 ; Store ACCA to $10FF

B6 20 00 B7 10 3F

Plays a vital role in accessing an array of data in memory. It involves the use of register IX or IY. If IX used, it is two-byte operation with the 2nd byte represents the offset. Thus the offset range from $00(0) to $FF(255). The actual address is the total sum of index register and offsett.

Assembly Language

Machine Languange

LDAA 20 , X
STAA 0,X

;
;

Fill ACCA from IX+$14

Store ACCA to address IX

A6 14
A7 00

It is a two-byte operation with the 2nd bytes is signed relative addressing. There are some special instruction such as BRN requires only 1 byte. The relative addressing(RA) ranges from -128 ($80) to +127($7F). Normally used to obtain new PC by adding RA with current PC.

Assembly Language

BRA $1000 BSR DELAY

; Branch to $1000 ; Branch to DELAY

FETCH PHASE

EXECUTION PHASE

PC is pointed the address of instruction Then, it fetches the instruction from memory and place in IR. Finally, the control unit translates the instruction as it updates in the PC.

The CPU calculates the operand address Then, it fetches the operand It is followed by the execution of the operation Then, it stores the result Finally, it returns to fetch phase

Each instructions has different instructions cycle.

The instruction cycle depends on : Instruction Set
Addressing Modes

The clock cycle can be as low as 2 cc or as high as 41 cc depends on crystal used.

Instruction

Addressing Mode Inherent

Extended Immediate Extended Inherent Inherent Direct Relative Extend Relative

Clock Cycle Time Execution (uF)

Byte Requirement 1
3 2 3 1 1 3 2 3 2

CLRA
CLR $100 LDAA #10 LDAA $3000 MUL IDIV BSET $50 $40 BRA LABEL JMP START BSR LOOP

2
6 2 4 10 41 6 3 3 6

1
3 1 2 5 20.5 3 1.5 1.5 3

ADDA 34 , Y

Index

2.5

MUHAMMAD ZAUDIN YUSOFF AZIERUL AZRY RAMLY

Format of Assembly Language & Machine Code

Design of HC11 based on M6800 family. Internal Architecture based on Von Neumann. Internal register very similar to M6802 with additional of register index Y and accumulator D. Instruction sets derived from M6800 family with more than 80 new instruction sets due to IY & ACCD.

Definition :

Is a low level programming language using the human readable instructions of the CPU.

Example

eax, ebx etc are each a 32 bit register inside the CPU. Mov instructions just copy the value so the first line is similar as this C code.

To compile this into machine code we need an assembler (compiler for assembly language).

Label

Defined by the user to identify memory locations in the program or data areas of the assembly module.
Contains the mnemonic names for machine instructions or assembler directive. Contains additional information for operation field such as address or data. Optional and is added for documentation. Ignore by the assembler.

Operation

Operand

Comment

Assembly language requires a high level of technical knowledge. Slow to write Ten lines of assembly language was equal to ten instructions WHILE ten lines C++ equivalent of 500 instructions.

Definition

Also call machine language Is a computer language directly understandable by a computers CPU (central processing unit). Is the language which all programs must be converted before they can be run. Consist of 2 components
Opcode

Operand

Opcode

Type of operation, consists of 1 byte except the instruction requires pre-byte. Additional byte to inform additional information.

Operand

opcode

opcode
Operand 1

opcode
Operand 1 Operand 2

prebyte
Opcode Operand 1 Operand 2

prebyte
Opcode Operand 1 Operand 2 Operand 3

Example

29 decimal = hexa1D / $1D

A segment of program machine code contain the following opcode and addressing information.

Extremely difficult for humans to read, consists of bits (i.e., zeros & ones).

Method to access data by CPU. The modes determine the number of byte required in instruction. There are 6 modes: Immediate Direct Extend Inherent Indexed Relative

Effective address simply the location immediately after the opcode ( operation code ) Begin with character # Example: base prefix example LDDA #15 binary % %100100 @ @45 LDAB #@145 octal
decimal ASCII 5577 $10 swap hexadecimal $

Operand is part of instruction Operand = address field e.g. ADD 5

Add 5 to contents of accumulator 5 is operand

No memory reference to fetch data Fast Limited range

Effective is computed using 1byte immediate after the opcode. Address field contains address of operand Effective address (EA) = address field (A) e.g. ADD A
Add contents of cell A to accumulator Look in memory at address A for operand

Single memory reference to access data No additional calculations to work out effective address Limited address space

Instruction Opcode Address A Memory

Operand

Effective address is specific on 2 bytes immediately after the opcode. Operand is an address 2bytes ($0000 to #FFFF) E.g:

LDDA $1234 STAA $0044

All data in the instruction are within the CPU. Doesnt need operand information need to execute the instruction is encoded in the opcode. E.g:
DEX CLRA ABA

The effective address is computed as sum of the index and the offset. indexed register (X, Y) is used in calculation the address. Effective address=content X/Y + 8bit unsigned offset Example:

ADDA 10,X SUBA 0,X

Used for branch instruction. The branch offset id 8bits, thus permits branching forward and backward with decimal range -128 to +127.

Any processor/controller execute instruction continuously.

FETCH PHASE

EXECUTION PHASE

PC is pointed the address of instruction Then, it fetches the instruction from memory and place in IR Finally, the control unit translates the instruction as it updates the PC

The CPU calculates the operand address Then, it fetches the operand It is followed by execution of the operation Then, it stores the results Finally, it return to fetch phase.

Name two ports that can be used either as an input or output. Name HC11 ports that can be used as timer. Identify the location reserved for Internal RAM and EEprom of HC11E1 List two port that are lost when HC11 is operating in expended mode. Write a program to initialize the following port.

Port C as an input. Port D as an output port.