Microcontrollers

Application

HyperTerminal based Home Automation

COMPUTER

MICROCONTROLLER

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Introduction to microcontrollers Microcontrollers CPU + I/O + Timer(s) [+ ROM] [+ RAM] Low to moderate performance only Limited RAM space, ROM space and I/O pins EPROM version available Low chip-count to implement a small system Low-cost at large quantities Development tools readily available at reasonable cost

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Summary of features of the standard 8051

1. 4K bytes internal ROM (program) 2. 128 bytes internal RAM (data) 3. Four 8-bit I/O ports 4. Two 16-bit timers

5. Serial interface
6. 64K external code memory space 7. 64K external data memory space 8. 210 bit-addressable locations
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Different Microcontrollers

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VON NEUMANN ARCHITECTURE AND HARVARD ARCHITECTURE

A microprocessor

that fetches instruction and data using a single bus is called Von Neumann or Princeton architecture. In Von Neumann architecture, data memory (RAM) and Program memory (ROM) are connected by using single address and data bus. In Harvard architecture, program memory and data memory are connected using separate address and data bus to achieve fast execution speed for a given clock rate.
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VON NEUMANN ARCHITECTURE

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HARVARD ARCHITECTURE

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RISC AND CISC MACHINES

The microcontrollers with small instruction set are called Reduced Instruction Set Computer (RISC) machines and those with complex instruction set are called Complex Instruction Set Computer (CISC) machines. Intel 8051 microcontroller is an example of CISC machine and Microchip PIC16F87X is an example of RISC machine.

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COMPARISON OF RISC AND CISC

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Block Diagram of Microcontroller 8051

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8051 Port bit latches

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Port 0 and Port 1

Port 2 and Port 3

Pin diagram of 8051

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Bit Addressable RAM

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External program Memory Interfacing

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Memory Space

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Register Banks

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8051 ADDRESSING MODES AND INSTRUCTION SET

INSTRUCTION SYNTAX
Label :The label is the symbolic address for the instruction. As the program is assembled, the label will be given the value of the address in which the instruction is stored. This facilitates referencing of the instruction at any point in the given program. Of course, not all instructions will have labels. It is not necessary to define a symbol for the address of an instruction, unless that address is needed by a branch statement elsewhere in the program. A label can be any combination of upto8 letters (AZ), numbers (09) and period (.).

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INSTRUCTION SYNTAX
Opcode: The opcode field contains a symbolic representation of the operation. The operation tells the assembler what action the statement has to perform. The 8051 assembler converts the opcode into a unique machine language (binary code) that can be acted on by the 8051 internal circuitry. Operand: The opcode specifies what action to perform, whereas the operand indicates where to perform the action. The operand field contains the address of the operand or the operand.
Comment: To improve program clarity, a programmer uses comments throughout the program. A comment always begins with a semicolon (;) and wherever we code it, the assembler assumes that all characters to its right are comments.

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8051 DATA TYPES

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Important Note

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ADDRESSING MODES
A microcontroller provides, for the convenience of the programmer, various methods for accessing data needed in the execution of an instruction.
The various methods of accessing data are called addressing modes. The 8051 addressing modes can be classified into the following categories 1.Immediate addressing 2.Register addressing 3.Direct addressing 4.Indirect addressing 5.Indexed addressing 6.Absolute addressing 7.Long addressing 8. Relative addressing 9.Bit inherent addressing 10.Bit direct addressing

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IMMEDIATE ADDRESSING
Immediate addressing means that the data is provided as part of the instruction (which immediately follows the instruction opcode).

Syntax : MOV Rn, #DATA Examples : MOV A, # 20H MOV R2, # 60H MOV DPTR ,# 3200H
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REGISTER ADDRESSING
Register addressing mode involves the use of registers to hold the data to be manipulated. The lowest 32 bytes of the 8051 internal RAM are organized as four banks of eight registers. Only one bank is active at a time. Using names, R0 to R7 can access any active register. One of the eight general registers (R0 to R7) can be specified as the instruction operand. The assembly language documentation refers to a register generically as Rn.

Syntax : MOV Rn,A and MOV A,Rn Example : MOV A,R2 MOV R3,A

MOV R1,R2

Invalid Instruction

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DIRECT ADDRESSING
Direct addressing mode is provided to allow us access to internal data memory, including Special Function Register (SFR). In direct addressing, an 8 bit internal data memory address is specified as part of the instruction and hence, it can specify the address only in the range of 00H to FFH. In this addressing mode, data is obtained directly from the memory.

Syntax : MOV A, addr Exaples : MOV A,30H MOV R1,75H MOV 52H,#22H
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INDIRECT ADDRESSING
Indirect addressing provides a powerful addressing capability, which needs to be appreciated. The indirect addressing mode uses a register to hold the actual address that will be used in data movement. Registers R0, R1, and DPTR are the only registers that can be used as data pointers. Indirect addressing cannot be used to refer to SFR registers. Both R0 and R1 can hold 8 bit address and DPTR can hold 16 bit address

Syntax : MOV Rn,# data MOV @Rn, A MOV A, @Rn MOV @Rn, addr

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INDEXED ADDRESSING
In indexed addressing, a separate registereither the program counter (PC), or the data pointer (DTPR) is used to hold the base address, and the A is used to hold the offset address. Adding the value of the base address to the value of the offset address forms the effective address. Indexed addressing is used with JMP or MOVC instructions. Look up tables are easily implemented with the help of index addressing.

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RELATIVE ADDRESSING
Relative addressing is used only with conditional jump instructions. The relative address, often referred to as an offset, is an 8 bit signed number, which is automatically added to the PC to make the address of the next instruction. The 8 bit signed offset value gives an address range of +127 to 128 locations. The jump destination is usually specified using a label and the assembler calculates the jump offset accordingly.

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ABSOLUTE ADDRESSING
Absolute addressing is used only by the AJMP (Absolute Jump) and ACALL (Absolute Call) instructions. These are 2 bytes instructions. The absolute addressing mode specifies the lowest 11 bit of the memory address as part of the instruction. The upper 5 bit of the destination address are the upper 5 bit of the current program counter. Hence, absolute addressing allows branching only within the current 2 K byte page of the program memory.

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LONG ADDRESSING AND BIT INHERENT ADDRESSING

The long addressing mode within the 8051 is used with the instructions LJMP and LCALL. These are 3 byte instructions. The address specifies a full 16 bit destination address so that a jump or a call can be made to a location within a 64 K byte code memory space. Bit Inherent: In this addressing, the address of the flag which contains the operand, is implied in the opcode of the instruction

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BIT DIRECT ADDRESSING

The RAM space 20H to 2FH and most of the special function registers are bit addressable. Bit address values are between 00H to 7FH.

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ASSEMBLER DIRECTIVES
The following are the widely used 8051 assembler directives.
ORG (origin) EQU DB (define byte) END

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Stack Pointer
Stack pointer (SP) is an 8-bit register at address 81H It contains the address of the data item currently on top of the stack. Stack operations include pushing data on the stack and popping data off the stack Pushing increments SP before writing the data Popping from the stack reads the data and decrements the SP 8051 stack is kept in the internal RAM Depending on the initial value of the SP, stack can have different sizes Example: MOV SP,#5FH On 8051 this would limit the stack to 32 bytes since the uppermost address of on chip RAM is 7FH.

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Stack and Data Pointers

The default value of SP (after system reset) is 07H. This result in the first stack write operation to store data in location 08H which means that register bank 1 (and possible 2 and 3) are not available

User may initialize the SP to avoid this

Data pointer (DPTR): is used to access external data or code DPTR is a 16 bit register at addresses 82H (low byte) and 83H (high byte) Example: the following instructions write 55H into external RAM location 1000H: MOV A,#55H MOV DPTR,#1000H MOVX @DPTR,A
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Look-Up Tables
MOVC loads the accumulator with a byte from code (program) memory The address of the byte fetched is the sum of the original unsigned 8-bit accumulator contents and the content of a 16-bit register (either the data pointer or PC). In the latter case, the PC is incremented to the address of the following instruction before being added to the accumulator MOVC A , @A+DPTR MOVC A , @A+PC

This instruction is useful in reading data from LUTs.

DPTR or PC is initialized to the beginning of the LUT and the index number of the desired entry is loaded into the accumulator.

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Boolean Instructions
8051 contains a complete Boolean processor for single-bit operations.
All bit accesses use direct addressing Bits may be set or cleared in a single instruction Example: SETB P1.7 CLR P1.7 Carry bit in PSW is used as a single-bit accumulator for Boolean operations. Bit instructions that refer to carry bit as C are assembled as carry specific Instructions Carry also has a mnemonic representation (CY) which can be used in connection with non-carry-specific instructions. Example: CLR C CLR CY Both do the same. First one is 1 byte and the second one is 2-bytes
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Bit manipulation Instructions

AND Instruction 1. ANL C, bit 2. ANL C,/bit OR Instruction 1. OR C, bit 2. OR C,/bit

CLR bit CLR bit CLR P1.2 CLR C

CPL bit CPL bit CPL P1.5 CPL C

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DA A Instruction
1.The DA A Instruction is a 1 byte instruction
2. This instruction is used only after ADD or ADDC instruction. 3. The DA instruction will add 6 to the lower byte ,if the lower nibble (4bits)is greater than 9 (or) if AC =1 4. If the upper nibble is greater than 9,(or) if cy =1 ,add 6 to the upper 4 bits

Ex1 .

47H +25H

Ex2.

29H +18H

Ex3

9AH +11H

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The jump and Call range

A jump or call instruction can replace the contents of the program with a new program address number that causes program execution to begin at the code located at the new address. The difference ,in bytes of this new address in the program where the jump or call is located is called the range of jump or call instructions. For example ,if a jump instruction located at the address 0100H, and jump causes the program counter to become 0120H , then the range of jump is 20 bytes.

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Conditional Jump
The 8051 offers a variety of conditional jump instructions JZ and JNZ tests the accumulator for a particular condition DJNZ (decrement and jump if not zero) is a useful instruction for building loops To execute a loop N times, load a register with N and terminate the loop with a DJNZ to the beginning of the loop

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 CJNE (compare and jump if not equal) is another conditional jump instruction CJNE: two bytes in the operand field are taken as unsigned integers. If the first one is less than the second one, the carry is set Example: It is desired to jump to BIG if the value of the accumulator is greater than or equal to 20H CJNE A,#20H,$+3 JNC BIG $ is an assembler symbol representing the address of the current Instruction Since CJNE is a 3-byte instruction, $+3 is the address of next instruction JNC

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Program to exchange the lower nibble of data present in external memory 6000H and 6001H ORG 0000H ;Set program counter 0000h
MOV DPTR , # 6000H MOVX A, @DPTR MOV R0, #45H MOV @R0, A INC DPL MOVX A, @DPTR ;copy address 6000h to DPTR ;copy contents to A ; load R0 = 45H : Copy contents of A in RAM : increment lower order address of DPTR :copy contents of 6001H into A

XCHD A, @R0
MOVX @DPTR, A DEC DPL MOV A, @R0 MOVX @DPTR, A END

:exchange the lower nibble of A and R0

;Store in contents of A in 6001H ; decrement lower order of DPTR ;copy contents of @R0 into A :Store in 6000H
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SUBROUTINES
SUBROUTINESGood program design is based on the concept of modularity,the partitioning of a large program into subroutines.
A subroutine is a sequence of instructions stored in the memory at a specified address for performing repeatedly needed tasks. Subroutines are usually handled by special instructions, CALL and RET. The CALL instruction is of the form CALL address. The address refers to the address of the subroutine. When CALL instruction is executed, the contents of the program counter are saved in the stack and the program counter is loaded with the address, which is a part of CALL instruction. The RET instruction is usually the last instruction in the subroutine. When this instruction is executed, the return address previously saved in the stack is retrieved and is loaded into the program counter. Thus, the control is transferred to the calling program.

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SUBROUTINE PROCESSING

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Time Delay Calculations Example : If 8051 microcontroller is operated with 12MHz oscillator, find the execution time for the following 4 instructions (a)ADD A, 45H MUL AB (b) SUBB A, #55H (c) MOV DPTR, #2000H (d)

Sol : Since the oscillator frequency is 12MHz ,the clock period is Clock period = 1/12 MHz = 0.0833E-6 sec Time for 1 Machine cycle = 0.0833e-6 x 12 = 1e-6 sec

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Instruction ADD A, 45H

Execution time in machine cycle 1 Machine cycles

Execution Time 1E-6 sec

SUBB A, #55H
MOV DPTR, #2000H MUL AB

2 Machine cycles
2 machine cycles 4 Machine cycles

2E-6 sec
2E-6 sec 4E-6 sec

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Example 2 :Calculate the delay provided by the given 8051 assembly language program with a crystal frequency of 11.0592MHz. Sol: MOV R0, # 80H HERE : DJNZ R0, HERE Total Machine cycles Machine cycle 2 2 x 80H 258

Total Time taken to execute these instructions is =12 X (1/crystal frequncy ) X Total machine cycles

= 12 X (1/11.0598 MHz) X 258

= 280 E-6 sec

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Example Project
Keyless Door lock The door is opened by a 4 digit password entered via a keypad 2 LEDs show the status of the lock A solenoid is used to open/close the door latch

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Keil C51 Cross Compiler

ANSI C Compiler Generates fast compact code for the 8051 and its derivatives

Advantages of C over Assembler Do not need to know the microcontroller instruction set Register allocation and addressing modes are handled by the compile Programming time is reduced Code may be ported easily to other microcontrollers C51 supports a number of C language extensions that have been added to support the 8051 microcontroller architecture e.g. Data types Memory types Pointers Interrupts

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Basic microcontroller in C Programming

C is a high level programming language that is portable across many hardware architectures. This means that architecture specific features such as register definitions, initialization and start up code must be made available to your program via the use of libraries and include files.

For the 8051 chip you need to include the file reg51.h #include <reg51.h>

These files contain all the definitions of the MC8051 registers.

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Basic C program structure

// Basic blank C program that does nothing //------------------------------------------------// Includes //------------------------------------------------#include <reg51.h> void main (void) { // variable declaration and initialization // code }

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//program to add 2 8-bit variables void main( ) { unsigned char data num1, num2, result; num1 = 10; num2 = 25; result = num1 + num2; }

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C51 Data Types

Data Type Bit unsigned char signed char unsigned int Bits 1 8 8 16 Range 0,1 0 to 255 -128 to +127 0 to 65535

signed int
unsigned long signed long Sbit

16
32 32 1

-32768 to +32767
0 to 4294967296 -2147483648 to + 2147483647 0,1

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C51 Memory Types Memory type extensions allow access to all 8051 memory types. A variable may be assigned to a specific memory space code Program memory. unsigned char code const1 = 0x55;//define a constant char code string1[ ] = hello;//define a string data Lower 128 bytes of internal data memory unsigned int data x;//16-bit variable x idata All 256 bytes if internal data memory

bdata Bit addressable area of internal data memory

xdata External data memory (512 bytes of on-chip auxiliary data RAM)

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//program to flash an LED connected to Port 2 pin 0 every second

#include <reg51.h> sbitLED = P2^0; void delay();

void main() { while (1) { LED = 0;//LED off delay(); LED = 1;//LED on delay(); } } //Delay function void delay() { . }

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Relational Operators

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Logical Operator

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Bitwise Logical Operator

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Timers/Counters
The 8051 comes equipped with two timers, both of which may be controlled, set, read, and configured individually. The 8051 timers have three general functions:

1) Keeping time and/or calculating the amount of time between events, Ex: Traffic signal (setting a proper delay )
2) Counting the events themselves, Ex: Counting the number of people entering into a Mall 3) Generating baud rates for the serial port Ex: Sending the files to other system through a modem

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Timer SFRs
the 8051 has two timers which each function essentially the same way. One timer is TIMER0 and the other is TIMER1. The two timers share two SFRs (TMOD and TCON) which control the imers, and each timer also has two SFRs dedicated solely to itself (TH0/TL0 and TH1/TL1).

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The TMOD SFR The TMOD SFR is used to control the mode of operation of both timers. Each bit of the SFR gives the microcontroller specific information concerning how to run a timer. The high four bits (bits 4 through 7) relate to Timer 1 whereas the low four bits (bits 0 through 3) perform the exact same functions, but for timer 0.

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The individual bits of TMOD have the following functions:

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Four bits (two for each timer) are used to specify a mode of operation. The modes of operation are:

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13-bit Time Mode (mode 0)

Timer mode "0" is a 13-bit timer. When the timer is in 13-bit mode, TLx will count from 0 to 31. When TLx is incremented from 31, it will "reset" to 0 and increment THx. Thus, effectively, only 13 bits of the two timer bytes are being used: bits 0-4 of TLx and bits 0-7 of THx. This also means, in essence, the timer can only contain 8192 values. If you set a 13-bit timer to 0, it will overflow back to zero 8192 machine cycles later.

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16-bit Time Mode (mode 1)

Timer mode "1" is a 16-bit timer. This is a very commonly used mode. It functions just like 13-bit mode except that all 16 bits are used. TLx is incremented from 0 to 255. When TLx is incremented from 255, it resets to 0 and causes THx to be incremented by 1. Since this is a full 16- bit timer, the timer may contain up to 65536 distinct values. If you set a 16-bit timer to 0, it will overflow back to 0 after 65,536 machine cycles.

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8-bit Time Mode (mode 2)

Timer mode "2" is an 8-bit auto-reload mode. What is that, you may ask? Simple. When a timer is in mode 2, THx holds the "reload value" and TLx is the timer itself. Thus, TLx starts counting up. When TLx reaches 255 and is subsequently incremented, instead of resetting to 0 (as in the case of modes 0 and 1), it will be reset to the value stored in THx. For example, lets say TH0 holds the value FDh and TL0 holds the value FEh.

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Split Timer Mode (mode 3)

Timer mode "3" is a split-timer mode. When Timer 0 is placed in mode 3, it essentially becomes two separate 8-bit timers. That is to say, Timer 0 is TL0 and Timer 1 is TH0. Both timers count from 0 to 255 and overflow back to 0. All the bits that are related to Timer 1 will now be tied to TH0. While Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be put into modes 0, 1 or 2 normally--however, you may not start or stop the real timer 1 since the bits that do that are now linked to TH0. The real timer 1, in this case, will be incremented every machine cycle no matter what.

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Time delay generation using Timers Procedure for time delay Generation 1. Initialize TMOD for the required Timer(0/1) and mode(0,1,2,3). 2. Load initial count value in registers TL and TH 3. Start the timer (SETB TR0 or SETB TR1 bit of TCON register) 4. Wait until the timer flag ( TF1 or TF0 )is set 5. Stop the timer( TR1 or TR0 is made zero) 6. Clear TF flag 7. Repeat from step 2 for the next delay.

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Initial count calculation

(initial value -1)

= Maximum value required delay X crystal frequency 12

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Problem : Generate a square wave with a ON time of 4ms and an OFF time of 3ms on pin P3.4. Assume a crystal frequency of 22MHz.Use timer 0 in mode 0. Sol: ON time initial value computation
(Initial value-1) = maximum value of mode 0 required delay

crystal frequency 12

=1FFF - 4X10-3 X22X106 12 =35AH

Initial value =35BH = 0000 0011 010 8 bits TL0=1BH TH0=1AH 1 1011 5 bits
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OFF time initial value computation (Initial value-1) = maximum value of mode 0 required delay =1FFF - 3X10-3 X22X106 12 =A83H Initial value =A84H

X crystal frequency 12

TL0=04H TH0=54H
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Calculation of TMOD register TMOD = X X X X 0 0 0 0 = 00H

Assembly language Program
MOV TMOD , # 00H MOV TL0 , # 01BH MOV TH0, # 1AH SETB P3.4 ACALL DELAY MOV TL0 , # 04H MOV TH0, # 54H CLR P3.4 ACALL DELAY SJMP AGAIN Delay: WAIT: SETB TR0 JNB TF0, WAIT CLR TR0 CLR TFO

AGAIN:

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Q: Find the delay generated by the timer 0 in the following code. Calculate the delay generated excluding the instruction overhead . What count has to be loaded in TL0 and TH0 if the delay has to be increased to 25mses.
CLR P2.3 HERE: MOV TMOD , #01 MOV TL0, #3EH MOV TH0, #0B8H SETB P2.3 SETB TR0 AGAIN: JNB TF0, AGAIN CLR TF0 CLR TRO CLR P2.3

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(FFFFH B83EH + 1) X 1S = 19.93ms

To have a delay of 25 ms: (Initial value-1) = maximum value of mode 0 required delay X crystal frequency 12 initial count = A5FF H

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Q : Write a program to generate a pulse train of 50ms onP2.3. Use timer 0 and mode 0 with a crystal frequency of 22MHz. Sol: (Initial value-1) = maximum value of mode 0 required delay X crystal frequency 12 The max delay possible in mode 0 with a xtal frequency of 22MHz is = maximum value of mode 0 x 12 crystal frequency =4.467ms Now the required delay is 50ms, which is 50 ms > 4.467ms say 50ms = 3.57 ms < 4.467ms

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Program

MOV TMOD ,#00H

AGAIN : MOV R0, #14H CPL P 2.3 BACK : MOV TL0,#0DH MOV TH0 , #33H SETB TR0 WAIT : JNB TF0, WAIT CLR TR0

CLR TF0
DJNZ R0,BACK SJMP AGAIN
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INTERRUPTS
1. Interrupt is an input to a processor, whereby an external device or a peripheral can inform the processor that it is ready for communication. 2. When peripheral devices activate an interrupt signal, the processor branches to a program called interrupt service routine. 3. This program is written by the user for performing tasks that the interrupting device wants the processor.

Note :The interrupts are enabled using the IE register.

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INTERRUPT SERVICE SUBROUTINE

When peripheral devices interrupt the processor, branching takes place to

interrupt service subroutine. Before branching, the actions taken by the processor are as follows: 1. It completes the execution of current instruction. 2. Program status word register value is pushed onto the stack. 3. Program counter value is pushed onto the stack. 4. Interrupt flag is reset. 5. Program counter is loaded with Interrupt Service Subroutine (ISS) address.

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INTERRUPT SERVICE SUBROUTINE PROCESSING

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Differences between RET and RETI instructions

## Both return the control to the calling program (main Program) by popping off the top two bytes of the stack into the program counter. RETI has the extra job of clearing the interrupt flags (TF0/TF1 for timers and IE0/IE1 for edge triggered interrupts)

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Classification of Interrupts

1. Vectored Interrupts
In this method, the starting address of the interrupt service routine is predefined when the microcontroller is designed. These types of interrupts are called vectored interrupts.

2. Non Vectored Interrupts

In this method, when the microcontroller receives the interrupt signal from the external devices, the processor completes the current instruction and sends a signal called INTA interrupt acknowledge (active low). After receiving the INTA signal, external hardware sends the interrupt vector to the microcontroller. These types of interrupts are called non-vectored interrupts.

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Interrupt Vector

Interrupt Sources

ROM Location

Function

RESET
1.INT0 2.TF0 3.INT1 4.TF1 5.RI and TI

0000H
0003H 000BH 0013H 001BH 0023H

Reset action
External Hardware Interrupt 0 Timer 0 interrupt External Hardware interrupt 1 Timer1 interrupt Serial communication interrupts

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IE (INTERRUPT ENABLE) REGISTER

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INTERRUPT PRIORITY REGISTER

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8051 SERIAL COMMUNICATION

SERIAL AND PARALLEL DATA TRANSFER

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SIMPLEX, HALF DUPLEX AND FULL DUPLEX DATA TRANSFER

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TYPES OF SERIAL DATA COMMUNICATION

Synchronous Serial Data Communication In synchronous serial data communication, transmitter and receiver are synchronized. It uses a common clock signal to synchronize the receiver and the transmitter.The transmission of data; first the sync character and then, the data is transmitted. This format is generally used for high-speed transmission. Asynchronous Serial Data Communication In asynchronous serial data communication, different clock sources are used for transmitter and receiver. In this mode, data is transmitted with start and stop bits. Transmission begins with start bit, followed by data and then stop bit. The transmission of 10 bit in the asynchronous format: one startbit, eight data bit and one stop bit. For error checking purpose, parity bit is included just prior to stop bit.

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SYNCHRONOUS TRANSMISSION FORMAT

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ASYNCHRONOUS TRANSMISSION FORMAT

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BAUD RATE

The rate at which the bits are transmitted (bits/second) is called baud or transfer rate. The baud rate is the reciprocal of the time to send 1 bit. In asynchronous transmission, baud rate is not equal to number of bits per second. This is because, each byte is preceded by a start bit and followed by parity and stop bit.

For example, in synchronous transmission, if data is transmitted with 9600 baud, it means that 9600 bits are transmitted in one second.
For one bit, transmission time = 1 second/9600 = 0.104 ms.

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Baud Rate

TH1(Decimal)

TH1(Hex)

9600
4800 2400 1200

-3
-6 -12 -24

FD
FA F4 E8

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8051 SERIAL COMMUNICATION

The 8051 supports a full duplex serial port. Full duplex means that it can transmit and receive a byte simultaneously. The 8051 has TXD (pin 11 or P3.1) and RXD (pin 10 or P3.0) pins for transmission and reception of serial data respectively. These pins are TTL compatible. The 8051 transfers and receives data serially with different baud rates. Three special function registers support serial communication, namely, SBUF Register, SCON Register and PCON Register.

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SPECIAL FUNCTION REGISTERS SBUF RegisterSBUF is an 8 bit register. It has separate SBUF registers for data transmission and for data reception. These two registers are accessed by the same name, SBUF.

One of the registers is write only and used to hold data to be transmitted via TXD pin. The other is read only and holds the received data from external source via RXD pin.
For a byte of data to be transferred via the TXD line, it must be placed in the SBUF register. Similarly, SBUF holds the 8 bit data received by the RXD pin. SCON RegisterThis register contains mode selection bits, serial port interrupt bit (TI and RI) and also the ninth data bit for transmission and reception (TB8 and RB8).

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SERIAL CONTROL REGISTER (SCON)

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 Note : 1. SCON register is used to load required serial mode ,start, stop bits etc.., 2. Initialize SCON register, generally 50H for serial mode 1,8bit data, start and stop bits. 3. REN : Receive Enable To perform the serial port communication ,(both Transmission and Receiving the data) REN must set to 1. 4.TB8/RB8 : bit 9 of data to be transmitted /received in modes 2 and 3.(We are using only mode1,so make these 2 bits as 0)

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SFRs Related to SERIAL PORT

SCON
SM0 SM1 SM2 REN TB8 RB8 TI RI

PCON
SMOD

GF1

GF0

PD

IDL

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112

INTERFACE OF TWO MICROCONTROLLERS WITH MINIMUM SIGNALS

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RS232

RS232 is the most widely used serial I/O interfacing standard. The RS232 standard was published by the Electronic Industry Association (EIA) in 1960.
The COM1 and COM2 ports in IBMPC are RS232 compatible ports. In RS232, 1 is represented by 3 to 25 V and 0 is represented by +3 to +25 V. In a microcontroller, serial TXD and RXD lines are TTL compatible i.e. 1 and 0 are represented by +5 V and 0 V.

For this reason, in order to connect a microcontroller to RS232 bus, voltage converters are used. MAX 232 IC is commonly used to convert the TTL logic levels to the RS232 voltage levels.

The significance of the 232 is that 2 is transmission line, 3 is receiving line, and 7 (2+3+2) is signal ground line.
In RS232, ground line is common to the transmitter and receiver, and they are usable up to one meter without any shield. 114

Stepper Motors
A stepper motor is a widely used device that translates electrical pulses into mechanical movement .Stepper motor may be used for locomotion ,movement, positioning and many other functions in applications such as disk drives ,dot matrix printers and robotics. Types Permanent magnet Variable Reluctance Hybrid

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Windings of Stepper Motor

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INTERFACING STEPPER MOTOR

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Step N0 Winding A

1 Clock Wise 2 3 4

1 1 0 0

0 1 1 0

0 0 1 1

1 0 0 1 Anticlock Wise

Steps per second = RPM x Steps per Revolution 60

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EXAMPLE

The step angle and the stepping code can be obtained from the stepper motor manufacturer, and the rotation speed depends on the delay program between the stepping codes. The circuit to interface stepper motor is as shown in Fig. 6.15. The stepper motor can be driven directly by the transistors. Transistors are used to supply higher current to the motor.

The microcontroller outputs the drive pattern to make the motor rotate. The diodes in Fig. 6.15 are called fly back diodes and are used to protect the transistors from reverse biases.

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HALF STEP OPERATION OF STEPPER MOTOR

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DRIVER CIRCUIT AND PORT INTERFACE FOR STEPPER

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INTERFACING DC MOTOR

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CIRCUIT OPERATION DC motor speed and direction of rotation is controlled using port pinsP2.4 and P2.5. The circuit utilizes complementary pair NPN/PNP, transistors T4/T5 and T2/T3. Motor is on, if a PWM signal is applied to P2.4; and if P2.5 is held at logic 0, when the PWM is at logic 1, T6 collector will be low; so T4 is OFF and T5 is ON. Since P2.5 is held at logic 0, the collector of T1 will go high,so T2 is ON and T3 is OFF. The motor rotates in reverse direction, if P2.4 is held at logic0; and if a PWM signal is applied to P2.5, then T4 will be ON and T5 will be OFF. When PWM is at logic 1, transistor T2 is OFF and T3 is ON giving a reverse conduction path. Motor is OFF if both P2.4 and P2.5 are held at logic 0. The diodes in the figure are used to protect the transistors from reverse biases. 127

Project 1: Blue Tooth Based Security System for Process Industry Project 2: Automated Food Processing System Project 3: Data Acquisition and Navigation Control of Robot Project 4: Measurement of Wobbling of Vehicle Tyres Project 5: Wireless Controlled Rotorcraft Project 6: GSM Based Process Control System

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Project 7: PIR Security System using GSM Project 8: Measurement of GAIT Parameters using Ultrasonic Transducers

Project 9: Measurement of Heart Rate and Body Temperature

Project 10: Muscle Stimulator
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Project 11: Voice Operated Home Appliances for the Physically Challenged Project 12: ECG Analysis and Telemetry using GSM Project 13: Obstacle Detection for Vehicles using Ultra Sound Signals

Project 14: Automated Parking Lot Billing System

Project 15: Electric Guitar Tuner
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LCD Panel

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Note : The size of LCD is 16 characters and 2 lines. The address of the first line is 80H and second line is C0H.

Basic Functions of LCD

1.lcdcdmd( ) This function is used to initialize the data i.e., clear display,first character,increment cursor,address location

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2.lcddata() It checks for the data i.e., it is ready to take the data from Microcontroller.

3.lcdready( ) It checks for the status of the Microcontroller. i.e busy=1 Ready to accept the data busy =0 MC is busy with some other task

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INTERFACING D/A CONVERTER USING PARALLEL PORTS

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INTERFACING MATRIX KEYBOARD AND SEVEN-SEGMENT DISPLAY

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