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Contents:
Introduction Block Diagram and Pin Description of the 8051 Registers Some Simple Instructions Structure of Assembly language and Running an 8051 program Memory mapping in 8051 8051 Flag bits and the PSW register Addressing Modes 16-bit, BCD and Signed Arithmetic in 8051 Stack in the 8051 LOOP and JUMP Instructions CALL Instructions I/O Port Programming
General-purpose microprocessor
CPU for Computers No RAM, ROM, I/O on CPU chip itself ExampleIntels x86, Motorolas 680x0
Many chips on mothers board
Introduction
Data Bus
RAM
ROM
I/O Port
Timer
Microcontroller :
A smaller computer On-chip RAM, ROM, I/O ports... ExampleMotorolas 6811, Intels 8051, Zilogs Z8 and PIC 16X
CPU
RAM ROM
A single chip
I/O Port
Serial Timer COM Port Microcontroller
Embedded System
Embedded system means the processor is embedded into that
application. An embedded product uses a microprocessor or microcontroller to do one task only. In an embedded system, there is only one application software that is typically burned into ROM. Exampleprinter, keyboard, vido game player
2.
3.
Block Diagram
External interrupts Interrupt Control On-chip ROM for program code
Timer/Counter
On-chip RAM
Timer 1 Timer 0
Counter Inputs
CPU
Serial Port
OSC
Bus Control
4 I/O Ports
P0 P1 P2 P3
TxD RxD
Address/Data
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Feature ROM (program space in bytes) RAM (bytes) Timers I/O pins Serial port Interrupt sources
8051 4K 128 2 32 1 6
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
8051 (8031)
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) EA/VPP ALE/PROG PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)
Pins of 80511/4
Vccpin 40
Vcc provides supply voltage to the chip. The voltage source is +5V. GNDpin 20ground XTAL1 and XTAL2pins 19,18 These 2 pins provide external clock. Way 1using a quartz crystal oscillator Way 2using a TTL oscillator Example 4-1 shows the relationship between XTAL and the machine cycle.
Pins of 80512/4
RSTpin 9reset
It is an input pin and is active highnormally low. The high pulse must be high at least 2 machine cycles. It is a power-on reset. Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost. Reset values of some 8051 registers Way 1Power-on reset circuit Way 2Power-on reset with debounce
Pins of 80513/4
Pins of 80514/4
N C
XTAL2
XTAL1
GND
Example :
Find the machine cycle for (a) XTAL = 11.0592 MHz (b) XTAL = 16 MHz. Solution:
(a) 11.0592 MHz / 12 = 921.6 kHz; machine cycle = 1 / 921.6 kHz = 1.085 s (b) 16 MHz / 12 = 1.333 MHz; machine cycle = 1 / 1.333 MHz = 0.75 s
19
31 10 uF 30 pF
EA/VPP X1
X2 RST 9 8.2 K
Registers
A B R0 R1 R2 R3 R4 R5 R6 Some 8051 16-bit Register PC PC DPTR DPH DPL
; dest = source
;A=72H ;A=r OR 72H ;R4=62H ;B=the content of F9th byte of RAM
Note 1:
MOV A,#72H After instruction MOV MOV A,72H A,72H the content of 72th byte of RAM will replace in Accumulator.
8086
MOV MOV MOV MOV AL,72H AL,r BX,72H AL,[BX]
8051
MOV MOV MOV A,#72H A,#r A,72H
Note 2:
MOV A,R3 MOV A,3
ADD A, Source
;A=A+SOURCE
SETB CLR
SETB SETB SETB SETB SETB
Note:
bit bit
C P0.0 P3.7 ACC.2 05
; bit=1 ; bit=0
; CY=1 ;bit 0 from port 0 =1 ;bit 7 from port 3 =1 ;bit 2 from ACCUMULATOR =1 ;set high D5 of RAM loc. 20h
Bit Addressable Page 359,360
CLR instruction is as same as SETB i.e: CLR C ;CY=0 But following instruction is only for CLR: CLR A ;A=0
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SUBB
SETB C SUBB A,R5
A,source ;A=A-source-CY
;CY=1 ;A=A-R5-1
ADC
SETB C ADC
A,source ;A=A+source+CY
;CY=1 A,R5 ;A=A+R5+1
DEC INC
INC DEC DEC
byte byte
R7 A 40H
;byte=byte-1 ;byte=byte+1
; [40]=[40]-1
CPL
Example:
A
MOV CPL MOV ACALL SJMP
;1s complement
A,#55H ;A=01010101 B A P1,A DELAY L01
L01:
CALL
ANL - ORL - XRL EXAMPLE: MOV R5,#89H ANL R5,#08H RR RL RRC RLC EXAMPLE:
RR A
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EDITOR PROGRAM Myfile.asm ASSEMBLER PROGRAM Other obj file Myfile.obj LINKER PROGRAM
Myfile.abs
OH PROGRAM Myfile.hex
8k
0000H
32k
1FFFH
8752 AT89C52
7FFFH
30H
2FH
Bit-Addressable RAM 20H 1FH 18H 17H 10H 0FH 08H 07H 00H Register Bank 2 (Stack) Register Bank 1 Register Bank 3
Register Bank 0
PSW Register
CY AC
Carry flag Auxiliary carry flag Available to the user for general purpose Register Bank selector bit 1 Register Bank selector bit 0 Overflow flag User define bit Parity flag Set/Reset odd/even parity
CY AC -RS1 RS0 OV -P
RS1 0 0 1 1
RS0 0 1 0 1
Register Bank 0 1 2 3
Note: X can be 0 or 1
AC=1
Addressing Modes
Immediate Register Direct Register Indirect Indexed
IRAN
MOV MOV
DPTR, A Rm, Rn
In this mode, register is used as a pointer to the data. A,@Ri @R1,B ; move content of RAM loc.Where address is held by Ri into A ( i=0 or 1 ) MOV MOV
In other word, the content of register R0 or R1 is sources or target in MOV, ADD and SUBB insructions. Example: Write a program to copy a block of 10 bytes from RAM location sterting at 37h to RAM location starting at 59h. Solution: MOV R0,37h MOV R1,59h MOV R2,10 L1: MOV A,@R0 MOV @R1,A INC R0 INC R1 DJNZ R2,L1
jump
Example: Assuming that ROM space starting at 250h contains Hello., write a program to transfer the bytes into RAM locations starting at 40h. Solution: ORG 0 MOV DPTR,#MYDATA MOV R0,#40H L1: CLR A MOVC A,@A+DPTR JZ L2 MOV @R0,A INC DPTR INC R0 SJMP L1 L2: SJMP L2 ;------------------------------------ORG 250H MYDATA: DB Hello,0
END Notice the NULL character ,0, as end of string and how we use the JZ instruction to detect that.
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Example:
Write a program to get the x value from P1 and send x2 to P2, continuously . Solution: ORG 0 MOV DPTR, #TAB1 MOV A,#0FFH MOV P1,A L01: MOV A,P1 MOVC A,@A+DPTR MOV P2,A SJMP L01 ;---------------------------------------------------ORG 300H TAB1: DB 0,1,4,9,16,25,36,49,64,81 END
Write a program to add n 16-bit number. Get n from port 1. And sent Sum to LCD a) in hex b) in decimal Write a program to subtract P1 from P0 and send result to LCD
(Assume that ACAL DISP display A to LCD )
AB A,#25H B,#65H AB
AB A,#25 B,#10 AB
;B|A = A*B
MUL
MOV MOV MUL
;A=2, B=5
Bit-Addressable RAM
20H 1FH 18H 17H 10H 0FH 08H 07H 00H
Example: MOV MOV MOV PUSH PUSH PUSH R6,#25H R1,#12H R4,#0F3H 6 1 4
SP=08H
SP=09H
SP=08H
Jump if A=0
Jump if A/=0 Decrement and jump if A/=0 Jump if A/=byte Jump if byte/=#data Jump if CY=1 Jump if CY=0
JB
JNB JBC
Jump if bit=1
Jump if bit=0 Jump if bit=1 and clear bit
CJNE , JNC
Exercise:
Write a program that compare R0,R1. If R0>R1 then send 1 to port 2, else if R0<R1 then send 0FFh to port 2, else send 0 to port 2.
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CALL Instructions
Another control transfer instruction is the CALL instruction, which is used to call a subroutine.
LCALL(long call)
In this 3-byte instruction, the first byte is the opcode an the second and third bytes are used for the address of target subroutine. Therefore, LCALL can be used to call subroutines located anywhere within the 64K byte address space of the 8051.
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A Pin of Port 1
Read latch
TB2
Vcc
Load(L1)
P1.X
Clk Q
P1.X pin M1
P0.x
8051 IC
Tri-state Buffer
Output Input
Low
Highimpedance (open-circuit)
Vcc
Load(L1) 2. output pin is
Vcc 1 0
M1
P1.X
Clk Q
P1.X pin
output 1
8051 IC
Vcc
Load(L1) 2. output pin is
ground 0 1
M1
P1.X
Clk Q
P1.X pin
output 0
8051 IC
Vcc
Q
P1.X
P1.X pin
Write to latch
Clk
M1
TB1 Read pin 3. Read pin=1 Read latch=0 Write to latch=1 8051 IC Saturday, June 22, 2013
Vcc
Q
P1.X
P1.X pin
Write to latch
Clk
M1
TB1 Read pin 3. Read pin=1 Read latch=0 Write to latch=1 8051 IC Saturday, June 22, 2013
BACK:
Reading Latch
Exclusive-or the Port 1
MOV P1,#55H ;P1=01010101 ORL P1,#0F0H ;P1=11110101 1. The read latch activates TB2 and bring the data from the Q latch into CPU. Read P1.0=0 2. CPU performs an operation. This data is ORed with bit 1 of register A. Get 1. 3. The latch is modified. D latch of P1.0 has value 1. 4. The result is written to the external pin. External pin (pin 1: P1.0) has value 1.
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Vcc
Q
P1.X
0 M1
Clk
Read-modify-write Feature
Read-modify-write Instructions
Table C-6 This features combines 3 actions in a single instruction 1. CPU reads the latch of the port 2. CPU perform the operation 3. Modifying the latch 4. Writing to the pin Note that 8 pins of P1 work independently.
Read-Modify-Write Instructions
Mnemonics
ANL ORL XRL JBC PX.Y, TARGET CPL INC DEC DJNZ PX, TARGET
Example
ANL P1,A ORL P1,A XRL P1,A JBC P1.1, TARGET CPL P1.2 INC P1 DEC P1 DJNZ P1,TARGET
MOV PX.Y,C
CLR PX.Y SETB PX.Y
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MOV P1.2,C
CLR P1.3 SETB P1.4
Other Pins
P1, P2, and P3 have internal pull-up resisters.
P1, P2, and P3 are not open drain. P0 has no internal pull-up resistors and does not connects to Vcc inside the 8051. P0 is open drain. Compare the figures of P1.X and P0.X. However, for a programmer, it is the same to program P0, P1, P2 and P3. All the ports upon RESET are configured as output.
A Pin of Port 0
Read latch
TB2
P1.X
Clk Q
P0.X pin M1
P1.x
8051 IC
Open drain is a term used for MOS chips in the same way that open collector is used for TTL chips. When P0 is used for simple data I/O we must connect it to external pull-up resistors. Each pin of P0 must be connected externally to a 10K ohm pull-up resistor. With external pull-up resistors connected upon reset, port 0 is configured as an output port.
P0.0 DS5000 P0.1 P0.2 8751 P0.3 P0.4 8951 P0.5 P0.6 P0.7
Port 0
74LS373
PSEN ALE P0.0 P0.7
G D
74LS373
OE OC A0 A7
D0 EA P2.0 P2.7
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D7
A8 A15
8051
ROM
74LS373
OE OC A0 A7
A8 A12
8051
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ROM
74LS373
OE OC A0 A7
Address
D0 EA P2.0 P2.7
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8051
ROM
ALE Pin
The ALE pin is used for de-multiplexing the
address and data by connecting to the G pin of the 74LS373 latch.
When ALE=0, P0 provides data D0-D7. When ALE=1, P0 provides address A0-A7. The reason is to allow P0 to multiplex address and data.
Function
RxD TxD INT0 INT1 T0 T1 WR RD
Pin
10 11 12 13 14 15 16 17