ATMEL MICROCONTROLLERS

(89C51 & 89C2051)

Dr.Y.NARASIMHA MURTHY Ph.D Sri Sai a!!a Na"i#$a% &#%%'('(A)"#$#*#)+) ANANTAPUR,515001,A.P,INDIA

INTRODUCTION

Atmel introduced its first 8-bit Flash microcontroller AT89C51 in 1993, based on the 8051 core The AT89C51 is a low-power hi h performance C!"# 8-bit !icrocontroller with $ %&b'tes of flash pro rammable and erasable read onl' memor'()*+"!,&-t is compatible with the -.T*/0# industr' standard !C#51 instruction set and pin-out& The de1ice is manufactured usin Atmel0s hi hdensit' non1olatile memor' technolo '

I$"r#-)&"i#$ C#$"-..

The on-chip flash allows the pro ram memor' to be repro rammed in-s'stem& 2' combinin a 1ersatile 8-bit C)3 with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which pro1ides a hi hl'fle4ible and cost-effecti1e solution to man' embedded control applications&

I$"r#-)&"i#$ C#$"-..

The flash memor' on the chip is a non-1olatile memor', which can be electricall' erased for lines and bloc%s& The mechanism foe erasin the memor' is easier than that for **)+"!& T'picall' 1000 write5erase c'cles are possible which is more than sufficient for an' embedded application& The re isters and memor' or anisation is same as that of the !C# 51&The pin functions of Atmel 89C51 are same as that of !C#-51&

/'a")r'+ #0 89&51

The only difference between the two is that 89C51 has on-chip flash program memory and the MC 51 has normal !"#M

PIN DIA1RAMS

%#&2 -ia(ra* ,89C51

AT!*/ 89C6051

The $T89C%&51 is a low 'oltage ( high performance( CM# 8-bit microcontroller with %) bytes of *lash programmable and erasableread only memory.The de'ice is man+fact+red +sing $tmels high density non-'olatile memory technology and is compatible with the ind+stry standard MC 51 instr+ction set.,y combining a 'ersatile 8-bit C!- with flash on a monolithic chip (the $tmel $T89C%&51 is a powerf+l microcomp+ter which pro'ides a highly fle.ible and cost-effecti'e sol+tion to many embedded control applications.

89C2051 - Features

The AT89C6051 pro1ides 67 b'tes of Flash, 168 b'tes of +A!, 15 -5" lines, two 18-bit timer5counters, a fi1e 1ector two-le1el interrupt architecture, a full duple4 serial port, a precision analo comparator, on-chip oscillator and cloc% circuitr'& -n addition, the AT89C6051 is desi ned with static lo ic for operation down to 9ero fre:uenc' and supports two software selectable power sa1in modes&

C#$"-...

The -dle !ode stops the C)3 while allowin the +A!, timer5counters, serial port and interrupt s'stem to continue functionin & The power-down mode sa1es the +A! contents but free9es the oscillator disablin all other chip functions until the ne4t hardware reset& 8-bit !icrocontroller with 67 2'tes Flash AT89C6051 0388;

-t has an static processor core, ie& there is no minimum cloc% fre:uenc'& the ma4imum cloc% fre:uenc' is 6$ !;9& "f course the AT89C60516$)C can also be run at 11&0596 !;9&

Pr#(ra* M'*#r3 L#&2 i"+

There are two on-chip loc/ bits which can be left +nprogrammed 0-1 or can be programmed 0!1 to obtain the additional feat+res shown in the ne.t slide. They pro'ide a /ind of sec+rity for the data. The 2oc/ ,its can only be erased with the Chip 3rase operation.

L#&2 i" Pr#"'&"i#$ M#-'+

Pr#(ra* L#&2 i"+ L 1 L 2 Pr#"'&"i#$ T34' 1 4o program loc/ feat+res % ! *+rther programming of the *lash is disabled 5 ! ! ame as mode %( also 'erify is disabled

%#&2 -ia(ra*,89C2051

Pi$ -ia(ra*

6t is a'ailable as %&-lead )<-)5#"-C chip which normally wor/s at 758 9.C

!in 9escription

VCC #uppl' 1olta e&

GND =round.

)ort 1 -The )ort 1 is an 8-bit bidirectional -5" port& )ort pins )1&6 to )1&> pro1ide internal pull-ups& )1&0 and )1&1 re:uire e4ternal pull-ups& )1&0 and )1&1 also ser1e as the positi1e input (A-.0, and the ne ati1e input (A-.1,, respecti1el', of the onchip precision analo comparator&

C#$"-..

The )ort 1 out-put buffers can sin% 60 mA and can dri1e /*< displa's directl'& ?hen 1s are written to )ort 1 pins, the' can be used as inputs& ?hen pins )1&6 to )1&> are used as inputs and are e4ternall' pulled low, the' will source current (--/, because of the internal pullups& )ort 1 also recei1es code data durin Flash pro rammin and 1erification&

C#$"-..

)ort 3 pins )3&0 to )3&5, )3&> are se1en bidirectional -5" pins with internal pull-ups& )3&8 is hard-wired as an input to the output of the onchip comparator and is not accessible as a eneral-purpose -5" pin& The )ort 3 output buffers can sin% 60 mA& ?hen 1s are written to )ort 3 pins the' are pulled hi h b' the internal pull-ups and can be used as inputs& As inputs, )ort 3 pins that are e4ternall' bein pulled low will source current (--/, because of the pull-ups& )ort 3 also recei1es some control si nals for Flash pro rammin and 1erification&

The functions of 1arious special features of the )"+T3 are as follows@

P#r" Pi$ !5.& ":9 !5.1 T:9 !5.% 64T& !5.5 64T1 !5.; T& !5.5 T1

A%"'r$a"' /)$&"i#$+ 0serial inp+t port1 0serial o+tp+t port1 0e.ternal interr+pt &1 0e.ternal interr+pt 11 0timer & e.ternal inp+t1 0timer 1 e.ternal inp+t1

C#$"-..

+#T -+eset input& All -5" pins are reset to 1s as soon as +#T oes hi h& ;oldin the +#T pin hi h for two machine c'cles while the oscillator is runnin resets the de1ice& *ach machine c'cle ta%es 16 oscillator or cloc% c'cles& ATA/1 -nput to the in1ertin oscillator amplifier and input to the internal cloc% operatin circuit& :T$2% #+tp+t from the in'erting oscillator

amplifier.

"scillator Characteristics

The ATA/1 and ATA/6 are the input and output, respecti1el', of an in1ertin amplifier which can be confi ured for use as an on-chip oscillator, as shown in Fi ure 5-1& *ither a :uart9 cr'stal or ceramic resonator ma' be used& To dri1e the de1ice from an e4ternal cloc% source, ATA/6 should be left unconnected while ATA/1 is dri1en as shown in ne4t slide& There are no re:uirements on the dut' c'cle of the e4ternal cloc% si nal, since the input to the internal cloc%in circuitr' is throu h a di1ide-b'-two flipflop, but minimum and ma4imum 1olta e hi h and low time specifications must be obser1ed&

C#$"-..

#scillator connections connections

3.ternal cloc/ dri'e

C1( C% < 5& p* = 1& p* for Crystals > ;& p* = 1& p* for Ceramic "esonators

6dle Mode

-n idle mode, the C)3 puts itself to sleep while all the on-chip peripherals remain acti1e& The mode is in1o%ed b' software& The content of the on-chip +A! and all the special functions re isters remain unchan ed durin this mode& The idle mode can be terminated b' an' enabled interrupt or b' a hardware reset& The )1&0 and )1&1 should be set to B0C if no e4ternal pull-ups are used, or set to B1C if e4ternal pullups are used. -t should be noted that when idle is terminated b' a hardware reset, the de1ice normall' resumes pro ram e4ecution, from where it left off, up to two machine c'cles before the internal reset al orithm ta%es control.

C#$"-..

#n-chip hardware inhibits access to internal "$M in this e'ent( b+t access to the port pins is not inhibited. To eliminate the possibility of an +ne.pected write to a port pin when 6dle is terminated by reset( the instr+ction following the one that in'o/es 6dle sho+ld not be one that writes to a port pin or to e.ternal memory.

!ower-down Mode

6n the power-down mode the oscillator is stopped( and the instr+ction that in'o/es power-down is the last instr+ction e.ec+ted. The on-chip "$M and pecial *+nction "egisters retain their 'al+es +ntil the power-down mode is terminated. The only e.it from power-down is a hardware reset. "eset redefines the *"s b+t does not change the on-chip "$M. The reset sho+ld not be acti'ated before 8CC is restored to its normal operating le'el and m+st be held acti'e long eno+gh to allow the oscillator to restart and stabili?e. The !1.& and !1.1 sho+ld be set to @&A if no e.ternal p+ll-+ps are +sed( or set to @1A if e.ternal p+ll-+ps are +sed.

R'+"ri&"i#$+ #$ C'r"ai$ I$+"r)&"i#$+

The AT89C6051 and is an economical and cost-effecti1e member of Atmel0s rowin famil' of microcontrollers& -t contains 67 b'tes of Flash pro ram memor'& -t is full' compatible with the !C#-51 architecture, and can be pro rammed usin the !C#-51 instruction set& ;owe1er, there are a few considerations one must %eep in mind when utili9in certain instructions to pro ram this de1ice&

C#$"-..

All the instructions related to Dumpin or branchin should be restricted such that the destination address falls within the ph'sical pro ram memor' space of the de1ice, which is 67 for the AT89C6051&
#o, the pro rammer must be careful while writin the pro rams& For e4ample, /E!) >*0; would be a 1alid instruction for the AT89C6051 (with 67 of memor',, whereas /E!) 900; would not&

,ranching 6nstr+ctions

2C$22( 2BM!( $C$22( $BM!( BM!( BM! C$79!T" D These +nconditional branching instr+ctions will e.ec+te correctly as long as the programmer /eeps in mind that the destination branching address m+st fall within the physical bo+ndaries of the program memory si?e 0loca-tions &&E to F**E for the 89C%&511. 8iolating the physical space limits may ca+se +n/nown program beha'ior.

C#$"-..

CB43 G...H( 9B4I G...H( B,( B4,( BC( B4C( B,C( BI( B4I D Jith these conditional branching

instr+ctions the same r+le abo'e applies. $gain( 'iolating the memory bo+ndaries may ca+se erratic e.ec+tion. *or applications in'ol'ing interr+pts the normal interr+pt ser'ice ro+tine address locations of the

a+i& -i00'r'$&'+ !'"5''$ 89C51 & 89C2051

89C%&51 is ha'ing additionally an on chip precision analog comparator. 89C%&51 has only 15 6K# lines so( port1 and port5 are only a'ailable on it. The architect+re of 89C%&51 does not s+pport any e.ternal addressKdata b+s and therefore "9(J" signals are absent . imilar to 89C51 (the 89C%&51 also s+pports f+lld+ple. serial comm+nication and si. interr+pt so+rces.

imilar to 89C51 (two power sa'ing modes namely @6dle mode and power down modes are also a'ailable in 89C%&51 . The 89C51 has ;)b of flash memory where as 89C%&51 is ha'ing only %)b of flash memoey $23(! 34(3$ signals are not a'ailable in 89C%&51 chip. The analog precision comparator on the 89C%&51 may be +sed along with "C components to b+ild a simple comparator type $9C. Tho+gh there are certain differences (still 89C%&51 pro'ides cost effecti'e (compact and fle.ible sol+tions for many ind+strial applications.

ContdFFFF

The ad'antage of ha'ing internal analog comparator is that (it sa'es a lot of board space and the designer is free from doing additional wor/ of selection of op-amps and other components.

A44%i&a"i#$+

The $tmel controllers ha'e wide spread ind+strial > cientific applications which incl+de 6nd+strial a+tomation 2owpower based applications Ja'e form generation *reL+ency co+nters ensor interfaced applications M