DAC & ADC

Analogue Input/Output

Many sensors & transducers produce voltages representing physical data.

To process transducer data in a computer requires conversion to digital form.

Many output devices require variable control, not just two digital logic levels

To control these devices from a computer requires conversion from digital to analogue form (usually an analogue voltage).

The conversion from analogue signals to digital values is performed by Analogue to Digital Converter (ADC) The conversion from a digital value to an analogue signal is performed by a Digital to Analogue Converter (DAC).
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Digital to Analog Conversion

DAC function
Parallel DAC

n bit value

DA Converter

Analogue output

VAgnd

Vref

Serial DAC would typically have a single data input line and a clock input signal which would be used to clock in the serial data stream. Adv. : - Fewer pins.

Disadv. : Slower data transfer. 5-4

Analogue Output

Digital to Analogue Converter (DAC) DAC Characteristics

= 1/2n where n is the number of bits Max. digital value = 2n 1 output voltage range determined by reference voltage (Vref and AGND) Step size in volts = resolution x voltage range Max output voltage = (2n 1)/ 2n x voltage range uni-polar / bipolar types slew rate rate of change of output. interface parallel (fast) or serial (slower but uses fewer connections)
resolution

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DAC principles Example 4-bit DAC

Sum currents with operational amplifier

1 d3 0 d2 1 d1 16R Vref/16 8R Vref/8

2R
4R

Vref/2

R
Vo = - Vref(Rf/Rinput)

Vref/4

Vo Vo = -(Vref-AGND)(digital value/2n) Vo digval/ 2n

1
Vref d0

AGND

Example: with 4-bit value = 1011

Vo = -Vref(d3/2 + d2/4 + d1/8 + d0/16)

Vo = -Vref(1/2 + 1/8 + 1/16) Vo = -Vref(11/16)

5-6

Output from DAC

Output Voltage
VMAX = Maximum output voltage

2n -1 V max n *Vref 2
where n is number of bits VMAX

MAXVAL = Maximum digital value

= 2n -1 where n is number of bits

MAXVAL

Digital Value

5-7

Example DAC device

M AX5722 dual,12-bit, low-power, buffered voltage output, digital-to-analog converter (DAC) is packaged in a space-saving 8-pin MAX package (5mm 3mm).
Ultra-Low Power Consumption 112A at VDD = +3.6V 135A at VDD = +5.5V

Wide +2.7V to +5.5V Single-Supply Range

8-Pin MAX Package 0.3A Power-Down Current Guaranteed 12-Bit Monotonicity (1LSB DNL) Safe Power-Up Reset to Zero Volts at DAC Output Three Software-Selectable Power-Down Impedances (100k, 1k, Hi-Z) Fast 20MHz, 3-Wire SPI, QSPI, and MICROWIRECompatible Serial Interface Rail-to-Rail Output Buffer Amplifiers Schmitt-Triggered Logic Inputs for Direct Interfacing to Optocouplers Wide -40C to +125C Operating Temperature Range

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Audio & LPC 23xx DAC example

Recreate audio

111 110 101 100 011 010 001 000 1 2 3 4 5 6 7 8 9 10

What resolution? What sampling rate ?

5-9

Analog to Digital Conversion

10

Analogue Input

Analogue to Digital Converter (ADC) ADC Characteristics

= 1/2n where n is the number of bits Max. digital value = 2n 1 input voltage range determined by the reference voltages (Vref and AGND) Step size in volts = resolution x voltage range uni-polar / bipolar types interface parallel (fast) or serial (slower but uses fewer connections) often integrated into microcontrollers.
resolution
5-11

General ADC function

Analogue input
Converter

n bit result

VAgnd

Vref

The analogue input voltage is converted into a value. The value is dependent on the reference voltages and the number of bits n.
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Analogue Input

Main types (i.e.methods) of ADC

approximation good all-rounder Flash fastest type Sigma-delta good for audio Dual slope integrating slow but high resolution with good noise immunity others Sampling, ramp, charge balancing
Successive

Characteristics
resolution

conversion

method conversion time input voltage range interface parallel (fast) or serial(fewer connections)

5-13

Flash ADC

Consists of a series of comparators, each one comparing the input signal to a unique reference voltage.

The comparator outputs connect to the inputs of a priority encoder circuit, which produces a binary output

5-14

Flash ADC Circuit

5-15

How Flash Works

As the analog input voltage exceeds the reference voltage at each comparator, the comparator outputs will sequentially saturate to a high state.

The priority encoder generates a binary number based on the highest-order active input, ignoring all other active inputs.

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ADC Output

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Flash

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MCP3208

Features 12-bit resolution 1 LSB max DNL 1 LSB max INL (MCP3204/3208-B) 2 LSB max INL (MCP3204/3208-C) 4 (MCP3204) or 8 (MCP3208) input channels Analog inputs programmable as single-ended or pseudo-differential pairs On-chip sample and hold SPI serial interface (modes 0,0 and 1,1) Single supply operation: 2.7V - 5.5V 100 ksps max. sampling rate at VDD = 5V 50 ksps max. sampling rate at VDD = 2.7V Low power CMOS technology: 500 nA typical standby current, 2 A max. 400 A max. active current at 5V Industrial temp range: -40C to +85C Available in PDIP, SOIC and TSSOP packages

5-19

Example:8-bit ADC with Vref +5v and 0v VAgnd

Number of steps (values) = 2n = 28 = 256 steps are numbered 0 to 255 step size = reference voltage range / number of steps = (5v 0v) / 256 = 19.53125 x10-3v 20mv number range 0 to 255 corresponds to voltage range of 0 to 5v ADC value = (Vin / (Vref Agnd)) * 256 : remember max ADC value is 255 so max input voltage that can be converted accurately is less than 5 volts. What is the maximum convertible input voltage?
5-20

8-bit ADC with 5v reference

ADC value

255

ADC value

4 3

2
1 V
10mv 30mv 50mv 70mv 20mv 40mv 60mv

Volts

4.98

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Cont.
ADC value 4

1 Volts 10mv 20mv 40mv 60mv 80mv 30mv 50mv 70mv

5-22

Quantization Error
101 100

011

010

001 0 1 2 3 4 5 6

Each input sample is assigned a quantization interval that is closest to its amplitude height. If an input sample is not assigned a quantization interval that matches its actual height, then an error is introduced into the conversion process.
This error is called quantization error/noise.

Reducing quantization error

One way to reduce quantization noise is to increase the amount of quantization intervals. The difference between the input signal amplitude height and the quantization interval decreases as the quantization intervals are increased (increases in the intervals decrease the quantization noise). Solved by increasing the ADC resolution (number of bit) in proportion to the increase in quantization intervals.
80 70 60 50 40 30 20 10
5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 6

8 80 7 70 6 60 5 50 4 40

3 30
2 20 1 10 0
0 5

0 5

5.1

5.2

5.3

5.4

5.5

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5.9

Analogue Input Example

Example - The LM35 series are precision integrated-circuit temperature sensors, whose output voltage is linearly proportional to the Celsius (Centigrade) temperature.

Calibrated directly in Celsius (Centigrade) Linear + 10.0 mV/C scale factor 0.5C accuracy guarantee able (at +25C)

Rated for full -55 to +150C range

Suitable for remote applications Low cost due to wafer-level trimming Operates from 4 to 30 volts Less than 60 A current drain Low self-heating, 0.08C in still air

Nonlinearity only C typical

Low impedance output, 0.1 Ohm for 1 mA load

5-25

LM35 & Microcontroller Interface Example

ADC range (microcontroller) 0V to + 3.3 V LM35 Linear + 10.0 mV/C scale factor Use a basic Centigrade temperature sensor +2C to +150C

Max voltage from sensor = 10mV150 = 1.5V

+5V

LM35 Input

3 2

+ 4

0 - 3V
1

0 - 1.5V

Scale the input voltage accordingly to match input the range of the ADC

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LM35 & Microcontroller Interface Example

step size = reference voltage range / number of steps = (3.3v 0v) / 1024 = 3.22265625 x10-3v Every 1C is now equivalent to 20.0 mV Temperature resolution > 0.2C
+5V

LM35 Input

3 2

+ 4

0 - 3V
1

AI0
Microcontroller 3.3 V

0 - 1.5V

5-27

ADC input

Good practice to
Limit

the voltage range (input protection) Filter the signal

D41

From sensor EXT_TEMP

+5V R162

C133 1u R163 10 8.87k 15k C134 0.47u 9 + MCP604 U38C 8

TP37 TP_EXT_TEMP_F EXT_TEMP_F

To ADC input

BAT54S/SOT

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ADC Block diagram

Interface to uP

Interrupt request

Conversion Control
AN0 AN1 M u t i p l e x e r

Busy
Start conversion

Sample & Hold

Converter

Result Register

ANn

VAREF

VAGND

Reference voltage
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ADC principle of operation

1. 2. 3.

4.

5.

The voltage is presented to the ADC input. The ADC is sent a signal to start conversion While the conversion takes place the input voltage should remain stable. The ADC outputs a signal to indicate that it is busy doing the conversion and should not be disturbed. When the conversion is completed the ADC makes the result available and outputs a signal to indicate that the conversion has completed (e.g remove the busy signal)
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Multiplexer and Sample/Hold

To convert several analogue inputs 1. use an ADC for each input or more usually 2. use one ADC and switch the inputs through a multiplexer

requires selection of input before each conversion is started and a short delay is required before conversion started to allow switching to occur and signal to settle.

Sample and Hold (S&H)

while conversion takes place voltage must remain stable sample voltage input connected to S&H voltage held on a capacitor sample time charging time of capacitor input signal disconnected from S&H

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Summary

Analogue inputs are often required in embedded applications and so ADCs are integrated into most microcontrollers (DACs less so) ADCs and DAC also exist as standalone IC devices often specialist devices e.g. High speed or high resolution ADCs, fast DACs for video output. Main characteristics of interest is
resolution

- number of bits voltage range ADC - conversion time DAC - slew rate
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Example question

A 5 bit ADC is used to encode an analogue signal in the range 0V to +5V for linear PCM encoding determine:
The

step size Calculate the percentage resolution Calculate the dynamic range in dB Calculate the input voltage level corresponding 10110.

Solution
1.The step size
Number of steps 25 32
step size 50 156.25 103V 32

2. Calculate the percentage resolution

1 % Resolution 100 3% 32

Solution
3 Calculate the dynamic range in dB

20 log2 5 30 .1dB
4 Calculate the input voltage level corresponding 10110

10110 22Dec 22 156.25mV 3.4375 V

5-35

Voice signal
Signal Bandpass Filtering

Energy Distribution for Human Speech

0 Hz

300 Hz Bandwidth (3.1 kHz)

3,400 Hz

20 kHz

The human voice can produce sounds up to 20 kHz, but most sound is between 300 Hz and 3.4 kHz. The bandpass filter only passes this sound to reduce bandwidth.