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MICROPROCESSOR &

INTERFACING
INTRODUCTION
Block diagram of a Computer System
CPU
ROM/
RAM
KBD/
Display
DISK Printer
Address/Data/Control Bus
GPP
Microprocessors
Chip
80x86
Soft core
ARM
Microcontrollers
8051, PIC, Atmel
Flynns Taxnomy
SISD
SIMD
MISD
MIMD
Basic Parallel Techniques
Pipelining
Replication
Types of ILP-processors
Traditional Von-Neumann
Scalar ILP
Superscalar ILP
VLIW static schedule
Superscalar - dynamic
Instruction:
Fetch
Decode
Execute
1. ADD R2,R1,R3
2. SBR R2,R3,R2
3. STR R2,b
Instruction Pipelines
IF
1
ID
1

IF
2

IE
1

ID
2

IF
3

IE
2

ID
3
IE
3

5 cycles
IF
1
ID
1
IE
1
IF
2
ID
2
IE
2
IF
3
ID
3
IE
3

9 cycles
Pipeline Hazards
VLIW & Superscalar Architecture
Register File
EU1 EU2 EU3
VLIW
Register File
EU1 EU2 EU3
Instruction Fetch
Superscalar
Register File
EU1 EU2 EU3
Instruction
Fetch
Dispatch
unit
ES
CS
SS
DS
IP

1
2
3
4
5
6
Control & Timing
Memory Interface
ALU
Operands
Flags
AH AL
BH BL
SP
BP
SI
DI
CH CL
DH DL
EU
BIU
Instruction
Queue
Block Diagram of 8086
Name Date Transistors Clock speed Data width
8080 1974 6,000 2MHz 8
8086 1978 29,000 5MHz 16
80286 1982 134,000 12 MHz 16
80386 1985 275,000 16-33 MHz 32
80486 1989 1,200,000 20 -100 MHz 32
Pentium 1993 3,100,000 60-200 MHz 32 /64
Pentium II 1997 7,500,000 233-450 MHz 32/ 64
Pentium III 1999 9,500,000 450 -933 MHz 32 /64
Pentium 4 2000 42,000,000 1.5 GHz 32/ 64
The Evolution of Microprocessors
Memory Hierarchy
Secondary
Primary
Cache


Secondary Memory
Storage Disks
HDD
FDD
USB Drives
CD
No program gets executed directly from Secondary
Memory
Primary Memory
Program gets loaded from Disk to RAM and only then
executes
The initial program called Boot Strap Loader (BSL) load
OS kernel into primary memory and then OS takes over
Program made of modules
One module gets loaded at a time
Tasks
Software Module executes Process/Task
Control ensures that task execution satisfies set
of timing constraints RT
Single task
Multitasking



Single process
single thread
Single process
multi thread
Multiple process
multi thread
Multiple process
single thread
Memory in terms of closeness to
processor
Cache
Primary
Secondary
Extreme Fast Memory
Internal/External to CPU
CPU uses cache memory to store instructions that are repeatedly required to run
programs- working set
Sequential locality of reference spatial & temporal
CPU
L1 Cache
L2 Cache
Cache
Cntlr
Cache hit/miss
Cache Memory