Microprocessor Architecture and

Computer Organization
Microprocessor Bus Architecture
Processor System Level of
Implementation
Determine machine timing diagram of a
microprocessor when running a program to
appreciate how a microprocessor perform
instructions.

Discuss the rationale and give examples of
processor system level of implementation.

Look into the three main units of stored
Computer Program which is the basic concept
and principle on how microprocessors are
created and develop.
Examine the function of Address, Data, and
Control Buses in a stored computer program as
a means of communication of the CPU,
memory unit and I/O devices.

Explain the evolution of computer from
vacuum tube machine to the microprocessor.
-Explain the advantages of an assembly
language programming over high-Level
language.
Digital Computers: Some Basics
Review on Evolution of Computers
Computer Codes and Languages
Refers to those attributes of a system visible to a
programmer or, put another way, those attributes that have a
direct impact on the logical execution of a program.
Refers to the operational units and their interconnections
that realize the architectural specifications. Organizational
attributes include those hardware details transparent to the
programmer, such as control signals; interfaces between the
computer and peripherals; and the memory technology used.
ENIAC - background
Electronic Numerical Integrator And Computer
Eckert and Mauchly
University of Pennsylvania it was on finished 1946

Trajectory tables for weapons
Started 1943
Too late for war effort
Used until 1955
L1 Microprocessor Architecture and
Computer Organization
Digital Computers: Some Basics
Stored Program Computer
CPU
Memory
Input Output
Rather than rewriting the computer program for
each new task, the program instructions should stored
in a memory unit just like the data.
L1 Microprocessor Architecture and
Computer Organization
Digital Computers: Some Basics
Fetch and Execute
Note that the CPU has been designed to follow
repeatedly four simple steps.
the key to understanding the activities of
microprocessor.
L1 Microprocessor Architecture and
Computer Organization
The Three-Bus Architecture
The CPU, memory unit, and I/O devices must
able to communicate with each other.
For example, The CPU must be able to specify
which memory cell is to be selected and whether the
contents of that cell should be read or whether new
data should be written into that cell. Such
communication is the purpose of the address bus,
data bus and control buses shown in the previous
figure.
Further example, let us assume that the command in
the instruction register specifies that the contents of the
accumulator are to be output to the printer?
L1 Microprocessor Architecture and
Computer Organization
In sum the CPU begins each command cycle
with an instruction fetch from the memory unit. The
program counter is then incremented in preparation
for the next fetch instruction cycle. Finally the opcode
for the instruction is decoded and executed during the
execution phase of the cycle.
Memory Read
Memory Write
I/O Read
I/O Write
L1 Microprocessor Architecture and
Computer Organization
From the preceding discussion, we can begin to
see how the CPU controls the flow of data between
itself, memory, and the I/O devices. The instruction
set of a computer can be thought of as a list of
commands that cause unique sequences to occur on
three buses.
Therefore:
L1 Microprocessor Architecture and
Computer Organization
Suppose that we have the code; LD A, (10)?
EXAMPLE
Load the accumulator with the contents of memory
cell 10.
It would cause the address bus to output the address
10.
The control bus establish a memory read cycle, and
the data bus to input the data from memory cell 10
and store the data in the accumulator of the CPU.
L1 Microprocessor Architecture and
Computer Organization
EVOLUTION OF COMPUTERS
Electronic Numerical Integrator And Computer
(ENIAC)
Eckert and Mauchly
University of Pennsylvania
Trajectory tables for weapons
Started 1943
Finished 1946
Too late for war effort
Used until 1955

The vacuum Tube Era
Decimal (not binary)
20 accumulators of 10 digits
Programmed manually by switches
18,000 vacuum tubes
30 tons
15,000 square feet
140 kW power consumption
5,000 additions per second
L1 Microprocessor Architecture and
Computer Organization
ENIAC - details
The project was a response to U.S. needs during
World War II. The Armys Ballistics Research
Laboratory (BRL), an agency responsible for developing
range and trajectory tables for new weapons, was
having difficulty supplying these tables accurately and
within a reasonable time frame. Without these firing
tables, the new weapons and artillery were useless to
gunners. The BRL employed more than 200 people
who, using desktop calculators, solved the necessary
ballistics equations. Preparation of the tables for a
single weapon would take one person many hours,
even days.
L1 Microprocessor Architecture and
Computer Organization
John Mauchly, a professor of electrical engineering
at the University of Pennsylvania, and John Eckert, one of
his graduate students, proposed to build a general-
purpose computer using vacuum tubes for the BRLs
application. In 1943,
the Army accepted this proposal, and work began on the
ENIAC. The resulting machine was enormous, weighing
30 tons, occupying 1500 square feet of floor space, and
containing more than 18,000 vacuum tubes. When
operating, it consumed 140 kilowatts of power. It was also
substantially faster than any electromechanical computer,
capable of 5000 additions per second.
L1 Microprocessor Architecture and
Computer Organization
The ENIAC was a decimal rather than a binary
machine. That is, numbers were represented in
decimal form, and arithmetic was performed in the
decimal system. Its memory consisted of 20
accumulators, each capable of holding a 10-digit
decimal number. A ring of 10 vacuum tubes
represented each digit. At any time, only one vacuum
tube was in the ON state, representing one of the 10
digits. The major drawback of the ENIAC was that it
had to be programmed manually by setting switches
and plugging and unplugging cables.
L1 Microprocessor Architecture and
Computer Organization
The ENIAC was completed in 1946, too late
to be used in the war effort. Instead, its first task
was to perform a series of complex calculations that
were used to help determine the feasibility of the
hydrogen bomb. The use of the ENIAC for a
purpose other than that for which it was built
demonstrated its general-purpose nature. The
ENIAC continued to operate under BRL
management until 1955, when it was disassembled.
L1 Microprocessor Architecture and
Computer Organization
First-generation of computers were massive
machines based on the vacuum tube technology.
They occupied entire rooms and required an air-
conditioned environment to operate reliably. In fact,
because the average life of a vacuum tube was 3000
hours, and several thousand tubes were to build a
machine, some that the machine would never do any
useful task. Technicians would constantly be tracking
down and replacing bad tubes!
L1 Microprocessor Architecture and
Computer Organization
L1 Microprocessor Architecture and
Computer Organization
Stored Program concept
Main memory storing programs and data
ALU operating on binary data
Control unit interpreting instructions from memory
and executing
Input and output equipment operated by control
unit
Princeton Institute for Advanced Studies
IAS
Completed 1952
von Neumann/Turing
Structure of von Neumann machine
L1 Microprocessor Architecture and
Computer Organization
IAS - details
L1 Microprocessor Architecture and
Computer Organization
1000 x 40 bit words
Binary number
2 x 20 bit instructions
Set of registers (storage in CPU)
Memory Buffer Register
Memory Address Register
Instruction Register
Instruction Buffer Register
Program Counter
Accumulator
Multiplier Quotient
L1
Microprocessor
Architecture and
Computer
Organization
Structure of IAS
detail
Commercial Computers
L1 Microprocessor Architecture and
Computer Organization
1947 - Eckert-Mauchly Computer
Corporation
UNIVAC I (Universal Automatic Computer)
US Bureau of Census 1950 calculations
Became part of Sperry-Rand Corporation
Late 1950s - UNIVAC II
Faster
More memory
IBM
L1 Microprocessor Architecture and
Computer Organization
Punched-card processing equipment
1953 - the 701
IBMs first stored program computer
Scientific calculations
1955 - the 702
Business applications
Lead to 700/7000 series
L1 Microprocessor Architecture and
Computer Organization
Replaced vacuum tubes
Smaller
Cheaper
Less heat dissipation
Solid State device
Made from Silicon (Sand)
Invented 1947 at Bell Labs
William Shockley et al.
Second generation machines
NCR & RCA produced small transistor machines
IBM 7000
DEC - 1957
Produced PDP-1

L1 Microprocessor Architecture and
Computer Organization
The first major change in the electronic
computer came with the replacement of the vacuum
tube by the transistor. The transistor is smaller,
cheaper, and dissipates less heat than a vacuum
tube but can be used in the same way as a vacuum
tube to construct computers. Unlike the vacuum
tube, which requires wires, metal plates, a glass
capsule, and a vacuum, the transistor is a solid-
state device, made from silicon.
L1 Microprocessor Architecture and
Computer Organization
The transistor was invented at Bell Labs in
1947 and by the 1950s had launched an electronic
revolution. It was not until the late 1950s, however,
that fully transistorized computers were
commercially available.
L1 Microprocessor Architecture and
Computer Organization
A single, self-contained transistor is called a discrete
component. Throughout the 1950s and early 1960s,
electronic equipment was composed largely of
discrete
componentstransistors, resistors, capacitors, and
so on. Discrete components were manufactured
separately, packaged in their own containers, and
soldered or wired together onto masonite-like circuit
boards, which were then installed in computers,
oscilloscopes, and other electronic equipment
L1 Microprocessor Architecture and
Computer Organization
L1 Microprocessor Architecture and
Computer Organization
Computer Codes
Single Digital Lines
carries two pieces of information
1 0
Bus - Collections of lines
Byte 8 bits
Nibble 4bits
L1 Microprocessor Architecture and
Computer Organization
Computer Codes and Languages
Data on the bus 11001011
Information handling capability of
the bus has increased not by a factor
of 8, but by a factor of 2^8.
This can be seen by writing all the
possible combinations form
00000000 ... 111111111
The general result is that for n
bits, there are 2^n unique
combinations.
L1 Microprocessor Architecture and
Computer Organization
Binary
Decimal
Octal
Hexadecimal
L1 Microprocessor Architecture and
Computer Organization
L1 Microprocessor Architecture and
Computer Organization
1968
American
National
Standard
Institute
(ANSI)
7-Bit code
ASCII
L1 Microprocessor Architecture and
Computer Organization
Computer Languages

L1 Microprocessor Architecture and
Computer Organization
Object Code
this is the only code
that a computer can execute
and understand.
Certainly is more readable, but the function of
the program is still not clear
Mnemonics
Abbreviations for the instruction operation codes
L1 Microprocessor Architecture and
Computer Organization
Computer Languages

The function of the program becomes clear.
Machine Language Programming Programming the
computer by entering only hexadecimal operation
codes.
L1 Microprocessor Architecture and
Computer Organization
L2 Microprocessor
Bus Architecture
Introduction to Buses
8 bit Data Bus
16 bit Address Bus
4 Line Control Bus
Digital Signal
When voltage level
varies with time we
refer the information
on the line as
L2 Microprocessor
Bus Architecture
Most microprocessors and digital circuits
provide signals that are transistor-transistor logic
(TTL Compatible)
<= 0.4 V Logic 0
>= 2.4 V Logic 1
CMOS
Complementary Metal Oxide Semiconductor
Logic Levels 0 and 5V
TTL devices can drive a nearly unlimited number
of CMOS devices (provided that pull-up resistor is
applied to bring the TTLs logic 1 closer to 5 V, but
CMOS is limited to one standard TTL load.
L2 Microprocessor
Bus Architecture
Implementing The Three-bus Architecture
L2 Microprocessor
Bus Architecture
Implementing The Three-bus Architecture
L2 Microprocessor
Bus Architecture
CPU as a Complex
Timer
L2 Microprocessor
Bus Architecture
CPU as a Complex
Timer
L3 Embedded Systems
Development and its application
RATIONALE
The projected global market for embedded
systems is expected to increase to an estimated
$112.5 billion by the end of 2013. These provide a
venue for the embedded systems developer to build
systems for almost different applications. The uses
of embedded systems practically spans to almost all
areas of study. One will notice that every single day,
new product are introduced that use embedded
systems.
L3 Embedded Systems
Development and its application
With the recent development, electronics
hardware such as micro-controllers and Field
Programmable Gate Array (FPGA) chips prices
dropped tremendously. This opens a lot of possibility
of implementing automation to different areas that
may not be possible before. With the recent huge
competition of these chips, prices went down and the
software support increases. Developer now has the
capability to build and deploy system at a quarter of
the time compared before.
L3 Embedded Systems
Development and its application
The software, e.g. compilers, Integrated
Development Environment (IDE) and programmers
are now mostly free. Most of these popular chips
even comes with extensive libraries, thus, building
your own code becomes a trivial task.
Implementing embedded systems may not be
as easy as building programs for personal
computers.
The main difference lies on how these
systems response to pre-defined and or undefined
inputs.
L3 Embedded Systems
Development and its application
Embedded systems are normally found on
flight control systems in an aircraft
where the response of navigation control of
both sea and aerial systems and a lot more is very
critical (real time response) to both user of the
systems and also to the people who are within the
vicinity of the system.
Note that for those mentioned systems, a
delay in the response will mean a system failure
which will cause a catastrophic event to the users.
However, not all embedded systems were designed
to response this way. Thus, these can be classified
as:
L3 Embedded Systems
Development and its application
Hard Systems
Soft Systems
Hybrid Systems
Hard Systems build for time critical systems
where a delay is unacceptable.
L3 Embedded Systems
Development and its application
Soft Systems build for systems which can tolerate
small variations in response times.
Hybrid Systems - systems which exhibit both hard
and soft constraints on its performance.
In spite of the wide applications and low price
tag of embedded systems, its development process
is quite different from the PC. For instance,
software that run on PC can be deployed even with
minor bugs since these can be addressed for future
updates or patches as long as the main functionality
is working.
L3 Embedded Systems
Development and its application
An embedded system however is frequently
programmed once and that software patch is not as
easy as the PC patch, as you need either another
software to update the new firmware or you need to
be technically competent to do the upgrade
otherwise you might end up bricking the whole
system itself.
L3 Embedded Systems
Development and its application
This means that every embedded system
needs to be tested and analyzed extensively.
Another constraint is that an embedded system does
not have the hardware resources the PC have, e.g.
memory and processing power. It is a challenge to
develop a code in a very restricted environment.
L3 Embedded Systems
Development and its application
But in spite of the constraint, recent poll shows
that embedded systems currently outnumber
humans in the USA.
L3 Embedded Systems
Development and its application
On the other hand, agriculture is an area
where embedded systems have been playing an
important role in addressing most of its automation
problems. Remote data loggers were by far the
most used embedded systems in this area.
Tractors recent technologies are now comparable
to what one normally sees on an automobile in
terms of control.
L3 Embedded Systems
Development and its application
GPS mapping, automatic steering and by far
the newly developed John Deere technology, the
autonomous tractor which will hit the market five
years from now, employs multiple embedded
systems.