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R R
ADC in
R R
R in
ADC
V V
N V
V V
V V
N
t
r
V
r
V
in
V
00355 . 0
986 . 0
TEMP
986 . 0 ) TEMP ( 00355 . 0
TEMP
C
C TEMP
V
V
2008 EECS194-5 9
Sampling Basics
Converting values in 16-bit MCUs
vtemp = adccount/4095 * 1.5;
tempc = (vtemp-0.986)/0.00355;
tempc =0
Fixed point operations
Need to worry about underflow and overflow
Floating point operations
They can be costly on the node
00355 . 0
986 . 0
TEMP
TEMP
C
V
4095
TEMP
R R
ADC
V V
N V
2008 EECS194-5 10
Sampling Basics
What sample rate do we need?
Too little: we cant reconstruct the signal we care about
Too much: waste computation, energy, resources
Example:
2-bytes per sample, 4 kHz 8 kB / second
But the mote only has 10 kB of RAM
) (x f
sampled
) (x f
t
2008 EECS194-5 11
Shannon-Nyquist Sampling Theorem
If a continuous-time signal contains no
frequencies higher than , it can be completely
determined by discrete samples taken at a rate:
Example:
Humans can process audio signals 20 Hz 20 KHz
Audio CDs: sampled at 44.1 KHz
) (x f
max
f
max samples
2 f f
2008 EECS194-5 12
Sampling Basics
Aliasing
Different frequencies are indistinguishable when they
are sampled.
Condition the input signal using a low-pass filter
Removes high-frequency components
(a.k.a. anti-aliasing filter)
2008 EECS194-5 13
Sampling Basics
Dithering
Quantization errors can result
in large-scale patterns that
dont accurately describe the
analog signal
Introduce random (white)
noise to randomize the
quantization error.
Direct Samples
Dithered Samples
2008 EECS194-5 14
Analog-to-Digital Basics
So, how do you convert analog signals to a
discrete values?
A software view:
1. Set some control registers :
Specify where the input is coming from (which pin)
Specify the range (min and max)
Specify characteristics of the input signal (settling time)
2. Enable interrupt and set a bit to start a conversion
3. When interrupt occurs, read sample from data register
4. Wait for a sample period
5. Repeat step 1
2008 EECS194-5 15
Block Diagram (MSP430)
2008 EECS194-5 16
ADC Features
Texas Instruments
MSP430
Atmel
ATmega 1281
Resolution 12 bits 10 bits
Sample Rate 200 ksps 76.9 ksps
Internally Generated
Reference Voltage
1.5V, 2.5V, Vcc 1.1V, 2.56V
Single-Ended Inputs 12 16
Differential Inputs 0 14 (4 with gain amp)
Left Justified Option No Yes
Conversion Modes Single, Sequence,
Repeated Single,
Repeated Sequence
Single, Free Running
Data Buffer 16 samples 1 sample
2008 EECS194-5 17
ADC Core
Input
Analog signal
Output
12-bit digital value of input
relative to voltage references
Linear conversion
4095
4095
R R
ADC in
R R
R in
ADC
V V
N V
V V
V V
N
R
V
R
V
in
V
2008 EECS194-5 18
SAR ADC
SAR = Successive-Approximation-Register
Binary search to find closest digital value
2008 EECS194-5 19
SAR ADC
SAR = Successive-Approximation-Register
Binary search to find closest digital value
1 Sample Multiple cycles
2008 EECS194-5 20
SAR ADC
1 Sample Multiple cycles
2008 EECS194-5 21
Sample and Conversion Timing
Timing driven by:
TimerA
TimerB
Manually using ADC12SC bit
Signal selection using SHSx
Polarity selection using ISSH
2008 EECS194-5 22
Voltage Reference
Voltage Reference Generator
1.5V or 2.5V
REFON bit in ADCCTL0
Consumes energy when on
17ms settling time
External references allow arbitrary
reference voltage
Want to sample Vcc, what Vref
to use?
Internal External
Vref+
1.5V, 2.5V, Vcc VeRef+
Vref-
AVss VeRef-
2008 EECS194-5 23
Sample Timing Considerations
Port 6 inputs default to high impedance
When sample starts, input is enabled
But capacitance causes a low-pass filter effect
Must wait for the input signal to converge
ns 800 pF 40 011 . 9 ) k 2 (
S sample
R t
2008 EECS194-5 24
Software Configuration
How it looks in code:
ADC12CTL0 = SHT0_2 | REF1_5V |
REFON | ADC12ON;
ADC12CTL1 = SHP;
2008 EECS194-5 25
Inputs and Multiplexer
12 possible inputs
8 external pins (Port 6)
1 Vref+ (external)
1 Vref- (external)
1 Thermistor
1 Voltage supply
External pins may function as
Digital I/O or ADC.
P6SEL register
Is this a multiplexor as you saw
in CS150?
2008 EECS194-5 26
Conversion Memory
16 sample buffer
Each buffer configures sample
parameters
Voltage reference
Input channel
End-of-sequence
CSTARTADDx indicates where to
write next sample
2008 EECS194-5 27
Conversion Modes
Single-Channel Single-Conversion
Single channel sampled and converted
once
Must set ENC (Enable Conversion) bit
each time
Sequence-of-Channels
Sequence of channels sampled and
converted once
Stops when reaching ADC12MCTLx
with EOS bit
Repeat-Single-Channel
Single channel sampled and converted
continuously
New sample occurs with each trigger
(ADC12SC, TimerA, TimerB)
Repeat-Sequence-of-Channels
Sequence of channels sampled and
converted repeatedly
Sequence re-starts when reaching
ADC12MCTLx with EOS bit
2008 EECS194-5 28
Software Configuration
How it looks in code:
Configuration
ADC12CTL0 = SHT0_2 | REF1_5V |
REFON | ADC12ON;
ADC12CTL1 = SHP;
ADC12MCTL0 = EOS | SREF_1 |
INCH_11;
Reading ADC data
m_reading = ADC12MEM0;
2008 EECS194-5 29
A Software Perspective
command void Read.read() {
ADC12CTL0 = SHT0_2 | REF1_5V | REFON | ADC12ON;
ADC12CTL1 = SHP;
ADC12MCTL0 = EOS | SREF_1 | INCH_11;
call Timer.startOneShot( 17 );
}
event void Timer.fired() {
ADC12CTL0 |= ENC;
ADC12IE = 1;
ADC12CTL0 |= ADC12SC;
}
task void signalReadDone() {
signal Read.readDone( SUCCESS, m_reading );
}
async event void HplSignalAdc12.fired() {
ADC12CTL0 &= ~ENC;
ADC12CTL0 = 0;
ADC12IE = 0;
ADC12IFG = 0;
m_reading = ADC12MEM0;
post signalReadDone();
}
2008 EECS194-5 30
A Software Perspective
command void Read.read() {
ADC12CTL0 = SHT0_2 | REF1_5V | REFON | ADC12ON;
ADC12CTL1 = SHP;
ADC12MCTL0 = EOS | SREF_1 | INCH_11;
call Timer.startOneShot( 17 );
}
event void Timer.fired() {
ADC12CTL0 |= ENC;
ADC12IE = 1;
ADC12CTL0 |= ADC12SC;
}
task void signalReadDone() {
signal Read.readDone( SUCCESS, m_reading );
}
async event void HplSignalAdc12.fired() {
ADC12CTL0 &= ~ENC;
ADC12CTL0 = 0;
ADC12IE = 0;
ADC12IFG = 0;
m_reading = ADC12MEM0;
post signalReadDone();
}
2008 EECS194-5 31
A Software Perspective
command void Read.read() {
ADC12CTL0 = SHT0_2 | REF1_5V | REFON | ADC12ON;
ADC12CTL1 = SHP;
ADC12MCTL0 = EOS | SREF_1 | INCH_11;
call Timer.startOneShot( 17 );
}
event void Timer.fired() {
ADC12CTL0 |= ENC;
ADC12IE = 1;
ADC12CTL0 |= ADC12SC;
}
task void signalReadDone() {
signal Read.readDone( SUCCESS, m_reading );
}
async event void HplSignalAdc12.fired() {
ADC12CTL0 &= ~ENC;
ADC12CTL0 = 0;
ADC12IE = 0;
ADC12IFG = 0;
m_reading = ADC12MEM0;
post signalReadDone();
}
2008 EECS194-5 32
A Software Perspective
command void Read.read() {
ADC12CTL0 = SHT0_2 | REF1_5V | REFON | ADC12ON;
ADC12CTL1 = SHP;
ADC12MCTL0 = EOS | SREF_1 | INCH_11;
call Timer.startOneShot( 17 );
}
event void Timer.fired() {
ADC12CTL0 |= ENC;
ADC12IE = 1;
ADC12CTL0 |= ADC12SC;
}
task void signalReadDone() {
signal Read.readDone( SUCCESS, m_reading );
}
async event void HplSignalAdc12.fired() {
ADC12CTL0 &= ~ENC;
ADC12CTL0 = 0;
ADC12IE = 0;
ADC12IFG = 0;
m_reading = ADC12MEM0;
post signalReadDone();
}
2008 EECS194-5 33
A Software Perspective
command void Read.read() {
ADC12CTL0 = SHT0_2 | REF1_5V | REFON | ADC12ON;
ADC12CTL1 = SHP;
ADC12MCTL0 = EOS | SREF_1 | INCH_11;
call Timer.startOneShot( 17 );
}
event void Timer.fired() {
ADC12CTL0 |= ENC;
ADC12IE = 1;
ADC12CTL0 |= ADC12SC;
}
task void signalReadDone() {
signal Read.readDone( SUCCESS, m_reading );
}
async event void HplSignalAdc12.fired() {
ADC12CTL0 &= ~ENC;
ADC12CTL0 = 0;
ADC12IE = 0;
ADC12IFG = 0;
m_reading = ADC12MEM0;
post signalReadDone();
}
2008 EECS194-5 34
MCU
Kernel Driver
Interrupts and Tasks
ADC
Application
command void Read.read() {
ADC12CTL0 = SHT0_2 | REF1_5V | REFON | ADC12ON;
ADC12CTL1 = SHP;
ADC12MCTL0 = EOS | SREF_1 | INCH_11;
call Timer.startOneShot( 17 );
}
event void Timer.fired() {
ADC12CTL0 |= ENC;
ADC12IE = 1;
ADC12CTL0 |= ADC12SC;
}
task void signalReadDone() {
signal Read.readDone( SUCCESS, m_reading );
}
async event void HplSignalAdc12.fired() {
ADC12CTL0 &= ~ENC;
ADC12CTL0 = 0;
ADC12IE = 0;
ADC12IFG = 0;
m_reading = ADC12MEM0;
post signalReadDone();
}
2008 EECS194-5 35
Interrupts and Tasks
Tasks are run-to-completion
Used to signal application events
Break up computation in the application
Interrupts
Generated by the hardware
Preempt execution of tasks
Interrupts and tasks can schedule new tasks
Hardware
Interrupt
Task Task Task
Handler