PROGRAMMABLE

LOGIC
CONTROLLER
(PLC)
The PLC Concept Requested by General
Motors and Landis .The Major
Automotive
Industry of America.
THE INVENTER
The First PLC Invented in 1968
Made By Bedford Associates of Bedford,
Massachusetts.
One of the People worked for this Project
Mr.Dick Morley, The Father of the PLC


WHY PLC
Earlier Industry
Larger Length of Panels( about 50 Feet).
100s and 1000s of Relays.
Noise.
Excessive Heating.
Confusion of wiring.
Delay Timing.
Updating was time consuming and Expensive.
Rewired by Skilled persons.



THE FIRST PLC
The First PLC named is 084
The 84
th
Project of Bedford Associates.
125 words of memory
1/60 of Response Time

The Bedford Associates Started a New
Company MODICON ( Modular Digital
Controller )
In 1977 Sold to Gould Electronics
Later acquired by German Company AEG
Now, Schneider Electric, France
Electrical Panel

PLC Adopted Panel

Advantages of PLC
Rugged in Construction
Armored for severe conditions (dust,
moisture, Heat, Cool)
Replace Electromechanical Relays
Easy Programmable
Easy understandable
Compact in Size
Low Cost
Easy Installation
High Speed Response
Data Handling, Storage, Processing Power
and Communication Capabilities equivalent
to desktop Computers
Accommodate Multiple Inputs and Outputs
Extended Temperature Ranges
Immunity to Electrical Noises
Resistance to Vibration




PLC MANUFACTURER
MODICON HITACHI
SIEMENS HONEYWELL
ALLAN BRADLY IDEC
ABB KEYENCE
OMRON LG
CROZET MESSUNG
FATEK MITSUBISHI
GE-FANUC SCHNEIDER
TELEMECHANIC TOSHIBA



PLC
CONTROL
PROGRAM
OUTPUTS TO
DEVICES
INPUTS FROM
DEVICES
Architecture of a PLC
BATTERY
USER
RAM
CPU
CK
SYSTEM
ROM
DATA
RAM
I/O
UNIT
DATA BUS
CONTROL
ADDRESS BUS
OUTPUT







INPUT
INPUT
OUTPUT
UNIT
LATCH
DRIVER
BUFFER
OPTO
COUPLER
PLC MODE
RUN Mode
PLC Execute the Application Program
STOP Mode
USER can Download the Program and Edit
PLC SCAN
Input Processing
Program Processing
Output Processing
INPUT PROCESSING

INPUT
MODULE
INPUTS READ IN
I/P MEM

PROGRAM PROCESSING

PROGRAM
PROCESSING
I/P MEM

O/P MEM

OUTPUT PROCESSING

OUTPUT
MODULE
OUTPUT WRITE OUT
O/P MEM

INPUTS DEVICES
PUSH BUTTONS
RELAY CONTACTS
LIMIT SWITCHES
SELECTOR SWITCHES
PROXIMITY SWITCHES
PRESSURE SWITCHES
ANALOG SENSORS
ENCODER
POTENTIOMETER
OUTPUT DEVICES
RELAYS
MOTOR STARTERS
SOLENOID VALVES
INDICATING LAMPS
LED DISPLAYS
SOLIDSTATE RELAYS
TRANSISTOR OUTPUT
PWM OUTPUT
MMI OR HMI (Man Machine Interface)
POWER SUPPLY FOR PLC
AC VERSION
110 V AC, 230 V AC FOR SIGNAL AND
POWER
DC VERSION
24 V , 12 V DC FOR SIGNAL AND POWER
AC/DC VERSION
230 V AC FOR POWER
24 V DC FOR SIGNAL

COMMUNICATION
RS 232 (9 PIN)
RS 485
ETHERNET
MODBUS
PROFIBUS
DEVICENET
INPUTS
NO. OF INPUTS
MINIMUM 6 TO MAX 100
EXPANSION AVAILABLE

0 STATE AND 1 STATE
ON STATE AND OFF STATE
12 V DC MODEL- BELOW 5 V 0 STATE
ABOVE 5 V 1 STATE
24 V DC MODEL- BELOW 17 V 0 STATE
ABOVE 17 V 1 STATE
230 V AC MODEL-BELOW 70 V - 0 STATE
ABOVE 70 V - 1 STATE
INPUT ISOLATION

OUTPUT
NO. OF OUTPUT
MIN 4 TO MAX 80
EXPANSION
PID MODULE
PWM MODULE

OUTPUT ISOLATION

PROGRAMMING LANGUAGES
IEC (International Electrotechnical
Commission) 61131-3 Defines 5 Languages

LADDER (LD)
FUNCTIONAL BLOCK (FBD)
INSTRUCTION LISTING (IL)
SEQUENTIAL FUNCTION CHART ( SFC)
STRUCTURED TEXT (ST)
LADDER DIAGRAM
VERTICAL LINES - LADDER
HORIZONTAL LINES RUNGS -
INSTRUCTIONS
LEFT to RIGHT
TOP to BOTTOM
LADDER DIAGRAM

I1
I2
STANDARD SYMBOLS

NORMALLY OPEN
CONTACT
NORMALLY CLOSED
CONTACT

OUTPUT
SPECIAL
INSTRUCTION
Logical Control
with Relays 115VAC
wall plug
relay logic
input A
(normally closed)
input B
(normally open)
output C
(normally open)
ladder logic
A B C
Simple Example

Ladder construction

PLC Registers
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
1 0
Register 00
PLC Registers
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
0
Register 05
LOGIC FUNCTION
AND
OR
NAND
NOR
EX-OR
AND FUNCTION
I1 I2

AND FUNCTION
A B C
0 0 0
1 0 0
0 1 0
1 1 1

I1 I2
OR FUNCTION
I1
I2

OR FUNCTION
A B C
0 0 0
1 0 1
0 1 1
1 1 1

I1
I2
NOR FUNCTION
I1 I2

NOR FUNCTION
A B C
0 0 1
1 0 0
0 1 0
1 1 0

I1 I2
NAND FUNCTION
I1
I2

NAND FUNCTION
A B C
0 0 1
1 0 1
0 1 1
1 1 0

I1
I2
XOR FUNCTION
I1
I2
I1 I2

XOR FUNCTION
A B C
0 0 0
1 0 1
0 1 1
1 1 0

I1
I2
I1 I2
Mnemonics
00000
00001
00002
00003
00004
00005
00006
LDN
LD
AND
LD
LD
AND
OR
A
B
C
D
A B
C D
X
END
the mnemonic code is equivalent to
the ladder logic below
ST 00007
X
END 00008
Note: The notation shown above is
not standard Allen-Bradley
notation. The program to the
right would be the A-B equiva
lent.
SOR
BST
XIC A
XIO B
NXB
XIO C
XIO D
BND
OTE X
EOR
END
SFCs
Start
End
power up
power down
flash
Execution follows
multiple paths
Structured Text
i := 0;
REPEAT
i := i + 1;
UNTIL i >= 10
END_REPEAT;