L-29, 23.09.

2014
MOSFET DC Analysis
Quiz II
Date: 24.09.2014
Syllabus
Unit II BJT
Unit III MOSFET (L-28 & L-29)
Best Wishes for a Fine Performance!
Symbols for MOSFET
The i
D
vs v
DS
Relationship
For the MOSFET to establish a channel, we give a
minimum voltage of V
t
(threshold voltage) to the gate.
Hence it is known as enhancement-type MOSFET.
Correspondingly, we also have a depletion-type
MOSFET.
i
D
= k
n
(W/L){(V
GS
- V
t
)v
DS
v
DS
2
} (Triode Region)
i
D
= [k
n
(W/L)(V
GS
- V
t
)
2
](Saturation Region)
k
n
=
n
C
ox
and is called the process transconductance*
parameter.
W/L is the aspect ratio of the MOSFET.
V
OV
= (V
GS
- V
t
) is the gate-to-source overdrive voltage.
Temperature Effect and Breakdown:
Both k
n
and V
t
are temperature sensitive.
V
t
increases with temperature 2 mV per C.
However k
n
decreases with temperature rise and
dominantly so.
Overall there is a reduction in i
D
as temperature goes up.
This is one of the favorable attributes of a MOSFET.
At about 20 V, the device suffers punch through, when
the depletion region extends from drain to the source
and a rapid increase in drain current causes the effect.
This is normally not destructive.
BD also occurs when V
GS
exceeds 30 V. The gate oxide
(tiny as it is) may breakdown. The damage is permanent.
This can be caused by static voltage (?).
MOSFET ICs are protected by clipper diodes and by steel
wool while packaging.

Exercise
4.4/343: An NMOS transistor with V
t
= 0.7 V, has its source
terminal grounded and a 1.5 V is applied at the gate. In
what region does the device operate for a) V
D
= +0.5 V?
b) 0.9 V? and c) 3 V?
If
n
C
ox
= 100 A/V
2
, W = 10 m and L = 1 m, find the
drain current in each of the three cases.
V
DS
V
GS
- V
t
triode region; a) V
GS
= 1.5 V, V
DS
= 0.5 V, V
t
= 0.7 V
i
D
= k
n
(W/L){(V
GS
- V
t
)v
DS
v
DS
2
} = ?

i
D
vs V
GS
Characteristics
Similar to base width modulation in BJT, MOSFET has channel
length modulation, resulting in an r
o
.
Large Signal (DC)Equivalent Circuit Model
Large Signal Equivalent Circuit Model under Saturation
Analyze the circuit to determine the voltages at all nodes and currents in
all branches, for V
t
= 1 V and k
n
(W/L) = 1 mA/V
2
. Assume = 0.
V
G
= [R
G2
/(R
G1
+R
G2
)]V
DD
= ?
Assuming the transistor is in
saturation,
i
D
= [k
n
(W/L)(V
GS
- V
t
)
2
].
Substitute the values and get
the quadratic equation in i
D
.
Solve for i
D
. two roots -
choose the one that will fit into
your solution.
Confirm your assumption is true
or otherwise.
Find the values of V
D
and V
S
.

Design the circuit so that the transistor operates at I
D
= 0.4 mA and V
D
=
+0.5 V. It has V
t
= 0.7 V,
n
C
ox
= 100 A/V
2
, L = 1 m, W = 1 m. Neglect
the channel length modulation (i.e. = 0)
R
D
= (V
DD
- V
D
)/ I
D
= ?
i
D
= [k
n
(W/L)(V
GS
- V
t
)
2
]
Plugging in the values, V
GS
= ?
V
GS
= V
G
- V
S
; V
S
= ?
R
S
= (V
S
- V
SS
)/i
D
= ?