4+2 Compe Review 1

4-2 compressor design with new XORXNOR module
By
V.RamaBharathi
13A81D3808
Under the guidance of
sri.D.R.Sandeep.Asst.prof.
CONTENTS
Introduction
Need for XOR-XNOR module
CMOS XOR-XNOR gate
New XOR-XNOR module
Results
Introduction
A compressor is used in multipliers to reduce the operands
while adding terms of partial products.

A typical M-N compressor :
M equally weighted input bits
N-bit binary number.
The multiplier architecture consists of
1. partial product generation stage

2. partial product reduction stage
3. addition stage.
The partial product reduction stage is responsible for a
significant portion of the total multiplication delay, power
and area.
NEED FOR XOR-XNOR MODULE

The internal structure of compressors are basically
composed of
1.XOR-XNOR gates
2.Multiplexers.
Optimizied design of these XOR-XNOR gates can improve
the performance of multiplier circuit.
CMOS XOR-XNOR gate

CMOS uses the dual networks to implement a given
function.
One part consistsof complementary pull-up PMOS network
while other part consists of pull-down NMOS networks.
This technique requires more numbers of transistors and
large layout area.
power dissipation for CMOS XOR-XNOR gate is
138.1microWatts at 1.8v.
CMOS XOR-XNOR GATE
Voltage (V)
proje ct1(a)
. 5
. 0
. 5
. 0
1 0
3 0
5 0
v (
x no
r )
v (
x or
v (
y)
v (
x)
00
Time (ns )
Voltage (V)
proje ct1(a)
. 5
. 0
. 5
. 0
1 0
3 0
5 0
00
Time (ns )
Voltage (V)
proje ct1(a)
. 0
. 5
. 0
. 5
. 0
. 5
. 0
. 5
. 0
. 5
. 0
1 0
3 0
5 0
00
Time (ns )
Voltage (V)
proje ct1(a)
. 0
. 5
. 0
. 5
. 0
. 5
. 0
. 5
. 0
. 5
. 0
1 0
3 0
5 0
00
Time (ns )
Waveforms for CMOS XOR-XNOR gate
New XOR-XNOR module

Design of XOR-XNOR circuit consists of eight transistors.
This circuit provides good driving capability as it uses
static CMOS inverter and can operate at low supply

voltages.
In this circuit
X1=X2=0 output is low because P1, P2 and N3 transistors

are on and logic 0 is passed to output.
X1=0 and X2=1 circuit show high output as transistor P1,
N2 and N3 transistors are on while transistors P2, P3 and N1
are off and high logic is passed to output node.
X1=1 and X2=0, transistor P2, P3 and N1 are on and high
logic is passed to output node.
X1=X2=1, output node show low logic as transistor P3, N1
and N2 are on, so proposed circuit works as XOR gate.
XNOR operation has been obtained with addition of inverter.
New XOR-XNOR gate
Modul e0
v(
xno r )
v(
xor
v(
y)
v(
x)
2 . 0
1 . 5
Voltage (V)
1 . 0
0 . 5
0 . 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
8 0
9 0
1 0 0
Time (ns )
Modul e0
1 . 5
Voltage (V)
1 . 0
0 . 5
0 . 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
8 0
9 0
1 0 0
Time (ns )
Modul e0
5 . 0
4 . 5
4 . 0
3 . 5
3 . 0
Voltage (V)
2 . 5
2 . 0
1 . 5
1 . 0
0 . 5
0 . 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
8 0
9 0
1 0 0
Time (ns )
Modul e0
5 . 0
4 . 5
4 . 0
3 . 5
3 . 0
Voltage (V)
2 . 5
2 . 0
1 . 5
1 . 0
0 . 5
0 . 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
8 0
9 0
Time (ns )
Waveforms for new XOR-XNOR module
1 0 0
RESULTS
SUPPLY VOLTAGE(V)
POWER CONSUMPTION(W)
1.8
124.44n
2.0
140.41n
2.2
110.42micro
2.4
129.28
2.6
150.60
2.8
170.23
3.0
194.91
3.3
234.49

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4-2 compressor design with new XORXNOR module

while adding terms of partial products.

The multiplier architecture consists of

1. partial product generation stage

NEED FOR XOR-XNOR MODULE

CMOS XOR-XNOR gate

CMOS XOR-XNOR GATE

Waveforms for CMOS XOR-XNOR gate

New XOR-XNOR module

static CMOS inverter and can operate at low supply

X1=X2=0 output is low because P1, P2 and N3 transistors

New XOR-XNOR gate

Waveforms for new XOR-XNOR module

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