SD/eMMC Controller Integration in

SHIVA
Pankaj Talwar
5 Mar, 2015

Introduction to SD cards
SD cards better known as
memory cards are generally used
in mobile phones, digital
cameras, etc.
SD basically stands for Secure
Digital
Was developed as an extension
to MMC cards
Advantages

Small Sizes
Low Power
Low Costs
High Capacity

2012 Cadence Design Systems, Inc. All rights reserved.

Types of SD cards
Types of SD cards
Memory Only
1.
2.
3.

SDSC(1 MB to 2 GB)
SDHC(2GB to 32GB)
SDXC(32GB to 2TB)

Memory + I/O functions

1.

SDIO

Speeds in SD cards: So SD card

speed is customarily rated by its sequential

read or write speed. And the bus interface
supports 3 kind of SD card speeds
High Speed cards(25 MByte/s)
UHS I(12.5 MByte/s 104 MByte/s)
UHS II(156 MByte/s 312 MByte/s)

2012 Cadence Design Systems, Inc. All rights reserved.

Transfer Modes
SD bus Mode:
1-bit
4-bit

SPI(Serial Peripheral Interface) Mode

2012 Cadence Design Systems, Inc. All rights reserved.

Interface
Electrical Interface:

Has total of 9 pins

Requires only 6 wire for communication
Uses operational voltage 1.8V - 3.3 V
A strong consideration if interface
complexity/low power is a concern

Command Interface:
The host device sends 48-bit
commands and receives responses
Commands help
Determine different parameters of card
Card to use a different voltage & speeds
Card to receive a block to write/read

2012 Cadence Design Systems, Inc. All rights reserved.

SD Card Diagram

Protocol

Serial information transfer through bi-directional CMD and DATA pins

Host initiates the command
Response is sent by card
Commands supporting data-transfer
Operating states in cards

2012 Cadence Design Systems, Inc. All rights reserved.

Basic Transaction
Data Transfer in Blocks
Single & Multiple Blocks
Host responsible for configuring DAT lines

2012 Cadence Design Systems, Inc. All rights reserved.

Basic Read & Write

Basic Read

Basic Write

2012 Cadence Design Systems, Inc. All rights reserved.

SD host controller

Bridge between CPU & SD bus

Includes DMA support
Responsible for clock signal to SD Card
256 byte Register set

2012 Cadence Design Systems, Inc. All rights reserved.

Register Set

Divided into 4 sets

HRS
SRS
ERS
CRS

0x0EF

0x1FF
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2012 Cadence Design Systems, Inc. All rights reserved.

SD Host 4 Controller Environment

11

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Process We followed

12

Understanding the basics

Exploring block level
Integrating with SHIVA
Running C tests

2012 Cadence Design Systems, Inc. All rights reserved.

Integration
dut
AXI Lite Slave Interface
PV_MEM_15

SD Host
Controller

NIC

Xtensa
CPU
(C-test)

AXI 4 Master Interface

TGEN_62

SD Bus

SD card
Model
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2012 Cadence Design Systems, Inc. All rights reserved.

Experience & Challenges

14

Divide the motive into sub parts

Restrict yourself from deep diving
Revise the source
Confidence

2012 Cadence Design Systems, Inc. All rights reserved.

Conclusion
Exposure to different dimensions
Fairly complex design
Used for feature testing

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2012 Cadence Design Systems, Inc. All rights reserved.

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2012 Cadence Design Systems, Inc. All rights reserved.