Computer Organization

And

Assembly Language

III
Prof. Muhammad Saeed

X86 Processor Assembly

Language
Assembly Language Instructions

1/27/2015

Computer Architecture & Assembly Language

Language Instructions
MOV

MOVreg, reg
MOVmem, reg
MOVreg, mem
MOVmem, imm
MOVreg, imm

MOVZX

MOVZXreg32,
reg/mem8
MOVZXreg32,
reg/mem16
MOVZXreg16,
reg/mem8
MOVSXreg32,

MOVSX

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reg/mem8
MOVSXreg32,
reg/mem16
MOVSXreg16,
Computer Architecture & Assembly Language
reg/mem8

Language Instructions
XCHG

XCHGreg, reg
XCHGreg,
mem
XCHGmem,
reg
INC
reg/mem
DEC
reg/mem

INC, DEC

The Overflow, Sign, Zero, Auxiliary Carry, and

Parity flags are changed according to the value
of the destination operand.

ADD, SUB

ADDdest, source The Carry, Zero, Sign, Overflow, Auxiliary Carry,

SUBdest, source and Parity flags are changed according to the
value that is placed in the destination operand.

NEG

NEGreg
NEGmem

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The Carry, Zero, Sign, Overflow, Auxiliary Carry,

and Parity flags are changed according to the
value that is placed in the destination operand.
Computer Architecture & Assembly Language

Language Instructions
PUSH
PUSH
reg/mem16
PUSH
reg/mem32
PUSHimm32

The PUSH instruction first decrements

ESP and then copies a source operand
into the stack. A 16-bit operand causes
ESP to be decremented by 2. A 32-bit
operand causes ESP to be decremented
by 4.

POP
POPreg/mem16
POPreg/mem32

The POP instruction first copies the

contents of the stack element pointed to
by ESP into a 16- or 32-bit destination
operand and then increments ESP. If the
operand is 16 bits, ESP is incremented
by 2; if the operand is 32 bits, ESP is
incremented by 4

Language Instructions
PUSHFD and POPFD
The PUSHFD instruction pushes the 32-bit EFLAGS register on
the stack, and POPFD pops the stack into EFLAGS.

PUSHAD and POPAD

The PUSHAD instruction pushes all of the 32-bit general-purpose
registers on the stack in the given order: EAX, ECX, EDX, EBX,
ESP, EBP, ESI, and EDI. The POPAD instruction pops the same
registers off the stack in reverse order.

PUSHA and POPA

PUSHA instruction, pushes the 16-bit general-purpose registers
(AX, CX, DX, BX, SP, BP, SI, DI) on the stack in the order listed.
The POPA instruction pops the same registers in reverse

Language Instructions
LOOP
The LOOP instruction assumes that theECX (or CX) register
contains the loop count. When the loop instruction is executed,
the CX register is decremented and the control jumps to the
target label, until the CX register value reaches zero.

Unconditional Jump
Jmp label1

Language Instructions
Conditional Jumps
Following are the conditional jump instructions used on signed data

Instruction

Description

Flags tested

JE/JZ

Jump Equal or Jump Zero

ZF

JNE/JNZ

Jump not Equal or Jump

Not Zero

ZF

JG/JNLE

Jump Greater or Jump Not OF, SF, ZF

Less/Equal

JGE/JNL

Jump Greater or Jump Not OF, SF

Less

JL/JNGE

Jump Less or Jump Not

Greater/Equal

OF, SF

JLE/JNG

Jump Less/Equal or Jump

Not Greater

OF, SF, ZF

Language Instructions
Conditional Jumps
Following are the conditional jump instructions used on unsigned data

Instructio Description
n

Flags tested

JE/JZ

Jump Equal or Jump Zero

ZF

JNE/JNZ

Jump not Equal or Jump Not

Zero

ZF

JA/JNBE

Jump Above or Jump Not

Below/Equal

CF, ZF

JAE/JNB

Jump Above/Equal or Jump Not

Below

CF

JB/JNAE

Jump Below or Jump Not

Above/Equal

CF

Language Instructions
Conditional Jumps
The following conditional jump instructions have special uses and check the
value of flags

Instructi Description
on

Flags
tested

JXCZ

Jump if CX is Zero

none

JC

Jump If Carry

CF

JNC

Jump If No Carry

CF

JO

Jump If Overflow

OF

JNO

Jump If No Overflow

OF

JP/JPE

Jump Parity or Jump Parity Even

PF

JNP/JPO

Jump No Parity or Jump Parity Odd PF

JS

Jump Sign (negative value)

SF

JNS

Jump No Sign (positive value)

SF

Language Instructions
AND

ANDreg,reg
ANDreg,mem
ANDreg,imm
ANDmem,reg
ANDmem,imm

The AND instruction performs a boolean

(bitwise) AND operation between each pair
of matching
bits in two operands and places the result
in the destination operand

OR

ORreg,reg
ORreg,mem
ORreg,imm
ORmem,reg
ORmem,imm

The OR instruction performs a boolean OR

operation between each pair of matching
bits in two operands and places the result
in the destination operand

Language Instructions
XOR
ORreg,reg
ORreg,mem
ORreg,imm
ORmem,reg
ORmem,imm

The XOR instruction performs a boolean

exclusive-OR operation between each pair
of matching bits in two operands and stores
the result in the destination operand

NOT
NOTreg
NOTmem

The NOT instruction toggles (inverts) all bits

in an operand

Language Instructions
TEST
The TEST instruction performs an implied AND
operation between each pair of matching bits
in two operands and sets the Sign, Zero, and
Parity flags based on the value assigned to the
destination operand. The only difference
between TEST and AND is that TEST does not
modify the destination operand.
The TEST instruction always clears the
Overflow and Carry flags. It modifies the Sign,
Zero, and Parity flags in the same way as the
AND instruction.

Language Instructions
CMP
In x86 assembly language we use the CMP
instruction to compare integers. Character
codes are also integers, so they work with CMP
as well. The CMP (compare) instruction
performs an implied subtraction of a source
operand from a destination operand. Neither
operand is modified.
CMP uses the same operand combinations as
the AND instruction.

Language Instructions
Directive
Instruction
Procedure
myproc PROC

ret
myproc endp
Macro
myMacro MACRO
..
endm
(myMacro)

(call myproc)

Language Instructions
PTR Operator

PTR operator overrides the

declared size of an operand to
MOV eax, WORD PTR access the operand using a
[var]
size attribute that is different
from the one assumed by the
assembler.
Var1
WORD 20 DUP(0)

LENGTHOF Operator

Var2 DWORD 20 DUP(0) The LENGTHOF operator

LENGTHOF var1
counts the number of

SIZEOF Operator
Var1
WORD
Var2 DWORD 20
SIZEOF
var1

($ - array)

Array
BYTE
0dh, 0ah

elements in an array

20 DUP(0)
The SIZEOF operator
DUP(0) counts the number of
bytes in an array

WELCOME,

Language Instructions
LABEL Directive

The LABEL directive gives a

size attribute without
allocating any
storage

.DATA
val16
LABEL
WORD
val32
DWORD
12345678h
.CODE
mov ax, val16
mov dx, [val16+2]
.DATA
LongValue LABEL
DWORD
val1 WORD
5678h
val2 WORD
1234h
.CODE

Language Instructions
Indexed Operand
.DATA
array BYTE 10h, 20h,
30h
.CODE
mov esi, 0
mov al, array[esi]

An indexed operand adds a

constant to a register to
generate an effective address

Scale Factors in Indexed Operand

.DATA
Array DWORD
400h

100h, 200h, 300h,

.CODE
mov esi, 3 * TYPE array

Language Instructions

Program
1st Program
.586
.MODEL flat, stdcall
option casemap :none
Include D:\msaeed\academic\assemblylanguage\masm32\include\windows.inc
Include D:\msaeed\academic\assemblylanguage\masm32\include\kernel32.inc
Include D:\msaeed\academic\assemblylanguage\masm32\include\user32.inc
Includelib D:\msaeed\academic\assemblylanguage\masm32\lib\kernel32.lib
Includelib D:\msaeed\academic\assemblylanguage\masm32\lib\user32.lib
.DATA
WindowTitle BYTE
Greetings",0
Message
BYTE
Hello, World",0
.CODE
main:
invoke MessageBox, NULL, ADDR Message, ADDR WindowTitle, MB_OK
invoke ExitProcess, eax
end main
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Computer Architecture & Assembly Language

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END